pc_piix.c 19 KB

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  1. /*
  2. * QEMU PC System Emulator
  3. *
  4. * Copyright (c) 2003-2004 Fabrice Bellard
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a copy
  7. * of this software and associated documentation files (the "Software"), to deal
  8. * in the Software without restriction, including without limitation the rights
  9. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. * copies of the Software, and to permit persons to whom the Software is
  11. * furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22. * THE SOFTWARE.
  23. */
  24. #include <glib.h>
  25. #include "hw.h"
  26. #include "pc.h"
  27. #include "apic.h"
  28. #include "pci.h"
  29. #include "pci_ids.h"
  30. #include "usb.h"
  31. #include "net.h"
  32. #include "boards.h"
  33. #include "ide.h"
  34. #include "kvm.h"
  35. #include "kvm/clock.h"
  36. #include "sysemu.h"
  37. #include "sysbus.h"
  38. #include "arch_init.h"
  39. #include "blockdev.h"
  40. #include "smbus.h"
  41. #include "xen.h"
  42. #include "memory.h"
  43. #include "exec-memory.h"
  44. #ifdef CONFIG_XEN
  45. # include <xen/hvm/hvm_info_table.h>
  46. #endif
  47. #define MAX_IDE_BUS 2
  48. static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  49. static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  50. static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  51. static void kvm_piix3_setup_irq_routing(bool pci_enabled)
  52. {
  53. #ifdef CONFIG_KVM
  54. KVMState *s = kvm_state;
  55. int i;
  56. if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
  57. for (i = 0; i < 8; ++i) {
  58. if (i == 2) {
  59. continue;
  60. }
  61. kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
  62. }
  63. for (i = 8; i < 16; ++i) {
  64. kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
  65. }
  66. if (pci_enabled) {
  67. for (i = 0; i < 24; ++i) {
  68. if (i == 0) {
  69. kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
  70. } else if (i != 2) {
  71. kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
  72. }
  73. }
  74. }
  75. }
  76. #endif /* CONFIG_KVM */
  77. }
  78. static void kvm_piix3_gsi_handler(void *opaque, int n, int level)
  79. {
  80. GSIState *s = opaque;
  81. if (n < ISA_NUM_IRQS) {
  82. /* Kernel will forward to both PIC and IOAPIC */
  83. qemu_set_irq(s->i8259_irq[n], level);
  84. } else {
  85. qemu_set_irq(s->ioapic_irq[n], level);
  86. }
  87. }
  88. static void ioapic_init(GSIState *gsi_state)
  89. {
  90. DeviceState *dev;
  91. SysBusDevice *d;
  92. unsigned int i;
  93. if (kvm_irqchip_in_kernel()) {
  94. dev = qdev_create(NULL, "kvm-ioapic");
  95. } else {
  96. dev = qdev_create(NULL, "ioapic");
  97. }
  98. /* FIXME: this should be under the piix3. */
  99. object_property_add_child(object_resolve_path("i440fx", NULL),
  100. "ioapic", OBJECT(dev), NULL);
  101. qdev_init_nofail(dev);
  102. d = sysbus_from_qdev(dev);
  103. sysbus_mmio_map(d, 0, 0xfec00000);
  104. for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  105. gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i);
  106. }
  107. }
  108. /* PC hardware initialisation */
  109. static void pc_init1(MemoryRegion *system_memory,
  110. MemoryRegion *system_io,
  111. ram_addr_t ram_size,
  112. const char *boot_device,
  113. const char *kernel_filename,
  114. const char *kernel_cmdline,
  115. const char *initrd_filename,
  116. const char *cpu_model,
  117. int pci_enabled,
  118. int kvmclock_enabled)
  119. {
  120. int i;
  121. ram_addr_t below_4g_mem_size, above_4g_mem_size;
  122. PCIBus *pci_bus;
  123. ISABus *isa_bus;
  124. PCII440FXState *i440fx_state;
  125. int piix3_devfn = -1;
  126. qemu_irq *cpu_irq;
  127. qemu_irq *gsi;
  128. qemu_irq *i8259;
  129. qemu_irq *smi_irq;
  130. GSIState *gsi_state;
  131. DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  132. BusState *idebus[MAX_IDE_BUS];
  133. ISADevice *rtc_state;
  134. ISADevice *floppy;
  135. MemoryRegion *ram_memory;
  136. MemoryRegion *pci_memory;
  137. MemoryRegion *rom_memory;
  138. void *fw_cfg = NULL;
  139. pc_cpus_init(cpu_model);
  140. if (kvmclock_enabled) {
  141. kvmclock_create();
  142. }
  143. if (ram_size >= 0xe0000000 ) {
  144. above_4g_mem_size = ram_size - 0xe0000000;
  145. below_4g_mem_size = 0xe0000000;
  146. } else {
  147. above_4g_mem_size = 0;
  148. below_4g_mem_size = ram_size;
  149. }
  150. if (pci_enabled) {
  151. pci_memory = g_new(MemoryRegion, 1);
  152. memory_region_init(pci_memory, "pci", INT64_MAX);
  153. rom_memory = pci_memory;
  154. } else {
  155. pci_memory = NULL;
  156. rom_memory = system_memory;
  157. }
  158. /* allocate ram and load rom/bios */
  159. if (!xen_enabled()) {
  160. fw_cfg = pc_memory_init(system_memory,
  161. kernel_filename, kernel_cmdline, initrd_filename,
  162. below_4g_mem_size, above_4g_mem_size,
  163. pci_enabled ? rom_memory : system_memory, &ram_memory);
  164. }
  165. gsi_state = g_malloc0(sizeof(*gsi_state));
  166. if (kvm_irqchip_in_kernel()) {
  167. kvm_piix3_setup_irq_routing(pci_enabled);
  168. gsi = qemu_allocate_irqs(kvm_piix3_gsi_handler, gsi_state,
  169. GSI_NUM_PINS);
  170. } else {
  171. gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
  172. }
  173. if (pci_enabled) {
  174. pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
  175. system_memory, system_io, ram_size,
  176. below_4g_mem_size,
  177. 0x100000000ULL - below_4g_mem_size,
  178. 0x100000000ULL + above_4g_mem_size,
  179. (sizeof(target_phys_addr_t) == 4
  180. ? 0
  181. : ((uint64_t)1 << 62)),
  182. pci_memory, ram_memory);
  183. } else {
  184. pci_bus = NULL;
  185. i440fx_state = NULL;
  186. isa_bus = isa_bus_new(NULL, system_io);
  187. no_hpet = 1;
  188. }
  189. isa_bus_irqs(isa_bus, gsi);
  190. if (kvm_irqchip_in_kernel()) {
  191. i8259 = kvm_i8259_init(isa_bus);
  192. } else if (xen_enabled()) {
  193. i8259 = xen_interrupt_controller_init();
  194. } else {
  195. cpu_irq = pc_allocate_cpu_irq();
  196. i8259 = i8259_init(isa_bus, cpu_irq[0]);
  197. }
  198. for (i = 0; i < ISA_NUM_IRQS; i++) {
  199. gsi_state->i8259_irq[i] = i8259[i];
  200. }
  201. if (pci_enabled) {
  202. ioapic_init(gsi_state);
  203. }
  204. pc_register_ferr_irq(gsi[13]);
  205. pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL);
  206. if (xen_enabled()) {
  207. pci_create_simple(pci_bus, -1, "xen-platform");
  208. }
  209. /* init basic PC hardware */
  210. pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, xen_enabled());
  211. for(i = 0; i < nb_nics; i++) {
  212. NICInfo *nd = &nd_table[i];
  213. if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
  214. pc_init_ne2k_isa(isa_bus, nd);
  215. else
  216. pci_nic_init_nofail(nd, "e1000", NULL);
  217. }
  218. ide_drive_get(hd, MAX_IDE_BUS);
  219. if (pci_enabled) {
  220. PCIDevice *dev;
  221. if (xen_enabled()) {
  222. dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
  223. } else {
  224. dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
  225. }
  226. idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
  227. idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
  228. } else {
  229. for(i = 0; i < MAX_IDE_BUS; i++) {
  230. ISADevice *dev;
  231. dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
  232. ide_irq[i],
  233. hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
  234. idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
  235. }
  236. }
  237. audio_init(isa_bus, pci_enabled ? pci_bus : NULL);
  238. pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
  239. floppy, idebus[0], idebus[1], rtc_state);
  240. if (pci_enabled && usb_enabled) {
  241. pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
  242. }
  243. if (pci_enabled && acpi_enabled) {
  244. i2c_bus *smbus;
  245. smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
  246. /* TODO: Populate SPD eeprom data. */
  247. smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
  248. gsi[9], *smi_irq,
  249. kvm_enabled(), fw_cfg);
  250. smbus_eeprom_init(smbus, 8, NULL, 0);
  251. }
  252. if (pci_enabled) {
  253. pc_pci_device_init(pci_bus);
  254. }
  255. }
  256. static void pc_init_pci(ram_addr_t ram_size,
  257. const char *boot_device,
  258. const char *kernel_filename,
  259. const char *kernel_cmdline,
  260. const char *initrd_filename,
  261. const char *cpu_model)
  262. {
  263. pc_init1(get_system_memory(),
  264. get_system_io(),
  265. ram_size, boot_device,
  266. kernel_filename, kernel_cmdline,
  267. initrd_filename, cpu_model, 1, 1);
  268. }
  269. static void pc_init_pci_no_kvmclock(ram_addr_t ram_size,
  270. const char *boot_device,
  271. const char *kernel_filename,
  272. const char *kernel_cmdline,
  273. const char *initrd_filename,
  274. const char *cpu_model)
  275. {
  276. pc_init1(get_system_memory(),
  277. get_system_io(),
  278. ram_size, boot_device,
  279. kernel_filename, kernel_cmdline,
  280. initrd_filename, cpu_model, 1, 0);
  281. }
  282. static void pc_init_isa(ram_addr_t ram_size,
  283. const char *boot_device,
  284. const char *kernel_filename,
  285. const char *kernel_cmdline,
  286. const char *initrd_filename,
  287. const char *cpu_model)
  288. {
  289. if (cpu_model == NULL)
  290. cpu_model = "486";
  291. pc_init1(get_system_memory(),
  292. get_system_io(),
  293. ram_size, boot_device,
  294. kernel_filename, kernel_cmdline,
  295. initrd_filename, cpu_model, 0, 1);
  296. }
  297. #ifdef CONFIG_XEN
  298. static void pc_xen_hvm_init(ram_addr_t ram_size,
  299. const char *boot_device,
  300. const char *kernel_filename,
  301. const char *kernel_cmdline,
  302. const char *initrd_filename,
  303. const char *cpu_model)
  304. {
  305. if (xen_hvm_init() != 0) {
  306. hw_error("xen hardware virtual machine initialisation failed");
  307. }
  308. pc_init_pci_no_kvmclock(ram_size, boot_device,
  309. kernel_filename, kernel_cmdline,
  310. initrd_filename, cpu_model);
  311. xen_vcpu_init();
  312. }
  313. #endif
  314. static QEMUMachine pc_machine_v1_2 = {
  315. .name = "pc-1.2",
  316. .alias = "pc",
  317. .desc = "Standard PC",
  318. .init = pc_init_pci,
  319. .max_cpus = 255,
  320. .is_default = 1,
  321. };
  322. #define PC_COMPAT_1_1 \
  323. {\
  324. .driver = "virtio-scsi-pci",\
  325. .property = "hotplug",\
  326. .value = "off",\
  327. },{\
  328. .driver = "virtio-scsi-pci",\
  329. .property = "param_change",\
  330. .value = "off",\
  331. },{\
  332. .driver = "VGA",\
  333. .property = "vgamem_mb",\
  334. .value = stringify(8),\
  335. },{\
  336. .driver = "vmware-svga",\
  337. .property = "vgamem_mb",\
  338. .value = stringify(8),\
  339. },{\
  340. .driver = "qxl-vga",\
  341. .property = "vgamem_mb",\
  342. .value = stringify(8),\
  343. },{\
  344. .driver = "qxl",\
  345. .property = "vgamem_mb",\
  346. .value = stringify(8),\
  347. },{\
  348. .driver = "virtio-blk-pci",\
  349. .property = "config-wce",\
  350. .value = "off",\
  351. }
  352. static QEMUMachine pc_machine_v1_1 = {
  353. .name = "pc-1.1",
  354. .desc = "Standard PC",
  355. .init = pc_init_pci,
  356. .max_cpus = 255,
  357. .compat_props = (GlobalProperty[]) {
  358. PC_COMPAT_1_1,
  359. { /* end of list */ }
  360. },
  361. };
  362. #define PC_COMPAT_1_0 \
  363. PC_COMPAT_1_1,\
  364. {\
  365. .driver = "pc-sysfw",\
  366. .property = "rom_only",\
  367. .value = stringify(1),\
  368. }, {\
  369. .driver = "isa-fdc",\
  370. .property = "check_media_rate",\
  371. .value = "off",\
  372. }, {\
  373. .driver = "virtio-balloon-pci",\
  374. .property = "class",\
  375. .value = stringify(PCI_CLASS_MEMORY_RAM),\
  376. },{\
  377. .driver = "apic",\
  378. .property = "vapic",\
  379. .value = "off",\
  380. },{\
  381. .driver = TYPE_USB_DEVICE,\
  382. .property = "full-path",\
  383. .value = "no",\
  384. }
  385. static QEMUMachine pc_machine_v1_0 = {
  386. .name = "pc-1.0",
  387. .desc = "Standard PC",
  388. .init = pc_init_pci,
  389. .max_cpus = 255,
  390. .compat_props = (GlobalProperty[]) {
  391. PC_COMPAT_1_0,
  392. { /* end of list */ }
  393. },
  394. .hw_version = "1.0",
  395. };
  396. #define PC_COMPAT_0_15 \
  397. PC_COMPAT_1_0
  398. static QEMUMachine pc_machine_v0_15 = {
  399. .name = "pc-0.15",
  400. .desc = "Standard PC",
  401. .init = pc_init_pci,
  402. .max_cpus = 255,
  403. .compat_props = (GlobalProperty[]) {
  404. PC_COMPAT_0_15,
  405. { /* end of list */ }
  406. },
  407. .hw_version = "0.15",
  408. };
  409. #define PC_COMPAT_0_14 \
  410. PC_COMPAT_0_15,\
  411. {\
  412. .driver = "virtio-blk-pci",\
  413. .property = "event_idx",\
  414. .value = "off",\
  415. },{\
  416. .driver = "virtio-serial-pci",\
  417. .property = "event_idx",\
  418. .value = "off",\
  419. },{\
  420. .driver = "virtio-net-pci",\
  421. .property = "event_idx",\
  422. .value = "off",\
  423. },{\
  424. .driver = "virtio-balloon-pci",\
  425. .property = "event_idx",\
  426. .value = "off",\
  427. }
  428. static QEMUMachine pc_machine_v0_14 = {
  429. .name = "pc-0.14",
  430. .desc = "Standard PC",
  431. .init = pc_init_pci,
  432. .max_cpus = 255,
  433. .compat_props = (GlobalProperty[]) {
  434. PC_COMPAT_0_14,
  435. {
  436. .driver = "qxl",
  437. .property = "revision",
  438. .value = stringify(2),
  439. },{
  440. .driver = "qxl-vga",
  441. .property = "revision",
  442. .value = stringify(2),
  443. },
  444. { /* end of list */ }
  445. },
  446. .hw_version = "0.14",
  447. };
  448. #define PC_COMPAT_0_13 \
  449. PC_COMPAT_0_14,\
  450. {\
  451. .driver = TYPE_PCI_DEVICE,\
  452. .property = "command_serr_enable",\
  453. .value = "off",\
  454. },{\
  455. .driver = "AC97",\
  456. .property = "use_broken_id",\
  457. .value = stringify(1),\
  458. }
  459. static QEMUMachine pc_machine_v0_13 = {
  460. .name = "pc-0.13",
  461. .desc = "Standard PC",
  462. .init = pc_init_pci_no_kvmclock,
  463. .max_cpus = 255,
  464. .compat_props = (GlobalProperty[]) {
  465. PC_COMPAT_0_13,
  466. {
  467. .driver = "virtio-9p-pci",
  468. .property = "vectors",
  469. .value = stringify(0),
  470. },{
  471. .driver = "VGA",
  472. .property = "rombar",
  473. .value = stringify(0),
  474. },{
  475. .driver = "vmware-svga",
  476. .property = "rombar",
  477. .value = stringify(0),
  478. },
  479. { /* end of list */ }
  480. },
  481. .hw_version = "0.13",
  482. };
  483. #define PC_COMPAT_0_12 \
  484. PC_COMPAT_0_13,\
  485. {\
  486. .driver = "virtio-serial-pci",\
  487. .property = "max_ports",\
  488. .value = stringify(1),\
  489. },{\
  490. .driver = "virtio-serial-pci",\
  491. .property = "vectors",\
  492. .value = stringify(0),\
  493. }
  494. static QEMUMachine pc_machine_v0_12 = {
  495. .name = "pc-0.12",
  496. .desc = "Standard PC",
  497. .init = pc_init_pci_no_kvmclock,
  498. .max_cpus = 255,
  499. .compat_props = (GlobalProperty[]) {
  500. PC_COMPAT_0_12,
  501. {
  502. .driver = "VGA",
  503. .property = "rombar",
  504. .value = stringify(0),
  505. },{
  506. .driver = "vmware-svga",
  507. .property = "rombar",
  508. .value = stringify(0),
  509. },
  510. { /* end of list */ }
  511. },
  512. .hw_version = "0.12",
  513. };
  514. #define PC_COMPAT_0_11 \
  515. PC_COMPAT_0_12,\
  516. {\
  517. .driver = "virtio-blk-pci",\
  518. .property = "vectors",\
  519. .value = stringify(0),\
  520. },{\
  521. .driver = TYPE_PCI_DEVICE,\
  522. .property = "rombar",\
  523. .value = stringify(0),\
  524. }
  525. static QEMUMachine pc_machine_v0_11 = {
  526. .name = "pc-0.11",
  527. .desc = "Standard PC, qemu 0.11",
  528. .init = pc_init_pci_no_kvmclock,
  529. .max_cpus = 255,
  530. .compat_props = (GlobalProperty[]) {
  531. PC_COMPAT_0_11,
  532. {
  533. .driver = "ide-drive",
  534. .property = "ver",
  535. .value = "0.11",
  536. },{
  537. .driver = "scsi-disk",
  538. .property = "ver",
  539. .value = "0.11",
  540. },
  541. { /* end of list */ }
  542. },
  543. .hw_version = "0.11",
  544. };
  545. static QEMUMachine pc_machine_v0_10 = {
  546. .name = "pc-0.10",
  547. .desc = "Standard PC, qemu 0.10",
  548. .init = pc_init_pci_no_kvmclock,
  549. .max_cpus = 255,
  550. .compat_props = (GlobalProperty[]) {
  551. PC_COMPAT_0_11,
  552. {
  553. .driver = "virtio-blk-pci",
  554. .property = "class",
  555. .value = stringify(PCI_CLASS_STORAGE_OTHER),
  556. },{
  557. .driver = "virtio-serial-pci",
  558. .property = "class",
  559. .value = stringify(PCI_CLASS_DISPLAY_OTHER),
  560. },{
  561. .driver = "virtio-net-pci",
  562. .property = "vectors",
  563. .value = stringify(0),
  564. },{
  565. .driver = "ide-drive",
  566. .property = "ver",
  567. .value = "0.10",
  568. },{
  569. .driver = "scsi-disk",
  570. .property = "ver",
  571. .value = "0.10",
  572. },
  573. { /* end of list */ }
  574. },
  575. .hw_version = "0.10",
  576. };
  577. static QEMUMachine isapc_machine = {
  578. .name = "isapc",
  579. .desc = "ISA-only PC",
  580. .init = pc_init_isa,
  581. .max_cpus = 1,
  582. .compat_props = (GlobalProperty[]) {
  583. {
  584. .driver = "pc-sysfw",
  585. .property = "rom_only",
  586. .value = stringify(1),
  587. },
  588. { /* end of list */ }
  589. },
  590. };
  591. #ifdef CONFIG_XEN
  592. static QEMUMachine xenfv_machine = {
  593. .name = "xenfv",
  594. .desc = "Xen Fully-virtualized PC",
  595. .init = pc_xen_hvm_init,
  596. .max_cpus = HVM_MAX_VCPUS,
  597. .default_machine_opts = "accel=xen",
  598. };
  599. #endif
  600. static void pc_machine_init(void)
  601. {
  602. qemu_register_machine(&pc_machine_v1_2);
  603. qemu_register_machine(&pc_machine_v1_1);
  604. qemu_register_machine(&pc_machine_v1_0);
  605. qemu_register_machine(&pc_machine_v0_15);
  606. qemu_register_machine(&pc_machine_v0_14);
  607. qemu_register_machine(&pc_machine_v0_13);
  608. qemu_register_machine(&pc_machine_v0_12);
  609. qemu_register_machine(&pc_machine_v0_11);
  610. qemu_register_machine(&pc_machine_v0_10);
  611. qemu_register_machine(&isapc_machine);
  612. #ifdef CONFIG_XEN
  613. qemu_register_machine(&xenfv_machine);
  614. #endif
  615. }
  616. machine_init(pc_machine_init);