ivshmem.c 22 KB

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  1. /*
  2. * Inter-VM Shared Memory PCI device.
  3. *
  4. * Author:
  5. * Cam Macdonell <cam@cs.ualberta.ca>
  6. *
  7. * Based On: cirrus_vga.c
  8. * Copyright (c) 2004 Fabrice Bellard
  9. * Copyright (c) 2004 Makoto Suzuki (suzu)
  10. *
  11. * and rtl8139.c
  12. * Copyright (c) 2006 Igor Kovalenko
  13. *
  14. * This code is licensed under the GNU GPL v2.
  15. *
  16. * Contributions after 2012-01-13 are licensed under the terms of the
  17. * GNU GPL, version 2 or (at your option) any later version.
  18. */
  19. #include "hw.h"
  20. #include "pc.h"
  21. #include "pci.h"
  22. #include "msix.h"
  23. #include "kvm.h"
  24. #include "migration.h"
  25. #include "qerror.h"
  26. #include "event_notifier.h"
  27. #include <sys/mman.h>
  28. #include <sys/types.h>
  29. #define IVSHMEM_IOEVENTFD 0
  30. #define IVSHMEM_MSI 1
  31. #define IVSHMEM_PEER 0
  32. #define IVSHMEM_MASTER 1
  33. #define IVSHMEM_REG_BAR_SIZE 0x100
  34. //#define DEBUG_IVSHMEM
  35. #ifdef DEBUG_IVSHMEM
  36. #define IVSHMEM_DPRINTF(fmt, ...) \
  37. do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0)
  38. #else
  39. #define IVSHMEM_DPRINTF(fmt, ...)
  40. #endif
  41. typedef struct Peer {
  42. int nb_eventfds;
  43. EventNotifier *eventfds;
  44. } Peer;
  45. typedef struct EventfdEntry {
  46. PCIDevice *pdev;
  47. int vector;
  48. } EventfdEntry;
  49. typedef struct IVShmemState {
  50. PCIDevice dev;
  51. uint32_t intrmask;
  52. uint32_t intrstatus;
  53. uint32_t doorbell;
  54. CharDriverState **eventfd_chr;
  55. CharDriverState *server_chr;
  56. MemoryRegion ivshmem_mmio;
  57. /* We might need to register the BAR before we actually have the memory.
  58. * So prepare a container MemoryRegion for the BAR immediately and
  59. * add a subregion when we have the memory.
  60. */
  61. MemoryRegion bar;
  62. MemoryRegion ivshmem;
  63. uint64_t ivshmem_size; /* size of shared memory region */
  64. int shm_fd; /* shared memory file descriptor */
  65. Peer *peers;
  66. int nb_peers; /* how many guests we have space for */
  67. int max_peer; /* maximum numbered peer */
  68. int vm_id;
  69. uint32_t vectors;
  70. uint32_t features;
  71. EventfdEntry *eventfd_table;
  72. Error *migration_blocker;
  73. char * shmobj;
  74. char * sizearg;
  75. char * role;
  76. int role_val; /* scalar to avoid multiple string comparisons */
  77. } IVShmemState;
  78. /* registers for the Inter-VM shared memory device */
  79. enum ivshmem_registers {
  80. INTRMASK = 0,
  81. INTRSTATUS = 4,
  82. IVPOSITION = 8,
  83. DOORBELL = 12,
  84. };
  85. static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
  86. unsigned int feature) {
  87. return (ivs->features & (1 << feature));
  88. }
  89. static inline bool is_power_of_two(uint64_t x) {
  90. return (x & (x - 1)) == 0;
  91. }
  92. /* accessing registers - based on rtl8139 */
  93. static void ivshmem_update_irq(IVShmemState *s, int val)
  94. {
  95. int isr;
  96. isr = (s->intrstatus & s->intrmask) & 0xffffffff;
  97. /* don't print ISR resets */
  98. if (isr) {
  99. IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
  100. isr ? 1 : 0, s->intrstatus, s->intrmask);
  101. }
  102. qemu_set_irq(s->dev.irq[0], (isr != 0));
  103. }
  104. static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
  105. {
  106. IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
  107. s->intrmask = val;
  108. ivshmem_update_irq(s, val);
  109. }
  110. static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
  111. {
  112. uint32_t ret = s->intrmask;
  113. IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
  114. return ret;
  115. }
  116. static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
  117. {
  118. IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
  119. s->intrstatus = val;
  120. ivshmem_update_irq(s, val);
  121. return;
  122. }
  123. static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
  124. {
  125. uint32_t ret = s->intrstatus;
  126. /* reading ISR clears all interrupts */
  127. s->intrstatus = 0;
  128. ivshmem_update_irq(s, 0);
  129. return ret;
  130. }
  131. static void ivshmem_io_write(void *opaque, target_phys_addr_t addr,
  132. uint64_t val, unsigned size)
  133. {
  134. IVShmemState *s = opaque;
  135. uint16_t dest = val >> 16;
  136. uint16_t vector = val & 0xff;
  137. addr &= 0xfc;
  138. IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
  139. switch (addr)
  140. {
  141. case INTRMASK:
  142. ivshmem_IntrMask_write(s, val);
  143. break;
  144. case INTRSTATUS:
  145. ivshmem_IntrStatus_write(s, val);
  146. break;
  147. case DOORBELL:
  148. /* check that dest VM ID is reasonable */
  149. if (dest > s->max_peer) {
  150. IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
  151. break;
  152. }
  153. /* check doorbell range */
  154. if (vector < s->peers[dest].nb_eventfds) {
  155. IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
  156. event_notifier_set(&s->peers[dest].eventfds[vector]);
  157. }
  158. break;
  159. default:
  160. IVSHMEM_DPRINTF("Invalid VM Doorbell VM %d\n", dest);
  161. }
  162. }
  163. static uint64_t ivshmem_io_read(void *opaque, target_phys_addr_t addr,
  164. unsigned size)
  165. {
  166. IVShmemState *s = opaque;
  167. uint32_t ret;
  168. switch (addr)
  169. {
  170. case INTRMASK:
  171. ret = ivshmem_IntrMask_read(s);
  172. break;
  173. case INTRSTATUS:
  174. ret = ivshmem_IntrStatus_read(s);
  175. break;
  176. case IVPOSITION:
  177. /* return my VM ID if the memory is mapped */
  178. if (s->shm_fd > 0) {
  179. ret = s->vm_id;
  180. } else {
  181. ret = -1;
  182. }
  183. break;
  184. default:
  185. IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
  186. ret = 0;
  187. }
  188. return ret;
  189. }
  190. static const MemoryRegionOps ivshmem_mmio_ops = {
  191. .read = ivshmem_io_read,
  192. .write = ivshmem_io_write,
  193. .endianness = DEVICE_NATIVE_ENDIAN,
  194. .impl = {
  195. .min_access_size = 4,
  196. .max_access_size = 4,
  197. },
  198. };
  199. static void ivshmem_receive(void *opaque, const uint8_t *buf, int size)
  200. {
  201. IVShmemState *s = opaque;
  202. ivshmem_IntrStatus_write(s, *buf);
  203. IVSHMEM_DPRINTF("ivshmem_receive 0x%02x\n", *buf);
  204. }
  205. static int ivshmem_can_receive(void * opaque)
  206. {
  207. return 8;
  208. }
  209. static void ivshmem_event(void *opaque, int event)
  210. {
  211. IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
  212. }
  213. static void fake_irqfd(void *opaque, const uint8_t *buf, int size) {
  214. EventfdEntry *entry = opaque;
  215. PCIDevice *pdev = entry->pdev;
  216. IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, entry->vector);
  217. msix_notify(pdev, entry->vector);
  218. }
  219. static CharDriverState* create_eventfd_chr_device(void * opaque, EventNotifier *n,
  220. int vector)
  221. {
  222. /* create a event character device based on the passed eventfd */
  223. IVShmemState *s = opaque;
  224. CharDriverState * chr;
  225. int eventfd = event_notifier_get_fd(n);
  226. chr = qemu_chr_open_eventfd(eventfd);
  227. if (chr == NULL) {
  228. fprintf(stderr, "creating eventfd for eventfd %d failed\n", eventfd);
  229. exit(-1);
  230. }
  231. /* if MSI is supported we need multiple interrupts */
  232. if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
  233. s->eventfd_table[vector].pdev = &s->dev;
  234. s->eventfd_table[vector].vector = vector;
  235. qemu_chr_add_handlers(chr, ivshmem_can_receive, fake_irqfd,
  236. ivshmem_event, &s->eventfd_table[vector]);
  237. } else {
  238. qemu_chr_add_handlers(chr, ivshmem_can_receive, ivshmem_receive,
  239. ivshmem_event, s);
  240. }
  241. return chr;
  242. }
  243. static int check_shm_size(IVShmemState *s, int fd) {
  244. /* check that the guest isn't going to try and map more memory than the
  245. * the object has allocated return -1 to indicate error */
  246. struct stat buf;
  247. fstat(fd, &buf);
  248. if (s->ivshmem_size > buf.st_size) {
  249. fprintf(stderr,
  250. "IVSHMEM ERROR: Requested memory size greater"
  251. " than shared object size (%" PRIu64 " > %" PRIu64")\n",
  252. s->ivshmem_size, (uint64_t)buf.st_size);
  253. return -1;
  254. } else {
  255. return 0;
  256. }
  257. }
  258. /* create the shared memory BAR when we are not using the server, so we can
  259. * create the BAR and map the memory immediately */
  260. static void create_shared_memory_BAR(IVShmemState *s, int fd) {
  261. void * ptr;
  262. s->shm_fd = fd;
  263. ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
  264. memory_region_init_ram_ptr(&s->ivshmem, "ivshmem.bar2",
  265. s->ivshmem_size, ptr);
  266. vmstate_register_ram(&s->ivshmem, &s->dev.qdev);
  267. memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
  268. /* region for shared memory */
  269. pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
  270. }
  271. static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
  272. {
  273. memory_region_add_eventfd(&s->ivshmem_mmio,
  274. DOORBELL,
  275. 4,
  276. true,
  277. (posn << 16) | i,
  278. &s->peers[posn].eventfds[i]);
  279. }
  280. static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
  281. {
  282. memory_region_del_eventfd(&s->ivshmem_mmio,
  283. DOORBELL,
  284. 4,
  285. true,
  286. (posn << 16) | i,
  287. &s->peers[posn].eventfds[i]);
  288. }
  289. static void close_guest_eventfds(IVShmemState *s, int posn)
  290. {
  291. int i, guest_curr_max;
  292. if (!ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
  293. return;
  294. }
  295. guest_curr_max = s->peers[posn].nb_eventfds;
  296. memory_region_transaction_begin();
  297. for (i = 0; i < guest_curr_max; i++) {
  298. ivshmem_del_eventfd(s, posn, i);
  299. }
  300. memory_region_transaction_commit();
  301. for (i = 0; i < guest_curr_max; i++) {
  302. event_notifier_cleanup(&s->peers[posn].eventfds[i]);
  303. }
  304. g_free(s->peers[posn].eventfds);
  305. s->peers[posn].nb_eventfds = 0;
  306. }
  307. /* this function increase the dynamic storage need to store data about other
  308. * guests */
  309. static void increase_dynamic_storage(IVShmemState *s, int new_min_size) {
  310. int j, old_nb_alloc;
  311. old_nb_alloc = s->nb_peers;
  312. while (new_min_size >= s->nb_peers)
  313. s->nb_peers = s->nb_peers * 2;
  314. IVSHMEM_DPRINTF("bumping storage to %d guests\n", s->nb_peers);
  315. s->peers = g_realloc(s->peers, s->nb_peers * sizeof(Peer));
  316. /* zero out new pointers */
  317. for (j = old_nb_alloc; j < s->nb_peers; j++) {
  318. s->peers[j].eventfds = NULL;
  319. s->peers[j].nb_eventfds = 0;
  320. }
  321. }
  322. static void ivshmem_read(void *opaque, const uint8_t * buf, int flags)
  323. {
  324. IVShmemState *s = opaque;
  325. int incoming_fd, tmp_fd;
  326. int guest_max_eventfd;
  327. long incoming_posn;
  328. memcpy(&incoming_posn, buf, sizeof(long));
  329. /* pick off s->server_chr->msgfd and store it, posn should accompany msg */
  330. tmp_fd = qemu_chr_fe_get_msgfd(s->server_chr);
  331. IVSHMEM_DPRINTF("posn is %ld, fd is %d\n", incoming_posn, tmp_fd);
  332. /* make sure we have enough space for this guest */
  333. if (incoming_posn >= s->nb_peers) {
  334. increase_dynamic_storage(s, incoming_posn);
  335. }
  336. if (tmp_fd == -1) {
  337. /* if posn is positive and unseen before then this is our posn*/
  338. if ((incoming_posn >= 0) &&
  339. (s->peers[incoming_posn].eventfds == NULL)) {
  340. /* receive our posn */
  341. s->vm_id = incoming_posn;
  342. return;
  343. } else {
  344. /* otherwise an fd == -1 means an existing guest has gone away */
  345. IVSHMEM_DPRINTF("posn %ld has gone away\n", incoming_posn);
  346. close_guest_eventfds(s, incoming_posn);
  347. return;
  348. }
  349. }
  350. /* because of the implementation of get_msgfd, we need a dup */
  351. incoming_fd = dup(tmp_fd);
  352. if (incoming_fd == -1) {
  353. fprintf(stderr, "could not allocate file descriptor %s\n",
  354. strerror(errno));
  355. return;
  356. }
  357. /* if the position is -1, then it's shared memory region fd */
  358. if (incoming_posn == -1) {
  359. void * map_ptr;
  360. s->max_peer = 0;
  361. if (check_shm_size(s, incoming_fd) == -1) {
  362. exit(-1);
  363. }
  364. /* mmap the region and map into the BAR2 */
  365. map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
  366. incoming_fd, 0);
  367. memory_region_init_ram_ptr(&s->ivshmem,
  368. "ivshmem.bar2", s->ivshmem_size, map_ptr);
  369. vmstate_register_ram(&s->ivshmem, &s->dev.qdev);
  370. IVSHMEM_DPRINTF("guest h/w addr = %" PRIu64 ", size = %" PRIu64 "\n",
  371. s->ivshmem_offset, s->ivshmem_size);
  372. memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
  373. /* only store the fd if it is successfully mapped */
  374. s->shm_fd = incoming_fd;
  375. return;
  376. }
  377. /* each guest has an array of eventfds, and we keep track of how many
  378. * guests for each VM */
  379. guest_max_eventfd = s->peers[incoming_posn].nb_eventfds;
  380. if (guest_max_eventfd == 0) {
  381. /* one eventfd per MSI vector */
  382. s->peers[incoming_posn].eventfds = g_new(EventNotifier, s->vectors);
  383. }
  384. /* this is an eventfd for a particular guest VM */
  385. IVSHMEM_DPRINTF("eventfds[%ld][%d] = %d\n", incoming_posn,
  386. guest_max_eventfd, incoming_fd);
  387. event_notifier_init_fd(&s->peers[incoming_posn].eventfds[guest_max_eventfd],
  388. incoming_fd);
  389. /* increment count for particular guest */
  390. s->peers[incoming_posn].nb_eventfds++;
  391. /* keep track of the maximum VM ID */
  392. if (incoming_posn > s->max_peer) {
  393. s->max_peer = incoming_posn;
  394. }
  395. if (incoming_posn == s->vm_id) {
  396. s->eventfd_chr[guest_max_eventfd] = create_eventfd_chr_device(s,
  397. &s->peers[s->vm_id].eventfds[guest_max_eventfd],
  398. guest_max_eventfd);
  399. }
  400. if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
  401. ivshmem_add_eventfd(s, incoming_posn, guest_max_eventfd);
  402. }
  403. return;
  404. }
  405. /* Select the MSI-X vectors used by device.
  406. * ivshmem maps events to vectors statically, so
  407. * we just enable all vectors on init and after reset. */
  408. static void ivshmem_use_msix(IVShmemState * s)
  409. {
  410. int i;
  411. if (!msix_present(&s->dev)) {
  412. return;
  413. }
  414. for (i = 0; i < s->vectors; i++) {
  415. msix_vector_use(&s->dev, i);
  416. }
  417. }
  418. static void ivshmem_reset(DeviceState *d)
  419. {
  420. IVShmemState *s = DO_UPCAST(IVShmemState, dev.qdev, d);
  421. s->intrstatus = 0;
  422. ivshmem_use_msix(s);
  423. return;
  424. }
  425. static uint64_t ivshmem_get_size(IVShmemState * s) {
  426. uint64_t value;
  427. char *ptr;
  428. value = strtoull(s->sizearg, &ptr, 10);
  429. switch (*ptr) {
  430. case 0: case 'M': case 'm':
  431. value <<= 20;
  432. break;
  433. case 'G': case 'g':
  434. value <<= 30;
  435. break;
  436. default:
  437. fprintf(stderr, "qemu: invalid ram size: %s\n", s->sizearg);
  438. exit(1);
  439. }
  440. /* BARs must be a power of 2 */
  441. if (!is_power_of_two(value)) {
  442. fprintf(stderr, "ivshmem: size must be power of 2\n");
  443. exit(1);
  444. }
  445. return value;
  446. }
  447. static void ivshmem_setup_msi(IVShmemState * s)
  448. {
  449. if (msix_init_exclusive_bar(&s->dev, s->vectors, 1)) {
  450. IVSHMEM_DPRINTF("msix initialization failed\n");
  451. exit(1);
  452. }
  453. IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
  454. /* allocate QEMU char devices for receiving interrupts */
  455. s->eventfd_table = g_malloc0(s->vectors * sizeof(EventfdEntry));
  456. ivshmem_use_msix(s);
  457. }
  458. static void ivshmem_save(QEMUFile* f, void *opaque)
  459. {
  460. IVShmemState *proxy = opaque;
  461. IVSHMEM_DPRINTF("ivshmem_save\n");
  462. pci_device_save(&proxy->dev, f);
  463. if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
  464. msix_save(&proxy->dev, f);
  465. } else {
  466. qemu_put_be32(f, proxy->intrstatus);
  467. qemu_put_be32(f, proxy->intrmask);
  468. }
  469. }
  470. static int ivshmem_load(QEMUFile* f, void *opaque, int version_id)
  471. {
  472. IVSHMEM_DPRINTF("ivshmem_load\n");
  473. IVShmemState *proxy = opaque;
  474. int ret;
  475. if (version_id > 0) {
  476. return -EINVAL;
  477. }
  478. if (proxy->role_val == IVSHMEM_PEER) {
  479. fprintf(stderr, "ivshmem: 'peer' devices are not migratable\n");
  480. return -EINVAL;
  481. }
  482. ret = pci_device_load(&proxy->dev, f);
  483. if (ret) {
  484. return ret;
  485. }
  486. if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
  487. msix_load(&proxy->dev, f);
  488. ivshmem_use_msix(proxy);
  489. } else {
  490. proxy->intrstatus = qemu_get_be32(f);
  491. proxy->intrmask = qemu_get_be32(f);
  492. }
  493. return 0;
  494. }
  495. static void ivshmem_write_config(PCIDevice *pci_dev, uint32_t address,
  496. uint32_t val, int len)
  497. {
  498. pci_default_write_config(pci_dev, address, val, len);
  499. msix_write_config(pci_dev, address, val, len);
  500. }
  501. static int pci_ivshmem_init(PCIDevice *dev)
  502. {
  503. IVShmemState *s = DO_UPCAST(IVShmemState, dev, dev);
  504. uint8_t *pci_conf;
  505. if (s->sizearg == NULL)
  506. s->ivshmem_size = 4 << 20; /* 4 MB default */
  507. else {
  508. s->ivshmem_size = ivshmem_get_size(s);
  509. }
  510. register_savevm(&s->dev.qdev, "ivshmem", 0, 0, ivshmem_save, ivshmem_load,
  511. dev);
  512. /* IRQFD requires MSI */
  513. if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
  514. !ivshmem_has_feature(s, IVSHMEM_MSI)) {
  515. fprintf(stderr, "ivshmem: ioeventfd/irqfd requires MSI\n");
  516. exit(1);
  517. }
  518. /* check that role is reasonable */
  519. if (s->role) {
  520. if (strncmp(s->role, "peer", 5) == 0) {
  521. s->role_val = IVSHMEM_PEER;
  522. } else if (strncmp(s->role, "master", 7) == 0) {
  523. s->role_val = IVSHMEM_MASTER;
  524. } else {
  525. fprintf(stderr, "ivshmem: 'role' must be 'peer' or 'master'\n");
  526. exit(1);
  527. }
  528. } else {
  529. s->role_val = IVSHMEM_MASTER; /* default */
  530. }
  531. if (s->role_val == IVSHMEM_PEER) {
  532. error_set(&s->migration_blocker, QERR_DEVICE_FEATURE_BLOCKS_MIGRATION,
  533. "peer mode", "ivshmem");
  534. migrate_add_blocker(s->migration_blocker);
  535. }
  536. pci_conf = s->dev.config;
  537. pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
  538. pci_config_set_interrupt_pin(pci_conf, 1);
  539. s->shm_fd = 0;
  540. memory_region_init_io(&s->ivshmem_mmio, &ivshmem_mmio_ops, s,
  541. "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
  542. /* region for registers*/
  543. pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
  544. &s->ivshmem_mmio);
  545. memory_region_init(&s->bar, "ivshmem-bar2-container", s->ivshmem_size);
  546. if ((s->server_chr != NULL) &&
  547. (strncmp(s->server_chr->filename, "unix:", 5) == 0)) {
  548. /* if we get a UNIX socket as the parameter we will talk
  549. * to the ivshmem server to receive the memory region */
  550. if (s->shmobj != NULL) {
  551. fprintf(stderr, "WARNING: do not specify both 'chardev' "
  552. "and 'shm' with ivshmem\n");
  553. }
  554. IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
  555. s->server_chr->filename);
  556. if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
  557. ivshmem_setup_msi(s);
  558. }
  559. /* we allocate enough space for 16 guests and grow as needed */
  560. s->nb_peers = 16;
  561. s->vm_id = -1;
  562. /* allocate/initialize space for interrupt handling */
  563. s->peers = g_malloc0(s->nb_peers * sizeof(Peer));
  564. pci_register_bar(&s->dev, 2,
  565. PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
  566. s->eventfd_chr = g_malloc0(s->vectors * sizeof(CharDriverState *));
  567. qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
  568. ivshmem_event, s);
  569. } else {
  570. /* just map the file immediately, we're not using a server */
  571. int fd;
  572. if (s->shmobj == NULL) {
  573. fprintf(stderr, "Must specify 'chardev' or 'shm' to ivshmem\n");
  574. }
  575. IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
  576. /* try opening with O_EXCL and if it succeeds zero the memory
  577. * by truncating to 0 */
  578. if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
  579. S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
  580. /* truncate file to length PCI device's memory */
  581. if (ftruncate(fd, s->ivshmem_size) != 0) {
  582. fprintf(stderr, "ivshmem: could not truncate shared file\n");
  583. }
  584. } else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
  585. S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
  586. fprintf(stderr, "ivshmem: could not open shared file\n");
  587. exit(-1);
  588. }
  589. if (check_shm_size(s, fd) == -1) {
  590. exit(-1);
  591. }
  592. create_shared_memory_BAR(s, fd);
  593. }
  594. s->dev.config_write = ivshmem_write_config;
  595. return 0;
  596. }
  597. static void pci_ivshmem_uninit(PCIDevice *dev)
  598. {
  599. IVShmemState *s = DO_UPCAST(IVShmemState, dev, dev);
  600. if (s->migration_blocker) {
  601. migrate_del_blocker(s->migration_blocker);
  602. error_free(s->migration_blocker);
  603. }
  604. memory_region_destroy(&s->ivshmem_mmio);
  605. memory_region_del_subregion(&s->bar, &s->ivshmem);
  606. vmstate_unregister_ram(&s->ivshmem, &s->dev.qdev);
  607. memory_region_destroy(&s->ivshmem);
  608. memory_region_destroy(&s->bar);
  609. unregister_savevm(&dev->qdev, "ivshmem", s);
  610. }
  611. static Property ivshmem_properties[] = {
  612. DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
  613. DEFINE_PROP_STRING("size", IVShmemState, sizearg),
  614. DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
  615. DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
  616. DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
  617. DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
  618. DEFINE_PROP_STRING("role", IVShmemState, role),
  619. DEFINE_PROP_END_OF_LIST(),
  620. };
  621. static void ivshmem_class_init(ObjectClass *klass, void *data)
  622. {
  623. DeviceClass *dc = DEVICE_CLASS(klass);
  624. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  625. k->init = pci_ivshmem_init;
  626. k->exit = pci_ivshmem_uninit;
  627. k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
  628. k->device_id = 0x1110;
  629. k->class_id = PCI_CLASS_MEMORY_RAM;
  630. dc->reset = ivshmem_reset;
  631. dc->props = ivshmem_properties;
  632. }
  633. static TypeInfo ivshmem_info = {
  634. .name = "ivshmem",
  635. .parent = TYPE_PCI_DEVICE,
  636. .instance_size = sizeof(IVShmemState),
  637. .class_init = ivshmem_class_init,
  638. };
  639. static void ivshmem_register_types(void)
  640. {
  641. type_register_static(&ivshmem_info);
  642. }
  643. type_init(ivshmem_register_types)