cpu-common.h 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117
  1. #ifndef CPU_COMMON_H
  2. #define CPU_COMMON_H 1
  3. /* CPU interfaces that are target independent. */
  4. #include "targphys.h"
  5. #ifndef NEED_CPU_H
  6. #include "poison.h"
  7. #endif
  8. #include "bswap.h"
  9. #include "qemu-queue.h"
  10. #if !defined(CONFIG_USER_ONLY)
  11. enum device_endian {
  12. DEVICE_NATIVE_ENDIAN,
  13. DEVICE_BIG_ENDIAN,
  14. DEVICE_LITTLE_ENDIAN,
  15. };
  16. /* address in the RAM (different from a physical address) */
  17. #if defined(CONFIG_XEN_BACKEND) && TARGET_PHYS_ADDR_BITS == 64
  18. typedef uint64_t ram_addr_t;
  19. # define RAM_ADDR_MAX UINT64_MAX
  20. # define RAM_ADDR_FMT "%" PRIx64
  21. #else
  22. typedef uintptr_t ram_addr_t;
  23. # define RAM_ADDR_MAX UINTPTR_MAX
  24. # define RAM_ADDR_FMT "%" PRIxPTR
  25. #endif
  26. /* memory API */
  27. typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
  28. typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
  29. void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
  30. /* This should only be used for ram local to a device. */
  31. void *qemu_get_ram_ptr(ram_addr_t addr);
  32. void *qemu_ram_ptr_length(ram_addr_t addr, ram_addr_t *size);
  33. /* Same but slower, to use for migration, where the order of
  34. * RAMBlocks must not change. */
  35. void *qemu_safe_ram_ptr(ram_addr_t addr);
  36. void qemu_put_ram_ptr(void *addr);
  37. /* This should not be used by devices. */
  38. int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
  39. ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
  40. void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
  41. void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
  42. int len, int is_write);
  43. static inline void cpu_physical_memory_read(target_phys_addr_t addr,
  44. void *buf, int len)
  45. {
  46. cpu_physical_memory_rw(addr, buf, len, 0);
  47. }
  48. static inline void cpu_physical_memory_write(target_phys_addr_t addr,
  49. const void *buf, int len)
  50. {
  51. cpu_physical_memory_rw(addr, (void *)buf, len, 1);
  52. }
  53. void *cpu_physical_memory_map(target_phys_addr_t addr,
  54. target_phys_addr_t *plen,
  55. int is_write);
  56. void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
  57. int is_write, target_phys_addr_t access_len);
  58. void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
  59. void cpu_unregister_map_client(void *cookie);
  60. bool cpu_physical_memory_is_io(target_phys_addr_t phys_addr);
  61. /* Coalesced MMIO regions are areas where write operations can be reordered.
  62. * This usually implies that write operations are side-effect free. This allows
  63. * batching which can make a major impact on performance when using
  64. * virtualization.
  65. */
  66. void qemu_flush_coalesced_mmio_buffer(void);
  67. uint32_t ldub_phys(target_phys_addr_t addr);
  68. uint32_t lduw_le_phys(target_phys_addr_t addr);
  69. uint32_t lduw_be_phys(target_phys_addr_t addr);
  70. uint32_t ldl_le_phys(target_phys_addr_t addr);
  71. uint32_t ldl_be_phys(target_phys_addr_t addr);
  72. uint64_t ldq_le_phys(target_phys_addr_t addr);
  73. uint64_t ldq_be_phys(target_phys_addr_t addr);
  74. void stb_phys(target_phys_addr_t addr, uint32_t val);
  75. void stw_le_phys(target_phys_addr_t addr, uint32_t val);
  76. void stw_be_phys(target_phys_addr_t addr, uint32_t val);
  77. void stl_le_phys(target_phys_addr_t addr, uint32_t val);
  78. void stl_be_phys(target_phys_addr_t addr, uint32_t val);
  79. void stq_le_phys(target_phys_addr_t addr, uint64_t val);
  80. void stq_be_phys(target_phys_addr_t addr, uint64_t val);
  81. #ifdef NEED_CPU_H
  82. uint32_t lduw_phys(target_phys_addr_t addr);
  83. uint32_t ldl_phys(target_phys_addr_t addr);
  84. uint64_t ldq_phys(target_phys_addr_t addr);
  85. void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
  86. void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
  87. void stw_phys(target_phys_addr_t addr, uint32_t val);
  88. void stl_phys(target_phys_addr_t addr, uint32_t val);
  89. void stq_phys(target_phys_addr_t addr, uint64_t val);
  90. #endif
  91. void cpu_physical_memory_write_rom(target_phys_addr_t addr,
  92. const uint8_t *buf, int len);
  93. extern struct MemoryRegion io_mem_ram;
  94. extern struct MemoryRegion io_mem_rom;
  95. extern struct MemoryRegion io_mem_unassigned;
  96. extern struct MemoryRegion io_mem_notdirty;
  97. #endif
  98. #endif /* !CPU_COMMON_H */