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cpu-common.h 4.2 KB

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  1. #ifndef CPU_COMMON_H
  2. #define CPU_COMMON_H 1
  3. /* CPU interfaces that are target independent. */
  4. #ifdef TARGET_PHYS_ADDR_BITS
  5. #include "targphys.h"
  6. #endif
  7. #ifndef NEED_CPU_H
  8. #include "poison.h"
  9. #endif
  10. #include "bswap.h"
  11. #include "qemu-queue.h"
  12. #if !defined(CONFIG_USER_ONLY)
  13. enum device_endian {
  14. DEVICE_NATIVE_ENDIAN,
  15. DEVICE_BIG_ENDIAN,
  16. DEVICE_LITTLE_ENDIAN,
  17. };
  18. /* address in the RAM (different from a physical address) */
  19. #if defined(CONFIG_XEN_BACKEND) && TARGET_PHYS_ADDR_BITS == 64
  20. typedef uint64_t ram_addr_t;
  21. # define RAM_ADDR_MAX UINT64_MAX
  22. # define RAM_ADDR_FMT "%" PRIx64
  23. #else
  24. typedef uintptr_t ram_addr_t;
  25. # define RAM_ADDR_MAX UINTPTR_MAX
  26. # define RAM_ADDR_FMT "%" PRIxPTR
  27. #endif
  28. /* memory API */
  29. typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
  30. typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
  31. void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
  32. /* This should only be used for ram local to a device. */
  33. void *qemu_get_ram_ptr(ram_addr_t addr);
  34. void *qemu_ram_ptr_length(ram_addr_t addr, ram_addr_t *size);
  35. /* Same but slower, to use for migration, where the order of
  36. * RAMBlocks must not change. */
  37. void *qemu_safe_ram_ptr(ram_addr_t addr);
  38. void qemu_put_ram_ptr(void *addr);
  39. /* This should not be used by devices. */
  40. int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
  41. ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
  42. void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
  43. void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
  44. int len, int is_write);
  45. static inline void cpu_physical_memory_read(target_phys_addr_t addr,
  46. void *buf, int len)
  47. {
  48. cpu_physical_memory_rw(addr, buf, len, 0);
  49. }
  50. static inline void cpu_physical_memory_write(target_phys_addr_t addr,
  51. const void *buf, int len)
  52. {
  53. cpu_physical_memory_rw(addr, (void *)buf, len, 1);
  54. }
  55. void *cpu_physical_memory_map(target_phys_addr_t addr,
  56. target_phys_addr_t *plen,
  57. int is_write);
  58. void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
  59. int is_write, target_phys_addr_t access_len);
  60. void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
  61. void cpu_unregister_map_client(void *cookie);
  62. /* Coalesced MMIO regions are areas where write operations can be reordered.
  63. * This usually implies that write operations are side-effect free. This allows
  64. * batching which can make a major impact on performance when using
  65. * virtualization.
  66. */
  67. void qemu_flush_coalesced_mmio_buffer(void);
  68. uint32_t ldub_phys(target_phys_addr_t addr);
  69. uint32_t lduw_le_phys(target_phys_addr_t addr);
  70. uint32_t lduw_be_phys(target_phys_addr_t addr);
  71. uint32_t ldl_le_phys(target_phys_addr_t addr);
  72. uint32_t ldl_be_phys(target_phys_addr_t addr);
  73. uint64_t ldq_le_phys(target_phys_addr_t addr);
  74. uint64_t ldq_be_phys(target_phys_addr_t addr);
  75. void stb_phys(target_phys_addr_t addr, uint32_t val);
  76. void stw_le_phys(target_phys_addr_t addr, uint32_t val);
  77. void stw_be_phys(target_phys_addr_t addr, uint32_t val);
  78. void stl_le_phys(target_phys_addr_t addr, uint32_t val);
  79. void stl_be_phys(target_phys_addr_t addr, uint32_t val);
  80. void stq_le_phys(target_phys_addr_t addr, uint64_t val);
  81. void stq_be_phys(target_phys_addr_t addr, uint64_t val);
  82. #ifdef NEED_CPU_H
  83. uint32_t lduw_phys(target_phys_addr_t addr);
  84. uint32_t ldl_phys(target_phys_addr_t addr);
  85. uint64_t ldq_phys(target_phys_addr_t addr);
  86. void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
  87. void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
  88. void stw_phys(target_phys_addr_t addr, uint32_t val);
  89. void stl_phys(target_phys_addr_t addr, uint32_t val);
  90. void stq_phys(target_phys_addr_t addr, uint64_t val);
  91. #endif
  92. void cpu_physical_memory_write_rom(target_phys_addr_t addr,
  93. const uint8_t *buf, int len);
  94. extern struct MemoryRegion io_mem_ram;
  95. extern struct MemoryRegion io_mem_rom;
  96. extern struct MemoryRegion io_mem_unassigned;
  97. extern struct MemoryRegion io_mem_notdirty;
  98. #endif
  99. #endif /* !CPU_COMMON_H */