xilinx.h 2.7 KB

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  1. #include "qemu-common.h"
  2. #include "net.h"
  3. static inline DeviceState *
  4. xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr)
  5. {
  6. DeviceState *dev;
  7. dev = qdev_create(NULL, "xilinx,intc");
  8. qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
  9. qdev_init_nofail(dev);
  10. sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
  11. sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
  12. return dev;
  13. }
  14. /* OPB Timer/Counter. */
  15. static inline DeviceState *
  16. xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int nr, int freq)
  17. {
  18. DeviceState *dev;
  19. dev = qdev_create(NULL, "xilinx,timer");
  20. qdev_prop_set_uint32(dev, "nr-timers", nr);
  21. qdev_prop_set_uint32(dev, "frequency", freq);
  22. qdev_init_nofail(dev);
  23. sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
  24. sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
  25. return dev;
  26. }
  27. /* XPS Ethernet Lite MAC. */
  28. static inline DeviceState *
  29. xilinx_ethlite_create(NICInfo *nd, target_phys_addr_t base, qemu_irq irq,
  30. int txpingpong, int rxpingpong)
  31. {
  32. DeviceState *dev;
  33. qemu_check_nic_model(nd, "xilinx-ethlite");
  34. dev = qdev_create(NULL, "xilinx,ethlite");
  35. qdev_set_nic_properties(dev, nd);
  36. qdev_prop_set_uint32(dev, "txpingpong", txpingpong);
  37. qdev_prop_set_uint32(dev, "rxpingpong", rxpingpong);
  38. qdev_init_nofail(dev);
  39. sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
  40. sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
  41. return dev;
  42. }
  43. static inline DeviceState *
  44. xilinx_axiethernet_create(void *dmach,
  45. NICInfo *nd, target_phys_addr_t base, qemu_irq irq,
  46. int txmem, int rxmem)
  47. {
  48. DeviceState *dev;
  49. qemu_check_nic_model(nd, "xilinx-axienet");
  50. dev = qdev_create(NULL, "xilinx,axienet");
  51. qdev_set_nic_properties(dev, nd);
  52. qdev_prop_set_uint32(dev, "c_rxmem", rxmem);
  53. qdev_prop_set_uint32(dev, "c_txmem", txmem);
  54. qdev_prop_set_ptr(dev, "dmach", dmach);
  55. qdev_init_nofail(dev);
  56. sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
  57. sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
  58. return dev;
  59. }
  60. static inline DeviceState *
  61. xilinx_axiethernetdma_create(void *dmach,
  62. target_phys_addr_t base, qemu_irq irq,
  63. qemu_irq irq2, int freqhz)
  64. {
  65. DeviceState *dev = NULL;
  66. dev = qdev_create(NULL, "xilinx,axidma");
  67. qdev_prop_set_uint32(dev, "freqhz", freqhz);
  68. qdev_prop_set_ptr(dev, "dmach", dmach);
  69. qdev_init_nofail(dev);
  70. sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
  71. sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq2);
  72. sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq);
  73. return dev;
  74. }