pc.h 7.1 KB

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  1. #ifndef HW_PC_H
  2. #define HW_PC_H
  3. #include "qemu-common.h"
  4. #include "memory.h"
  5. #include "ioport.h"
  6. #include "isa.h"
  7. #include "fdc.h"
  8. #include "net.h"
  9. #include "memory.h"
  10. #include "ioapic.h"
  11. /* PC-style peripherals (also used by other machines). */
  12. /* serial.c */
  13. SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  14. CharDriverState *chr);
  15. SerialState *serial_mm_init(MemoryRegion *address_space,
  16. target_phys_addr_t base, int it_shift,
  17. qemu_irq irq, int baudbase,
  18. CharDriverState *chr, enum device_endian);
  19. static inline bool serial_isa_init(int index, CharDriverState *chr)
  20. {
  21. ISADevice *dev;
  22. dev = isa_try_create("isa-serial");
  23. if (!dev) {
  24. return false;
  25. }
  26. qdev_prop_set_uint32(&dev->qdev, "index", index);
  27. qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  28. if (qdev_init(&dev->qdev) < 0) {
  29. return false;
  30. }
  31. return true;
  32. }
  33. void serial_set_frequency(SerialState *s, uint32_t frequency);
  34. /* parallel.c */
  35. static inline bool parallel_init(int index, CharDriverState *chr)
  36. {
  37. ISADevice *dev;
  38. dev = isa_try_create("isa-parallel");
  39. if (!dev) {
  40. return false;
  41. }
  42. qdev_prop_set_uint32(&dev->qdev, "index", index);
  43. qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  44. if (qdev_init(&dev->qdev) < 0) {
  45. return false;
  46. }
  47. return true;
  48. }
  49. bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
  50. CharDriverState *chr);
  51. /* i8259.c */
  52. typedef struct PicState PicState;
  53. extern PicState *isa_pic;
  54. qemu_irq *i8259_init(qemu_irq parent_irq);
  55. int pic_read_irq(PicState *s);
  56. int pic_get_output(PicState *s);
  57. void pic_info(Monitor *mon);
  58. void irq_info(Monitor *mon);
  59. /* Global System Interrupts */
  60. #define GSI_NUM_PINS IOAPIC_NUM_PINS
  61. typedef struct GSIState {
  62. qemu_irq i8259_irq[ISA_NUM_IRQS];
  63. qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
  64. } GSIState;
  65. void gsi_handler(void *opaque, int n, int level);
  66. /* i8254.c */
  67. #define PIT_FREQ 1193182
  68. static inline ISADevice *pit_init(int base, int irq)
  69. {
  70. ISADevice *dev;
  71. dev = isa_create("isa-pit");
  72. qdev_prop_set_uint32(&dev->qdev, "iobase", base);
  73. qdev_prop_set_uint32(&dev->qdev, "irq", irq);
  74. qdev_init_nofail(&dev->qdev);
  75. return dev;
  76. }
  77. void pit_set_gate(ISADevice *dev, int channel, int val);
  78. int pit_get_gate(ISADevice *dev, int channel);
  79. int pit_get_initial_count(ISADevice *dev, int channel);
  80. int pit_get_mode(ISADevice *dev, int channel);
  81. int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
  82. void hpet_pit_disable(void);
  83. void hpet_pit_enable(void);
  84. /* vmport.c */
  85. static inline void vmport_init(void)
  86. {
  87. isa_create_simple("vmport");
  88. }
  89. void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
  90. void vmmouse_get_data(uint32_t *data);
  91. void vmmouse_set_data(const uint32_t *data);
  92. /* pckbd.c */
  93. void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
  94. void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
  95. MemoryRegion *region, ram_addr_t size,
  96. target_phys_addr_t mask);
  97. void i8042_isa_mouse_fake_event(void *opaque);
  98. void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
  99. /* pc.c */
  100. extern int fd_bootchk;
  101. void pc_register_ferr_irq(qemu_irq irq);
  102. void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
  103. void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
  104. void pc_cpus_init(const char *cpu_model);
  105. void pc_memory_init(MemoryRegion *system_memory,
  106. const char *kernel_filename,
  107. const char *kernel_cmdline,
  108. const char *initrd_filename,
  109. ram_addr_t below_4g_mem_size,
  110. ram_addr_t above_4g_mem_size,
  111. MemoryRegion *rom_memory,
  112. MemoryRegion **ram_memory);
  113. qemu_irq *pc_allocate_cpu_irq(void);
  114. void pc_vga_init(PCIBus *pci_bus);
  115. void pc_basic_device_init(qemu_irq *gsi,
  116. ISADevice **rtc_state,
  117. ISADevice **floppy,
  118. bool no_vmport);
  119. void pc_init_ne2k_isa(NICInfo *nd);
  120. void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
  121. const char *boot_device,
  122. ISADevice *floppy, BusState *ide0, BusState *ide1,
  123. ISADevice *s);
  124. void pc_pci_device_init(PCIBus *pci_bus);
  125. typedef void (*cpu_set_smm_t)(int smm, void *arg);
  126. void cpu_smm_register(cpu_set_smm_t callback, void *arg);
  127. /* acpi.c */
  128. extern int acpi_enabled;
  129. extern char *acpi_tables;
  130. extern size_t acpi_tables_len;
  131. void acpi_bios_init(void);
  132. int acpi_table_add(const char *table_desc);
  133. /* acpi_piix.c */
  134. i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
  135. qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
  136. int kvm_enabled);
  137. void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
  138. /* hpet.c */
  139. extern int no_hpet;
  140. /* pcspk.c */
  141. void pcspk_init(ISADevice *pit);
  142. int pcspk_audio_init(qemu_irq *pic);
  143. /* piix_pci.c */
  144. struct PCII440FXState;
  145. typedef struct PCII440FXState PCII440FXState;
  146. PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
  147. qemu_irq *pic,
  148. MemoryRegion *address_space_mem,
  149. MemoryRegion *address_space_io,
  150. ram_addr_t ram_size,
  151. target_phys_addr_t pci_hole_start,
  152. target_phys_addr_t pci_hole_size,
  153. target_phys_addr_t pci_hole64_start,
  154. target_phys_addr_t pci_hole64_size,
  155. MemoryRegion *pci_memory,
  156. MemoryRegion *ram_memory);
  157. /* piix4.c */
  158. extern PCIDevice *piix4_dev;
  159. int piix4_init(PCIBus *bus, int devfn);
  160. /* vga.c */
  161. enum vga_retrace_method {
  162. VGA_RETRACE_DUMB,
  163. VGA_RETRACE_PRECISE
  164. };
  165. extern enum vga_retrace_method vga_retrace_method;
  166. static inline int isa_vga_init(void)
  167. {
  168. ISADevice *dev;
  169. dev = isa_try_create("isa-vga");
  170. if (!dev) {
  171. fprintf(stderr, "Warning: isa-vga not available\n");
  172. return 0;
  173. }
  174. qdev_init_nofail(&dev->qdev);
  175. return 1;
  176. }
  177. int pci_vga_init(PCIBus *bus);
  178. int isa_vga_mm_init(target_phys_addr_t vram_base,
  179. target_phys_addr_t ctrl_base, int it_shift,
  180. MemoryRegion *address_space);
  181. /* cirrus_vga.c */
  182. void pci_cirrus_vga_init(PCIBus *bus);
  183. void isa_cirrus_vga_init(MemoryRegion *address_space);
  184. /* ne2000.c */
  185. static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
  186. {
  187. ISADevice *dev;
  188. qemu_check_nic_model(nd, "ne2k_isa");
  189. dev = isa_try_create("ne2k_isa");
  190. if (!dev) {
  191. return false;
  192. }
  193. qdev_prop_set_uint32(&dev->qdev, "iobase", base);
  194. qdev_prop_set_uint32(&dev->qdev, "irq", irq);
  195. qdev_set_nic_properties(&dev->qdev, nd);
  196. qdev_init_nofail(&dev->qdev);
  197. return true;
  198. }
  199. /* e820 types */
  200. #define E820_RAM 1
  201. #define E820_RESERVED 2
  202. #define E820_ACPI 3
  203. #define E820_NVS 4
  204. #define E820_UNUSABLE 5
  205. int e820_add_entry(uint64_t, uint64_t, uint32_t);
  206. #endif