dis-asm.h 18 KB

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  1. /* Interface between the opcode library and its callers.
  2. Written by Cygnus Support, 1993.
  3. The opcode library (libopcodes.a) provides instruction decoders for
  4. a large variety of instruction sets, callable with an identical
  5. interface, for making instruction-processing programs more independent
  6. of the instruction set being processed. */
  7. #ifndef DIS_ASM_H
  8. #define DIS_ASM_H
  9. #include "qemu-common.h"
  10. typedef void *PTR;
  11. typedef uint64_t bfd_vma;
  12. typedef int64_t bfd_signed_vma;
  13. typedef uint8_t bfd_byte;
  14. #define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
  15. #define snprintf_vma(s,ss,x) snprintf (s, ss, "%0" PRIx64, x)
  16. #define BFD64
  17. enum bfd_flavour {
  18. bfd_target_unknown_flavour,
  19. bfd_target_aout_flavour,
  20. bfd_target_coff_flavour,
  21. bfd_target_ecoff_flavour,
  22. bfd_target_elf_flavour,
  23. bfd_target_ieee_flavour,
  24. bfd_target_nlm_flavour,
  25. bfd_target_oasys_flavour,
  26. bfd_target_tekhex_flavour,
  27. bfd_target_srec_flavour,
  28. bfd_target_ihex_flavour,
  29. bfd_target_som_flavour,
  30. bfd_target_os9k_flavour,
  31. bfd_target_versados_flavour,
  32. bfd_target_msdos_flavour,
  33. bfd_target_evax_flavour
  34. };
  35. enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
  36. enum bfd_architecture
  37. {
  38. bfd_arch_unknown, /* File arch not known */
  39. bfd_arch_obscure, /* Arch known, not one of these */
  40. bfd_arch_m68k, /* Motorola 68xxx */
  41. #define bfd_mach_m68000 1
  42. #define bfd_mach_m68008 2
  43. #define bfd_mach_m68010 3
  44. #define bfd_mach_m68020 4
  45. #define bfd_mach_m68030 5
  46. #define bfd_mach_m68040 6
  47. #define bfd_mach_m68060 7
  48. #define bfd_mach_cpu32 8
  49. #define bfd_mach_mcf5200 9
  50. #define bfd_mach_mcf5206e 10
  51. #define bfd_mach_mcf5307 11
  52. #define bfd_mach_mcf5407 12
  53. #define bfd_mach_mcf528x 13
  54. #define bfd_mach_mcfv4e 14
  55. #define bfd_mach_mcf521x 15
  56. #define bfd_mach_mcf5249 16
  57. #define bfd_mach_mcf547x 17
  58. #define bfd_mach_mcf548x 18
  59. bfd_arch_vax, /* DEC Vax */
  60. bfd_arch_i960, /* Intel 960 */
  61. /* The order of the following is important.
  62. lower number indicates a machine type that
  63. only accepts a subset of the instructions
  64. available to machines with higher numbers.
  65. The exception is the "ca", which is
  66. incompatible with all other machines except
  67. "core". */
  68. #define bfd_mach_i960_core 1
  69. #define bfd_mach_i960_ka_sa 2
  70. #define bfd_mach_i960_kb_sb 3
  71. #define bfd_mach_i960_mc 4
  72. #define bfd_mach_i960_xa 5
  73. #define bfd_mach_i960_ca 6
  74. #define bfd_mach_i960_jx 7
  75. #define bfd_mach_i960_hx 8
  76. bfd_arch_a29k, /* AMD 29000 */
  77. bfd_arch_sparc, /* SPARC */
  78. #define bfd_mach_sparc 1
  79. /* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
  80. #define bfd_mach_sparc_sparclet 2
  81. #define bfd_mach_sparc_sparclite 3
  82. #define bfd_mach_sparc_v8plus 4
  83. #define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */
  84. #define bfd_mach_sparc_sparclite_le 6
  85. #define bfd_mach_sparc_v9 7
  86. #define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */
  87. #define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */
  88. #define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */
  89. /* Nonzero if MACH has the v9 instruction set. */
  90. #define bfd_mach_sparc_v9_p(mach) \
  91. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
  92. && (mach) != bfd_mach_sparc_sparclite_le)
  93. bfd_arch_mips, /* MIPS Rxxxx */
  94. #define bfd_mach_mips3000 3000
  95. #define bfd_mach_mips3900 3900
  96. #define bfd_mach_mips4000 4000
  97. #define bfd_mach_mips4010 4010
  98. #define bfd_mach_mips4100 4100
  99. #define bfd_mach_mips4300 4300
  100. #define bfd_mach_mips4400 4400
  101. #define bfd_mach_mips4600 4600
  102. #define bfd_mach_mips4650 4650
  103. #define bfd_mach_mips5000 5000
  104. #define bfd_mach_mips6000 6000
  105. #define bfd_mach_mips8000 8000
  106. #define bfd_mach_mips10000 10000
  107. #define bfd_mach_mips16 16
  108. bfd_arch_i386, /* Intel 386 */
  109. #define bfd_mach_i386_i386 0
  110. #define bfd_mach_i386_i8086 1
  111. #define bfd_mach_i386_i386_intel_syntax 2
  112. #define bfd_mach_x86_64 3
  113. #define bfd_mach_x86_64_intel_syntax 4
  114. bfd_arch_we32k, /* AT&T WE32xxx */
  115. bfd_arch_tahoe, /* CCI/Harris Tahoe */
  116. bfd_arch_i860, /* Intel 860 */
  117. bfd_arch_romp, /* IBM ROMP PC/RT */
  118. bfd_arch_alliant, /* Alliant */
  119. bfd_arch_convex, /* Convex */
  120. bfd_arch_m88k, /* Motorola 88xxx */
  121. bfd_arch_pyramid, /* Pyramid Technology */
  122. bfd_arch_h8300, /* Hitachi H8/300 */
  123. #define bfd_mach_h8300 1
  124. #define bfd_mach_h8300h 2
  125. #define bfd_mach_h8300s 3
  126. bfd_arch_powerpc, /* PowerPC */
  127. #define bfd_mach_ppc 0
  128. #define bfd_mach_ppc64 1
  129. #define bfd_mach_ppc_403 403
  130. #define bfd_mach_ppc_403gc 4030
  131. #define bfd_mach_ppc_e500 500
  132. #define bfd_mach_ppc_505 505
  133. #define bfd_mach_ppc_601 601
  134. #define bfd_mach_ppc_602 602
  135. #define bfd_mach_ppc_603 603
  136. #define bfd_mach_ppc_ec603e 6031
  137. #define bfd_mach_ppc_604 604
  138. #define bfd_mach_ppc_620 620
  139. #define bfd_mach_ppc_630 630
  140. #define bfd_mach_ppc_750 750
  141. #define bfd_mach_ppc_860 860
  142. #define bfd_mach_ppc_a35 35
  143. #define bfd_mach_ppc_rs64ii 642
  144. #define bfd_mach_ppc_rs64iii 643
  145. #define bfd_mach_ppc_7400 7400
  146. bfd_arch_rs6000, /* IBM RS/6000 */
  147. bfd_arch_hppa, /* HP PA RISC */
  148. #define bfd_mach_hppa10 10
  149. #define bfd_mach_hppa11 11
  150. #define bfd_mach_hppa20 20
  151. #define bfd_mach_hppa20w 25
  152. bfd_arch_d10v, /* Mitsubishi D10V */
  153. bfd_arch_z8k, /* Zilog Z8000 */
  154. #define bfd_mach_z8001 1
  155. #define bfd_mach_z8002 2
  156. bfd_arch_h8500, /* Hitachi H8/500 */
  157. bfd_arch_sh, /* Hitachi SH */
  158. #define bfd_mach_sh 1
  159. #define bfd_mach_sh2 0x20
  160. #define bfd_mach_sh_dsp 0x2d
  161. #define bfd_mach_sh2a 0x2a
  162. #define bfd_mach_sh2a_nofpu 0x2b
  163. #define bfd_mach_sh2e 0x2e
  164. #define bfd_mach_sh3 0x30
  165. #define bfd_mach_sh3_nommu 0x31
  166. #define bfd_mach_sh3_dsp 0x3d
  167. #define bfd_mach_sh3e 0x3e
  168. #define bfd_mach_sh4 0x40
  169. #define bfd_mach_sh4_nofpu 0x41
  170. #define bfd_mach_sh4_nommu_nofpu 0x42
  171. #define bfd_mach_sh4a 0x4a
  172. #define bfd_mach_sh4a_nofpu 0x4b
  173. #define bfd_mach_sh4al_dsp 0x4d
  174. #define bfd_mach_sh5 0x50
  175. bfd_arch_alpha, /* Dec Alpha */
  176. #define bfd_mach_alpha 1
  177. #define bfd_mach_alpha_ev4 0x10
  178. #define bfd_mach_alpha_ev5 0x20
  179. #define bfd_mach_alpha_ev6 0x30
  180. bfd_arch_arm, /* Advanced Risc Machines ARM */
  181. #define bfd_mach_arm_unknown 0
  182. #define bfd_mach_arm_2 1
  183. #define bfd_mach_arm_2a 2
  184. #define bfd_mach_arm_3 3
  185. #define bfd_mach_arm_3M 4
  186. #define bfd_mach_arm_4 5
  187. #define bfd_mach_arm_4T 6
  188. #define bfd_mach_arm_5 7
  189. #define bfd_mach_arm_5T 8
  190. #define bfd_mach_arm_5TE 9
  191. #define bfd_mach_arm_XScale 10
  192. #define bfd_mach_arm_ep9312 11
  193. #define bfd_mach_arm_iWMMXt 12
  194. #define bfd_mach_arm_iWMMXt2 13
  195. bfd_arch_ns32k, /* National Semiconductors ns32000 */
  196. bfd_arch_w65, /* WDC 65816 */
  197. bfd_arch_tic30, /* Texas Instruments TMS320C30 */
  198. bfd_arch_v850, /* NEC V850 */
  199. #define bfd_mach_v850 0
  200. bfd_arch_arc, /* Argonaut RISC Core */
  201. #define bfd_mach_arc_base 0
  202. bfd_arch_m32r, /* Mitsubishi M32R/D */
  203. #define bfd_mach_m32r 0 /* backwards compatibility */
  204. bfd_arch_mn10200, /* Matsushita MN10200 */
  205. bfd_arch_mn10300, /* Matsushita MN10300 */
  206. bfd_arch_cris, /* Axis CRIS */
  207. #define bfd_mach_cris_v0_v10 255
  208. #define bfd_mach_cris_v32 32
  209. #define bfd_mach_cris_v10_v32 1032
  210. bfd_arch_microblaze, /* Xilinx MicroBlaze. */
  211. bfd_arch_ia64, /* HP/Intel ia64 */
  212. #define bfd_mach_ia64_elf64 64
  213. #define bfd_mach_ia64_elf32 32
  214. bfd_arch_last
  215. };
  216. #define bfd_mach_s390_31 31
  217. #define bfd_mach_s390_64 64
  218. typedef struct symbol_cache_entry
  219. {
  220. const char *name;
  221. union
  222. {
  223. PTR p;
  224. bfd_vma i;
  225. } udata;
  226. } asymbol;
  227. enum dis_insn_type {
  228. dis_noninsn, /* Not a valid instruction */
  229. dis_nonbranch, /* Not a branch instruction */
  230. dis_branch, /* Unconditional branch */
  231. dis_condbranch, /* Conditional branch */
  232. dis_jsr, /* Jump to subroutine */
  233. dis_condjsr, /* Conditional jump to subroutine */
  234. dis_dref, /* Data reference instruction */
  235. dis_dref2 /* Two data references in instruction */
  236. };
  237. /* This struct is passed into the instruction decoding routine,
  238. and is passed back out into each callback. The various fields are used
  239. for conveying information from your main routine into your callbacks,
  240. for passing information into the instruction decoders (such as the
  241. addresses of the callback functions), or for passing information
  242. back from the instruction decoders to their callers.
  243. It must be initialized before it is first passed; this can be done
  244. by hand, or using one of the initialization macros below. */
  245. typedef struct disassemble_info {
  246. fprintf_function fprintf_func;
  247. FILE *stream;
  248. PTR application_data;
  249. /* Target description. We could replace this with a pointer to the bfd,
  250. but that would require one. There currently isn't any such requirement
  251. so to avoid introducing one we record these explicitly. */
  252. /* The bfd_flavour. This can be bfd_target_unknown_flavour. */
  253. enum bfd_flavour flavour;
  254. /* The bfd_arch value. */
  255. enum bfd_architecture arch;
  256. /* The bfd_mach value. */
  257. unsigned long mach;
  258. /* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
  259. enum bfd_endian endian;
  260. /* An array of pointers to symbols either at the location being disassembled
  261. or at the start of the function being disassembled. The array is sorted
  262. so that the first symbol is intended to be the one used. The others are
  263. present for any misc. purposes. This is not set reliably, but if it is
  264. not NULL, it is correct. */
  265. asymbol **symbols;
  266. /* Number of symbols in array. */
  267. int num_symbols;
  268. /* For use by the disassembler.
  269. The top 16 bits are reserved for public use (and are documented here).
  270. The bottom 16 bits are for the internal use of the disassembler. */
  271. unsigned long flags;
  272. #define INSN_HAS_RELOC 0x80000000
  273. PTR private_data;
  274. /* Function used to get bytes to disassemble. MEMADDR is the
  275. address of the stuff to be disassembled, MYADDR is the address to
  276. put the bytes in, and LENGTH is the number of bytes to read.
  277. INFO is a pointer to this struct.
  278. Returns an errno value or 0 for success. */
  279. int (*read_memory_func)
  280. (bfd_vma memaddr, bfd_byte *myaddr, int length,
  281. struct disassemble_info *info);
  282. /* Function which should be called if we get an error that we can't
  283. recover from. STATUS is the errno value from read_memory_func and
  284. MEMADDR is the address that we were trying to read. INFO is a
  285. pointer to this struct. */
  286. void (*memory_error_func)
  287. (int status, bfd_vma memaddr, struct disassemble_info *info);
  288. /* Function called to print ADDR. */
  289. void (*print_address_func)
  290. (bfd_vma addr, struct disassemble_info *info);
  291. /* Function called to determine if there is a symbol at the given ADDR.
  292. If there is, the function returns 1, otherwise it returns 0.
  293. This is used by ports which support an overlay manager where
  294. the overlay number is held in the top part of an address. In
  295. some circumstances we want to include the overlay number in the
  296. address, (normally because there is a symbol associated with
  297. that address), but sometimes we want to mask out the overlay bits. */
  298. int (* symbol_at_address_func)
  299. (bfd_vma addr, struct disassemble_info * info);
  300. /* These are for buffer_read_memory. */
  301. bfd_byte *buffer;
  302. bfd_vma buffer_vma;
  303. int buffer_length;
  304. /* This variable may be set by the instruction decoder. It suggests
  305. the number of bytes objdump should display on a single line. If
  306. the instruction decoder sets this, it should always set it to
  307. the same value in order to get reasonable looking output. */
  308. int bytes_per_line;
  309. /* the next two variables control the way objdump displays the raw data */
  310. /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
  311. /* output will look like this:
  312. 00: 00000000 00000000
  313. with the chunks displayed according to "display_endian". */
  314. int bytes_per_chunk;
  315. enum bfd_endian display_endian;
  316. /* Results from instruction decoders. Not all decoders yet support
  317. this information. This info is set each time an instruction is
  318. decoded, and is only valid for the last such instruction.
  319. To determine whether this decoder supports this information, set
  320. insn_info_valid to 0, decode an instruction, then check it. */
  321. char insn_info_valid; /* Branch info has been set. */
  322. char branch_delay_insns; /* How many sequential insn's will run before
  323. a branch takes effect. (0 = normal) */
  324. char data_size; /* Size of data reference in insn, in bytes */
  325. enum dis_insn_type insn_type; /* Type of instruction */
  326. bfd_vma target; /* Target address of branch or dref, if known;
  327. zero if unknown. */
  328. bfd_vma target2; /* Second target address for dref2 */
  329. /* Command line options specific to the target disassembler. */
  330. char * disassembler_options;
  331. } disassemble_info;
  332. /* Standard disassemblers. Disassemble one instruction at the given
  333. target address. Return number of bytes processed. */
  334. typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
  335. int print_insn_tci(bfd_vma, disassemble_info*);
  336. int print_insn_big_mips (bfd_vma, disassemble_info*);
  337. int print_insn_little_mips (bfd_vma, disassemble_info*);
  338. int print_insn_i386 (bfd_vma, disassemble_info*);
  339. int print_insn_m68k (bfd_vma, disassemble_info*);
  340. int print_insn_z8001 (bfd_vma, disassemble_info*);
  341. int print_insn_z8002 (bfd_vma, disassemble_info*);
  342. int print_insn_h8300 (bfd_vma, disassemble_info*);
  343. int print_insn_h8300h (bfd_vma, disassemble_info*);
  344. int print_insn_h8300s (bfd_vma, disassemble_info*);
  345. int print_insn_h8500 (bfd_vma, disassemble_info*);
  346. int print_insn_alpha (bfd_vma, disassemble_info*);
  347. disassembler_ftype arc_get_disassembler (int, int);
  348. int print_insn_arm (bfd_vma, disassemble_info*);
  349. int print_insn_sparc (bfd_vma, disassemble_info*);
  350. int print_insn_big_a29k (bfd_vma, disassemble_info*);
  351. int print_insn_little_a29k (bfd_vma, disassemble_info*);
  352. int print_insn_i960 (bfd_vma, disassemble_info*);
  353. int print_insn_sh (bfd_vma, disassemble_info*);
  354. int print_insn_shl (bfd_vma, disassemble_info*);
  355. int print_insn_hppa (bfd_vma, disassemble_info*);
  356. int print_insn_m32r (bfd_vma, disassemble_info*);
  357. int print_insn_m88k (bfd_vma, disassemble_info*);
  358. int print_insn_mn10200 (bfd_vma, disassemble_info*);
  359. int print_insn_mn10300 (bfd_vma, disassemble_info*);
  360. int print_insn_ns32k (bfd_vma, disassemble_info*);
  361. int print_insn_big_powerpc (bfd_vma, disassemble_info*);
  362. int print_insn_little_powerpc (bfd_vma, disassemble_info*);
  363. int print_insn_rs6000 (bfd_vma, disassemble_info*);
  364. int print_insn_w65 (bfd_vma, disassemble_info*);
  365. int print_insn_d10v (bfd_vma, disassemble_info*);
  366. int print_insn_v850 (bfd_vma, disassemble_info*);
  367. int print_insn_tic30 (bfd_vma, disassemble_info*);
  368. int print_insn_ppc (bfd_vma, disassemble_info*);
  369. int print_insn_s390 (bfd_vma, disassemble_info*);
  370. int print_insn_crisv32 (bfd_vma, disassemble_info*);
  371. int print_insn_crisv10 (bfd_vma, disassemble_info*);
  372. int print_insn_microblaze (bfd_vma, disassemble_info*);
  373. int print_insn_ia64 (bfd_vma, disassemble_info*);
  374. #if 0
  375. /* Fetch the disassembler for a given BFD, if that support is available. */
  376. disassembler_ftype disassembler(bfd *);
  377. #endif
  378. /* This block of definitions is for particular callers who read instructions
  379. into a buffer before calling the instruction decoder. */
  380. /* Here is a function which callers may wish to use for read_memory_func.
  381. It gets bytes from a buffer. */
  382. int buffer_read_memory(bfd_vma, bfd_byte *, int, struct disassemble_info *);
  383. /* This function goes with buffer_read_memory.
  384. It prints a message using info->fprintf_func and info->stream. */
  385. void perror_memory(int, bfd_vma, struct disassemble_info *);
  386. /* Just print the address in hex. This is included for completeness even
  387. though both GDB and objdump provide their own (to print symbolic
  388. addresses). */
  389. void generic_print_address(bfd_vma, struct disassemble_info *);
  390. /* Always true. */
  391. int generic_symbol_at_address(bfd_vma, struct disassemble_info *);
  392. /* Macro to initialize a disassemble_info struct. This should be called
  393. by all applications creating such a struct. */
  394. #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
  395. (INFO).flavour = bfd_target_unknown_flavour, \
  396. (INFO).arch = bfd_arch_unknown, \
  397. (INFO).mach = 0, \
  398. (INFO).endian = BFD_ENDIAN_UNKNOWN, \
  399. INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
  400. /* Call this macro to initialize only the internal variables for the
  401. disassembler. Architecture dependent things such as byte order, or machine
  402. variant are not touched by this macro. This makes things much easier for
  403. GDB which must initialize these things separately. */
  404. #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
  405. (INFO).fprintf_func = (FPRINTF_FUNC), \
  406. (INFO).stream = (STREAM), \
  407. (INFO).symbols = NULL, \
  408. (INFO).num_symbols = 0, \
  409. (INFO).private_data = NULL, \
  410. (INFO).buffer = NULL, \
  411. (INFO).buffer_vma = 0, \
  412. (INFO).buffer_length = 0, \
  413. (INFO).read_memory_func = buffer_read_memory, \
  414. (INFO).memory_error_func = perror_memory, \
  415. (INFO).print_address_func = generic_print_address, \
  416. (INFO).symbol_at_address_func = generic_symbol_at_address, \
  417. (INFO).flags = 0, \
  418. (INFO).bytes_per_line = 0, \
  419. (INFO).bytes_per_chunk = 0, \
  420. (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
  421. (INFO).disassembler_options = NULL, \
  422. (INFO).insn_info_valid = 0
  423. #define _(x) x
  424. #define ATTRIBUTE_UNUSED __attribute__((unused))
  425. /* from libbfd */
  426. bfd_vma bfd_getl64 (const bfd_byte *addr);
  427. bfd_vma bfd_getl32 (const bfd_byte *addr);
  428. bfd_vma bfd_getb32 (const bfd_byte *addr);
  429. bfd_vma bfd_getl16 (const bfd_byte *addr);
  430. bfd_vma bfd_getb16 (const bfd_byte *addr);
  431. typedef bool bfd_boolean;
  432. #endif /* ! defined (DIS_ASM_H) */