spapr_vio.c 18 KB

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  1. /*
  2. * QEMU sPAPR VIO code
  3. *
  4. * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
  5. * Based on the s390 virtio bus code:
  6. * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
  7. *
  8. * This library is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU Lesser General Public
  10. * License as published by the Free Software Foundation; either
  11. * version 2 of the License, or (at your option) any later version.
  12. *
  13. * This library is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * Lesser General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU Lesser General Public
  19. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include "hw.h"
  22. #include "sysemu.h"
  23. #include "boards.h"
  24. #include "monitor.h"
  25. #include "loader.h"
  26. #include "elf.h"
  27. #include "hw/sysbus.h"
  28. #include "kvm.h"
  29. #include "device_tree.h"
  30. #include "kvm_ppc.h"
  31. #include "hw/spapr.h"
  32. #include "hw/spapr_vio.h"
  33. #ifdef CONFIG_FDT
  34. #include <libfdt.h>
  35. #endif /* CONFIG_FDT */
  36. /* #define DEBUG_SPAPR */
  37. /* #define DEBUG_TCE */
  38. #ifdef DEBUG_SPAPR
  39. #define dprintf(fmt, ...) \
  40. do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
  41. #else
  42. #define dprintf(fmt, ...) \
  43. do { } while (0)
  44. #endif
  45. static struct BusInfo spapr_vio_bus_info = {
  46. .name = "spapr-vio",
  47. .size = sizeof(VIOsPAPRBus),
  48. };
  49. VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg)
  50. {
  51. DeviceState *qdev;
  52. VIOsPAPRDevice *dev = NULL;
  53. QLIST_FOREACH(qdev, &bus->bus.children, sibling) {
  54. dev = (VIOsPAPRDevice *)qdev;
  55. if (dev->reg == reg) {
  56. break;
  57. }
  58. }
  59. return dev;
  60. }
  61. #ifdef CONFIG_FDT
  62. static int vio_make_devnode(VIOsPAPRDevice *dev,
  63. void *fdt)
  64. {
  65. VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)dev->qdev.info;
  66. int vdevice_off, node_off;
  67. int ret;
  68. vdevice_off = fdt_path_offset(fdt, "/vdevice");
  69. if (vdevice_off < 0) {
  70. return vdevice_off;
  71. }
  72. node_off = fdt_add_subnode(fdt, vdevice_off, dev->qdev.id);
  73. if (node_off < 0) {
  74. return node_off;
  75. }
  76. ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
  77. if (ret < 0) {
  78. return ret;
  79. }
  80. if (info->dt_type) {
  81. ret = fdt_setprop_string(fdt, node_off, "device_type",
  82. info->dt_type);
  83. if (ret < 0) {
  84. return ret;
  85. }
  86. }
  87. if (info->dt_compatible) {
  88. ret = fdt_setprop_string(fdt, node_off, "compatible",
  89. info->dt_compatible);
  90. if (ret < 0) {
  91. return ret;
  92. }
  93. }
  94. if (dev->qirq) {
  95. uint32_t ints_prop[] = {cpu_to_be32(dev->vio_irq_num), 0};
  96. ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
  97. sizeof(ints_prop));
  98. if (ret < 0) {
  99. return ret;
  100. }
  101. }
  102. if (dev->rtce_window_size) {
  103. uint32_t dma_prop[] = {cpu_to_be32(dev->reg),
  104. 0, 0,
  105. 0, cpu_to_be32(dev->rtce_window_size)};
  106. ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
  107. if (ret < 0) {
  108. return ret;
  109. }
  110. ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
  111. if (ret < 0) {
  112. return ret;
  113. }
  114. ret = fdt_setprop(fdt, node_off, "ibm,my-dma-window", dma_prop,
  115. sizeof(dma_prop));
  116. if (ret < 0) {
  117. return ret;
  118. }
  119. }
  120. if (info->devnode) {
  121. ret = (info->devnode)(dev, fdt, node_off);
  122. if (ret < 0) {
  123. return ret;
  124. }
  125. }
  126. return node_off;
  127. }
  128. #endif /* CONFIG_FDT */
  129. /*
  130. * RTCE handling
  131. */
  132. static void rtce_init(VIOsPAPRDevice *dev)
  133. {
  134. size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT)
  135. * sizeof(VIOsPAPR_RTCE);
  136. if (size) {
  137. dev->rtce_table = qemu_mallocz(size);
  138. }
  139. }
  140. static target_ulong h_put_tce(CPUState *env, sPAPREnvironment *spapr,
  141. target_ulong opcode, target_ulong *args)
  142. {
  143. target_ulong liobn = args[0];
  144. target_ulong ioba = args[1];
  145. target_ulong tce = args[2];
  146. VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, liobn);
  147. VIOsPAPR_RTCE *rtce;
  148. if (!dev) {
  149. hcall_dprintf("spapr_vio_put_tce on non-existent LIOBN "
  150. TARGET_FMT_lx "\n", liobn);
  151. return H_PARAMETER;
  152. }
  153. ioba &= ~(SPAPR_VIO_TCE_PAGE_SIZE - 1);
  154. #ifdef DEBUG_TCE
  155. fprintf(stderr, "spapr_vio_put_tce on %s ioba 0x" TARGET_FMT_lx
  156. " TCE 0x" TARGET_FMT_lx "\n", dev->qdev.id, ioba, tce);
  157. #endif
  158. if (ioba >= dev->rtce_window_size) {
  159. hcall_dprintf("spapr_vio_put_tce on out-of-boards IOBA 0x"
  160. TARGET_FMT_lx "\n", ioba);
  161. return H_PARAMETER;
  162. }
  163. rtce = dev->rtce_table + (ioba >> SPAPR_VIO_TCE_PAGE_SHIFT);
  164. rtce->tce = tce;
  165. return H_SUCCESS;
  166. }
  167. int spapr_vio_check_tces(VIOsPAPRDevice *dev, target_ulong ioba,
  168. target_ulong len, enum VIOsPAPR_TCEAccess access)
  169. {
  170. int start, end, i;
  171. start = ioba >> SPAPR_VIO_TCE_PAGE_SHIFT;
  172. end = (ioba + len - 1) >> SPAPR_VIO_TCE_PAGE_SHIFT;
  173. for (i = start; i <= end; i++) {
  174. if ((dev->rtce_table[i].tce & access) != access) {
  175. #ifdef DEBUG_TCE
  176. fprintf(stderr, "FAIL on %d\n", i);
  177. #endif
  178. return -1;
  179. }
  180. }
  181. return 0;
  182. }
  183. int spapr_tce_dma_write(VIOsPAPRDevice *dev, uint64_t taddr, const void *buf,
  184. uint32_t size)
  185. {
  186. #ifdef DEBUG_TCE
  187. fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n",
  188. (unsigned long long)taddr, size);
  189. #endif
  190. /* Check for bypass */
  191. if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
  192. cpu_physical_memory_write(taddr, buf, size);
  193. return 0;
  194. }
  195. while (size) {
  196. uint64_t tce;
  197. uint32_t lsize;
  198. uint64_t txaddr;
  199. /* Check if we are in bound */
  200. if (taddr >= dev->rtce_window_size) {
  201. #ifdef DEBUG_TCE
  202. fprintf(stderr, "spapr_tce_dma_write out of bounds\n");
  203. #endif
  204. return H_DEST_PARM;
  205. }
  206. tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce;
  207. /* How much til end of page ? */
  208. lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1);
  209. /* Check TCE */
  210. if (!(tce & 2)) {
  211. return H_DEST_PARM;
  212. }
  213. /* Translate */
  214. txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) |
  215. (taddr & SPAPR_VIO_TCE_PAGE_MASK);
  216. #ifdef DEBUG_TCE
  217. fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n",
  218. (unsigned long long)txaddr, lsize);
  219. #endif
  220. /* Do it */
  221. cpu_physical_memory_write(txaddr, buf, lsize);
  222. buf += lsize;
  223. taddr += lsize;
  224. size -= lsize;
  225. }
  226. return 0;
  227. }
  228. int spapr_tce_dma_zero(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t size)
  229. {
  230. /* FIXME: allocating a temp buffer is nasty, but just stepping
  231. * through writing zeroes is awkward. This will do for now. */
  232. uint8_t zeroes[size];
  233. #ifdef DEBUG_TCE
  234. fprintf(stderr, "spapr_tce_dma_zero taddr=0x%llx size=0x%x\n",
  235. (unsigned long long)taddr, size);
  236. #endif
  237. memset(zeroes, 0, size);
  238. return spapr_tce_dma_write(dev, taddr, zeroes, size);
  239. }
  240. void stb_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint8_t val)
  241. {
  242. spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
  243. }
  244. void sth_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint16_t val)
  245. {
  246. val = tswap16(val);
  247. spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
  248. }
  249. void stw_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t val)
  250. {
  251. val = tswap32(val);
  252. spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
  253. }
  254. void stq_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint64_t val)
  255. {
  256. val = tswap64(val);
  257. spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
  258. }
  259. int spapr_tce_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, void *buf,
  260. uint32_t size)
  261. {
  262. #ifdef DEBUG_TCE
  263. fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n",
  264. (unsigned long long)taddr, size);
  265. #endif
  266. /* Check for bypass */
  267. if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
  268. cpu_physical_memory_read(taddr, buf, size);
  269. return 0;
  270. }
  271. while (size) {
  272. uint64_t tce;
  273. uint32_t lsize;
  274. uint64_t txaddr;
  275. /* Check if we are in bound */
  276. if (taddr >= dev->rtce_window_size) {
  277. #ifdef DEBUG_TCE
  278. fprintf(stderr, "spapr_tce_dma_read out of bounds\n");
  279. #endif
  280. return H_DEST_PARM;
  281. }
  282. tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce;
  283. /* How much til end of page ? */
  284. lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1);
  285. /* Check TCE */
  286. if (!(tce & 1)) {
  287. return H_DEST_PARM;
  288. }
  289. /* Translate */
  290. txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) |
  291. (taddr & SPAPR_VIO_TCE_PAGE_MASK);
  292. #ifdef DEBUG_TCE
  293. fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n",
  294. (unsigned long long)txaddr, lsize);
  295. #endif
  296. /* Do it */
  297. cpu_physical_memory_read(txaddr, buf, lsize);
  298. buf += lsize;
  299. taddr += lsize;
  300. size -= lsize;
  301. }
  302. return H_SUCCESS;
  303. }
  304. uint64_t ldq_tce(VIOsPAPRDevice *dev, uint64_t taddr)
  305. {
  306. uint64_t val;
  307. spapr_tce_dma_read(dev, taddr, &val, sizeof(val));
  308. return tswap64(val);
  309. }
  310. /*
  311. * CRQ handling
  312. */
  313. static target_ulong h_reg_crq(CPUState *env, sPAPREnvironment *spapr,
  314. target_ulong opcode, target_ulong *args)
  315. {
  316. target_ulong reg = args[0];
  317. target_ulong queue_addr = args[1];
  318. target_ulong queue_len = args[2];
  319. VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  320. if (!dev) {
  321. hcall_dprintf("h_reg_crq on non-existent unit 0x"
  322. TARGET_FMT_lx "\n", reg);
  323. return H_PARAMETER;
  324. }
  325. /* We can't grok a queue size bigger than 256M for now */
  326. if (queue_len < 0x1000 || queue_len > 0x10000000) {
  327. hcall_dprintf("h_reg_crq, queue size too small or too big (0x%llx)\n",
  328. (unsigned long long)queue_len);
  329. return H_PARAMETER;
  330. }
  331. /* Check queue alignment */
  332. if (queue_addr & 0xfff) {
  333. hcall_dprintf("h_reg_crq, queue not aligned (0x%llx)\n",
  334. (unsigned long long)queue_addr);
  335. return H_PARAMETER;
  336. }
  337. /* Check if device supports CRQs */
  338. if (!dev->crq.SendFunc) {
  339. return H_NOT_FOUND;
  340. }
  341. /* Already a queue ? */
  342. if (dev->crq.qsize) {
  343. return H_RESOURCE;
  344. }
  345. dev->crq.qladdr = queue_addr;
  346. dev->crq.qsize = queue_len;
  347. dev->crq.qnext = 0;
  348. dprintf("CRQ for dev 0x" TARGET_FMT_lx " registered at 0x"
  349. TARGET_FMT_lx "/0x" TARGET_FMT_lx "\n",
  350. reg, queue_addr, queue_len);
  351. return H_SUCCESS;
  352. }
  353. static target_ulong h_free_crq(CPUState *env, sPAPREnvironment *spapr,
  354. target_ulong opcode, target_ulong *args)
  355. {
  356. target_ulong reg = args[0];
  357. VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  358. if (!dev) {
  359. hcall_dprintf("h_free_crq on non-existent unit 0x"
  360. TARGET_FMT_lx "\n", reg);
  361. return H_PARAMETER;
  362. }
  363. dev->crq.qladdr = 0;
  364. dev->crq.qsize = 0;
  365. dev->crq.qnext = 0;
  366. dprintf("CRQ for dev 0x" TARGET_FMT_lx " freed\n", reg);
  367. return H_SUCCESS;
  368. }
  369. static target_ulong h_send_crq(CPUState *env, sPAPREnvironment *spapr,
  370. target_ulong opcode, target_ulong *args)
  371. {
  372. target_ulong reg = args[0];
  373. target_ulong msg_hi = args[1];
  374. target_ulong msg_lo = args[2];
  375. VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  376. uint64_t crq_mangle[2];
  377. if (!dev) {
  378. hcall_dprintf("h_send_crq on non-existent unit 0x"
  379. TARGET_FMT_lx "\n", reg);
  380. return H_PARAMETER;
  381. }
  382. crq_mangle[0] = cpu_to_be64(msg_hi);
  383. crq_mangle[1] = cpu_to_be64(msg_lo);
  384. if (dev->crq.SendFunc) {
  385. return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
  386. }
  387. return H_HARDWARE;
  388. }
  389. static target_ulong h_enable_crq(CPUState *env, sPAPREnvironment *spapr,
  390. target_ulong opcode, target_ulong *args)
  391. {
  392. target_ulong reg = args[0];
  393. VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  394. if (!dev) {
  395. hcall_dprintf("h_enable_crq on non-existent unit 0x"
  396. TARGET_FMT_lx "\n", reg);
  397. return H_PARAMETER;
  398. }
  399. return 0;
  400. }
  401. /* Returns negative error, 0 success, or positive: queue full */
  402. int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq)
  403. {
  404. int rc;
  405. uint8_t byte;
  406. if (!dev->crq.qsize) {
  407. fprintf(stderr, "spapr_vio_send_creq on uninitialized queue\n");
  408. return -1;
  409. }
  410. /* Maybe do a fast path for KVM just writing to the pages */
  411. rc = spapr_tce_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
  412. if (rc) {
  413. return rc;
  414. }
  415. if (byte != 0) {
  416. return 1;
  417. }
  418. rc = spapr_tce_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
  419. &crq[8], 8);
  420. if (rc) {
  421. return rc;
  422. }
  423. kvmppc_eieio();
  424. rc = spapr_tce_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
  425. if (rc) {
  426. return rc;
  427. }
  428. dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
  429. if (dev->signal_state & 1) {
  430. qemu_irq_pulse(dev->qirq);
  431. }
  432. return 0;
  433. }
  434. /* "quiesce" handling */
  435. static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev)
  436. {
  437. dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
  438. if (dev->rtce_table) {
  439. size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT)
  440. * sizeof(VIOsPAPR_RTCE);
  441. memset(dev->rtce_table, 0, size);
  442. }
  443. dev->crq.qladdr = 0;
  444. dev->crq.qsize = 0;
  445. dev->crq.qnext = 0;
  446. }
  447. static void rtas_set_tce_bypass(sPAPREnvironment *spapr, uint32_t token,
  448. uint32_t nargs, target_ulong args,
  449. uint32_t nret, target_ulong rets)
  450. {
  451. VIOsPAPRBus *bus = spapr->vio_bus;
  452. VIOsPAPRDevice *dev;
  453. uint32_t unit, enable;
  454. if (nargs != 2) {
  455. rtas_st(rets, 0, -3);
  456. return;
  457. }
  458. unit = rtas_ld(args, 0);
  459. enable = rtas_ld(args, 1);
  460. dev = spapr_vio_find_by_reg(bus, unit);
  461. if (!dev) {
  462. rtas_st(rets, 0, -3);
  463. return;
  464. }
  465. if (enable) {
  466. dev->flags |= VIO_PAPR_FLAG_DMA_BYPASS;
  467. } else {
  468. dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
  469. }
  470. rtas_st(rets, 0, 0);
  471. }
  472. static void rtas_quiesce(sPAPREnvironment *spapr, uint32_t token,
  473. uint32_t nargs, target_ulong args,
  474. uint32_t nret, target_ulong rets)
  475. {
  476. VIOsPAPRBus *bus = spapr->vio_bus;
  477. DeviceState *qdev;
  478. VIOsPAPRDevice *dev = NULL;
  479. if (nargs != 0) {
  480. rtas_st(rets, 0, -3);
  481. return;
  482. }
  483. QLIST_FOREACH(qdev, &bus->bus.children, sibling) {
  484. dev = (VIOsPAPRDevice *)qdev;
  485. spapr_vio_quiesce_one(dev);
  486. }
  487. rtas_st(rets, 0, 0);
  488. }
  489. static int spapr_vio_busdev_init(DeviceState *qdev, DeviceInfo *qinfo)
  490. {
  491. VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
  492. VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev;
  493. char *id;
  494. if (asprintf(&id, "%s@%x", info->dt_name, dev->reg) < 0) {
  495. return -1;
  496. }
  497. dev->qdev.id = id;
  498. rtce_init(dev);
  499. return info->init(dev);
  500. }
  501. void spapr_vio_bus_register_withprop(VIOsPAPRDeviceInfo *info)
  502. {
  503. info->qdev.init = spapr_vio_busdev_init;
  504. info->qdev.bus_info = &spapr_vio_bus_info;
  505. assert(info->qdev.size >= sizeof(VIOsPAPRDevice));
  506. qdev_register(&info->qdev);
  507. }
  508. static target_ulong h_vio_signal(CPUState *env, sPAPREnvironment *spapr,
  509. target_ulong opcode,
  510. target_ulong *args)
  511. {
  512. target_ulong reg = args[0];
  513. target_ulong mode = args[1];
  514. VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  515. VIOsPAPRDeviceInfo *info;
  516. if (!dev) {
  517. return H_PARAMETER;
  518. }
  519. info = (VIOsPAPRDeviceInfo *)dev->qdev.info;
  520. if (mode & ~info->signal_mask) {
  521. return H_PARAMETER;
  522. }
  523. dev->signal_state = mode;
  524. return H_SUCCESS;
  525. }
  526. VIOsPAPRBus *spapr_vio_bus_init(void)
  527. {
  528. VIOsPAPRBus *bus;
  529. BusState *qbus;
  530. DeviceState *dev;
  531. DeviceInfo *qinfo;
  532. /* Create bridge device */
  533. dev = qdev_create(NULL, "spapr-vio-bridge");
  534. qdev_init_nofail(dev);
  535. /* Create bus on bridge device */
  536. qbus = qbus_create(&spapr_vio_bus_info, dev, "spapr-vio");
  537. bus = DO_UPCAST(VIOsPAPRBus, bus, qbus);
  538. /* hcall-vio */
  539. spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
  540. /* hcall-tce */
  541. spapr_register_hypercall(H_PUT_TCE, h_put_tce);
  542. /* hcall-crq */
  543. spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
  544. spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
  545. spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
  546. spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
  547. /* RTAS calls */
  548. spapr_rtas_register("ibm,set-tce-bypass", rtas_set_tce_bypass);
  549. spapr_rtas_register("quiesce", rtas_quiesce);
  550. for (qinfo = device_info_list; qinfo; qinfo = qinfo->next) {
  551. VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
  552. if (qinfo->bus_info != &spapr_vio_bus_info) {
  553. continue;
  554. }
  555. if (info->hcalls) {
  556. info->hcalls(bus);
  557. }
  558. }
  559. return bus;
  560. }
  561. /* Represents sPAPR hcall VIO devices */
  562. static int spapr_vio_bridge_init(SysBusDevice *dev)
  563. {
  564. /* nothing */
  565. return 0;
  566. }
  567. static SysBusDeviceInfo spapr_vio_bridge_info = {
  568. .init = spapr_vio_bridge_init,
  569. .qdev.name = "spapr-vio-bridge",
  570. .qdev.size = sizeof(SysBusDevice),
  571. .qdev.no_user = 1,
  572. };
  573. static void spapr_vio_register_devices(void)
  574. {
  575. sysbus_register_withprop(&spapr_vio_bridge_info);
  576. }
  577. device_init(spapr_vio_register_devices)
  578. #ifdef CONFIG_FDT
  579. int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt)
  580. {
  581. DeviceState *qdev;
  582. int ret = 0;
  583. QLIST_FOREACH(qdev, &bus->bus.children, sibling) {
  584. VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev;
  585. ret = vio_make_devnode(dev, fdt);
  586. if (ret < 0) {
  587. return ret;
  588. }
  589. }
  590. return 0;
  591. }
  592. #endif /* CONFIG_FDT */