lm32_pic.c 4.2 KB

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  1. /*
  2. * LatticeMico32 CPU interrupt controller logic.
  3. *
  4. * Copyright (c) 2010 Michael Walle <michael@walle.cc>
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License as published by the Free Software Foundation; either
  9. * version 2 of the License, or (at your option) any later version.
  10. *
  11. * This library is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * Lesser General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Lesser General Public
  17. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <assert.h>
  20. #include "hw.h"
  21. #include "pc.h"
  22. #include "monitor.h"
  23. #include "sysbus.h"
  24. #include "trace.h"
  25. #include "lm32_pic.h"
  26. struct LM32PicState {
  27. SysBusDevice busdev;
  28. qemu_irq parent_irq;
  29. uint32_t im; /* interrupt mask */
  30. uint32_t ip; /* interrupt pending */
  31. uint32_t irq_state;
  32. /* statistics */
  33. uint32_t stats_irq_count[32];
  34. };
  35. typedef struct LM32PicState LM32PicState;
  36. static LM32PicState *pic;
  37. void pic_info(Monitor *mon)
  38. {
  39. if (pic == NULL) {
  40. return;
  41. }
  42. monitor_printf(mon, "lm32-pic: im=%08x ip=%08x irq_state=%08x\n",
  43. pic->im, pic->ip, pic->irq_state);
  44. }
  45. void irq_info(Monitor *mon)
  46. {
  47. int i;
  48. uint32_t count;
  49. if (pic == NULL) {
  50. return;
  51. }
  52. monitor_printf(mon, "IRQ statistics:\n");
  53. for (i = 0; i < 32; i++) {
  54. count = pic->stats_irq_count[i];
  55. if (count > 0) {
  56. monitor_printf(mon, "%2d: %u\n", i, count);
  57. }
  58. }
  59. }
  60. static void update_irq(LM32PicState *s)
  61. {
  62. s->ip |= s->irq_state;
  63. if (s->ip & s->im) {
  64. trace_lm32_pic_raise_irq();
  65. qemu_irq_raise(s->parent_irq);
  66. } else {
  67. trace_lm32_pic_lower_irq();
  68. qemu_irq_lower(s->parent_irq);
  69. }
  70. }
  71. static void irq_handler(void *opaque, int irq, int level)
  72. {
  73. LM32PicState *s = opaque;
  74. assert(irq < 32);
  75. trace_lm32_pic_interrupt(irq, level);
  76. if (level) {
  77. s->irq_state |= (1 << irq);
  78. s->stats_irq_count[irq]++;
  79. } else {
  80. s->irq_state &= ~(1 << irq);
  81. }
  82. update_irq(s);
  83. }
  84. void lm32_pic_set_im(DeviceState *d, uint32_t im)
  85. {
  86. LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
  87. trace_lm32_pic_set_im(im);
  88. s->im = im;
  89. update_irq(s);
  90. }
  91. void lm32_pic_set_ip(DeviceState *d, uint32_t ip)
  92. {
  93. LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
  94. trace_lm32_pic_set_ip(ip);
  95. /* ack interrupt */
  96. s->ip &= ~ip;
  97. update_irq(s);
  98. }
  99. uint32_t lm32_pic_get_im(DeviceState *d)
  100. {
  101. LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
  102. trace_lm32_pic_get_im(s->im);
  103. return s->im;
  104. }
  105. uint32_t lm32_pic_get_ip(DeviceState *d)
  106. {
  107. LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
  108. trace_lm32_pic_get_ip(s->ip);
  109. return s->ip;
  110. }
  111. static void pic_reset(DeviceState *d)
  112. {
  113. LM32PicState *s = container_of(d, LM32PicState, busdev.qdev);
  114. int i;
  115. s->im = 0;
  116. s->ip = 0;
  117. s->irq_state = 0;
  118. for (i = 0; i < 32; i++) {
  119. s->stats_irq_count[i] = 0;
  120. }
  121. }
  122. static int lm32_pic_init(SysBusDevice *dev)
  123. {
  124. LM32PicState *s = FROM_SYSBUS(typeof(*s), dev);
  125. qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
  126. sysbus_init_irq(dev, &s->parent_irq);
  127. pic = s;
  128. return 0;
  129. }
  130. static const VMStateDescription vmstate_lm32_pic = {
  131. .name = "lm32-pic",
  132. .version_id = 1,
  133. .minimum_version_id = 1,
  134. .minimum_version_id_old = 1,
  135. .fields = (VMStateField[]) {
  136. VMSTATE_UINT32(im, LM32PicState),
  137. VMSTATE_UINT32(ip, LM32PicState),
  138. VMSTATE_UINT32(irq_state, LM32PicState),
  139. VMSTATE_UINT32_ARRAY(stats_irq_count, LM32PicState, 32),
  140. VMSTATE_END_OF_LIST()
  141. }
  142. };
  143. static SysBusDeviceInfo lm32_pic_info = {
  144. .init = lm32_pic_init,
  145. .qdev.name = "lm32-pic",
  146. .qdev.size = sizeof(LM32PicState),
  147. .qdev.vmsd = &vmstate_lm32_pic,
  148. .qdev.reset = pic_reset,
  149. };
  150. static void lm32_pic_register(void)
  151. {
  152. sysbus_register_withprop(&lm32_pic_info);
  153. }
  154. device_init(lm32_pic_register)