debugcon.c 3.2 KB

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  1. /*
  2. * QEMU Bochs-style debug console ("port E9") emulation
  3. *
  4. * Copyright (c) 2003-2004 Fabrice Bellard
  5. * Copyright (c) 2008 Citrix Systems, Inc.
  6. * Copyright (c) Intel Corporation; author: H. Peter Anvin
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include "hw.h"
  27. #include "qemu-char.h"
  28. #include "isa.h"
  29. #include "pc.h"
  30. //#define DEBUG_DEBUGCON
  31. typedef struct DebugconState {
  32. CharDriverState *chr;
  33. uint32_t readback;
  34. } DebugconState;
  35. typedef struct ISADebugconState {
  36. ISADevice dev;
  37. uint32_t iobase;
  38. DebugconState state;
  39. } ISADebugconState;
  40. static void debugcon_ioport_write(void *opaque, uint32_t addr, uint32_t val)
  41. {
  42. DebugconState *s = opaque;
  43. unsigned char ch = val;
  44. #ifdef DEBUG_DEBUGCON
  45. printf("debugcon: write addr=0x%04x val=0x%02x\n", addr, val);
  46. #endif
  47. qemu_chr_write(s->chr, &ch, 1);
  48. }
  49. static uint32_t debugcon_ioport_read(void *opaque, uint32_t addr)
  50. {
  51. DebugconState *s = opaque;
  52. #ifdef DEBUG_DEBUGCON
  53. printf("debugcon: read addr=0x%04x\n", addr);
  54. #endif
  55. return s->readback;
  56. }
  57. static void debugcon_init_core(DebugconState *s)
  58. {
  59. if (!s->chr) {
  60. fprintf(stderr, "Can't create debugcon device, empty char device\n");
  61. exit(1);
  62. }
  63. qemu_chr_add_handlers(s->chr, NULL, NULL, NULL, s);
  64. }
  65. static int debugcon_isa_initfn(ISADevice *dev)
  66. {
  67. ISADebugconState *isa = DO_UPCAST(ISADebugconState, dev, dev);
  68. DebugconState *s = &isa->state;
  69. debugcon_init_core(s);
  70. register_ioport_write(isa->iobase, 1, 1, debugcon_ioport_write, s);
  71. register_ioport_read(isa->iobase, 1, 1, debugcon_ioport_read, s);
  72. return 0;
  73. }
  74. static ISADeviceInfo debugcon_isa_info = {
  75. .qdev.name = "isa-debugcon",
  76. .qdev.size = sizeof(ISADebugconState),
  77. .init = debugcon_isa_initfn,
  78. .qdev.props = (Property[]) {
  79. DEFINE_PROP_HEX32("iobase", ISADebugconState, iobase, 0xe9),
  80. DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr),
  81. DEFINE_PROP_HEX32("readback", ISADebugconState, state.readback, 0xe9),
  82. DEFINE_PROP_END_OF_LIST(),
  83. },
  84. };
  85. static void debugcon_register_devices(void)
  86. {
  87. isa_qdev_register(&debugcon_isa_info);
  88. }
  89. device_init(debugcon_register_devices)