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machine.c 6.7 KB

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  1. #include "hw/hw.h"
  2. #include "hw/boards.h"
  3. #include "qemu-timer.h"
  4. #include "exec-all.h"
  5. void register_machines(void)
  6. {
  7. #ifdef TARGET_SPARC64
  8. qemu_register_machine(&sun4u_machine);
  9. qemu_register_machine(&sun4v_machine);
  10. qemu_register_machine(&niagara_machine);
  11. #else
  12. qemu_register_machine(&ss5_machine);
  13. qemu_register_machine(&ss10_machine);
  14. qemu_register_machine(&ss600mp_machine);
  15. qemu_register_machine(&ss20_machine);
  16. qemu_register_machine(&ss2_machine);
  17. qemu_register_machine(&voyager_machine);
  18. qemu_register_machine(&ss_lx_machine);
  19. qemu_register_machine(&ss4_machine);
  20. qemu_register_machine(&scls_machine);
  21. qemu_register_machine(&sbook_machine);
  22. qemu_register_machine(&ss1000_machine);
  23. qemu_register_machine(&ss2000_machine);
  24. #endif
  25. }
  26. void cpu_save(QEMUFile *f, void *opaque)
  27. {
  28. CPUState *env = opaque;
  29. int i;
  30. uint32_t tmp;
  31. // if env->cwp == env->nwindows - 1, this will set the ins of the last
  32. // window as the outs of the first window
  33. cpu_set_cwp(env, env->cwp);
  34. for(i = 0; i < 8; i++)
  35. qemu_put_betls(f, &env->gregs[i]);
  36. qemu_put_be32s(f, &env->nwindows);
  37. for(i = 0; i < env->nwindows * 16; i++)
  38. qemu_put_betls(f, &env->regbase[i]);
  39. /* FPU */
  40. for(i = 0; i < TARGET_FPREGS; i++) {
  41. union {
  42. float32 f;
  43. uint32_t i;
  44. } u;
  45. u.f = env->fpr[i];
  46. qemu_put_be32(f, u.i);
  47. }
  48. qemu_put_betls(f, &env->pc);
  49. qemu_put_betls(f, &env->npc);
  50. qemu_put_betls(f, &env->y);
  51. tmp = GET_PSR(env);
  52. qemu_put_be32(f, tmp);
  53. qemu_put_betls(f, &env->fsr);
  54. qemu_put_betls(f, &env->tbr);
  55. tmp = env->interrupt_index;
  56. qemu_put_be32(f, tmp);
  57. qemu_put_be32s(f, &env->pil_in);
  58. #ifndef TARGET_SPARC64
  59. qemu_put_be32s(f, &env->wim);
  60. /* MMU */
  61. for (i = 0; i < 32; i++)
  62. qemu_put_be32s(f, &env->mmuregs[i]);
  63. #else
  64. qemu_put_be64s(f, &env->lsu);
  65. for (i = 0; i < 16; i++) {
  66. qemu_put_be64s(f, &env->immuregs[i]);
  67. qemu_put_be64s(f, &env->dmmuregs[i]);
  68. }
  69. for (i = 0; i < 64; i++) {
  70. qemu_put_be64s(f, &env->itlb_tag[i]);
  71. qemu_put_be64s(f, &env->itlb_tte[i]);
  72. qemu_put_be64s(f, &env->dtlb_tag[i]);
  73. qemu_put_be64s(f, &env->dtlb_tte[i]);
  74. }
  75. qemu_put_be32s(f, &env->mmu_version);
  76. for (i = 0; i < MAXTL_MAX; i++) {
  77. qemu_put_be64s(f, &env->ts[i].tpc);
  78. qemu_put_be64s(f, &env->ts[i].tnpc);
  79. qemu_put_be64s(f, &env->ts[i].tstate);
  80. qemu_put_be32s(f, &env->ts[i].tt);
  81. }
  82. qemu_put_be32s(f, &env->xcc);
  83. qemu_put_be32s(f, &env->asi);
  84. qemu_put_be32s(f, &env->pstate);
  85. qemu_put_be32s(f, &env->tl);
  86. qemu_put_be32s(f, &env->cansave);
  87. qemu_put_be32s(f, &env->canrestore);
  88. qemu_put_be32s(f, &env->otherwin);
  89. qemu_put_be32s(f, &env->wstate);
  90. qemu_put_be32s(f, &env->cleanwin);
  91. for (i = 0; i < 8; i++)
  92. qemu_put_be64s(f, &env->agregs[i]);
  93. for (i = 0; i < 8; i++)
  94. qemu_put_be64s(f, &env->bgregs[i]);
  95. for (i = 0; i < 8; i++)
  96. qemu_put_be64s(f, &env->igregs[i]);
  97. for (i = 0; i < 8; i++)
  98. qemu_put_be64s(f, &env->mgregs[i]);
  99. qemu_put_be64s(f, &env->fprs);
  100. qemu_put_be64s(f, &env->tick_cmpr);
  101. qemu_put_be64s(f, &env->stick_cmpr);
  102. qemu_put_ptimer(f, env->tick);
  103. qemu_put_ptimer(f, env->stick);
  104. qemu_put_be64s(f, &env->gsr);
  105. qemu_put_be32s(f, &env->gl);
  106. qemu_put_be64s(f, &env->hpstate);
  107. for (i = 0; i < MAXTL_MAX; i++)
  108. qemu_put_be64s(f, &env->htstate[i]);
  109. qemu_put_be64s(f, &env->hintp);
  110. qemu_put_be64s(f, &env->htba);
  111. qemu_put_be64s(f, &env->hver);
  112. qemu_put_be64s(f, &env->hstick_cmpr);
  113. qemu_put_be64s(f, &env->ssr);
  114. qemu_put_ptimer(f, env->hstick);
  115. #endif
  116. }
  117. int cpu_load(QEMUFile *f, void *opaque, int version_id)
  118. {
  119. CPUState *env = opaque;
  120. int i;
  121. uint32_t tmp;
  122. if (version_id != 5)
  123. return -EINVAL;
  124. for(i = 0; i < 8; i++)
  125. qemu_get_betls(f, &env->gregs[i]);
  126. qemu_get_be32s(f, &env->nwindows);
  127. for(i = 0; i < env->nwindows * 16; i++)
  128. qemu_get_betls(f, &env->regbase[i]);
  129. /* FPU */
  130. for(i = 0; i < TARGET_FPREGS; i++) {
  131. union {
  132. float32 f;
  133. uint32_t i;
  134. } u;
  135. u.i = qemu_get_be32(f);
  136. env->fpr[i] = u.f;
  137. }
  138. qemu_get_betls(f, &env->pc);
  139. qemu_get_betls(f, &env->npc);
  140. qemu_get_betls(f, &env->y);
  141. tmp = qemu_get_be32(f);
  142. env->cwp = 0; /* needed to ensure that the wrapping registers are
  143. correctly updated */
  144. PUT_PSR(env, tmp);
  145. qemu_get_betls(f, &env->fsr);
  146. qemu_get_betls(f, &env->tbr);
  147. tmp = qemu_get_be32(f);
  148. env->interrupt_index = tmp;
  149. qemu_get_be32s(f, &env->pil_in);
  150. #ifndef TARGET_SPARC64
  151. qemu_get_be32s(f, &env->wim);
  152. /* MMU */
  153. for (i = 0; i < 32; i++)
  154. qemu_get_be32s(f, &env->mmuregs[i]);
  155. #else
  156. qemu_get_be64s(f, &env->lsu);
  157. for (i = 0; i < 16; i++) {
  158. qemu_get_be64s(f, &env->immuregs[i]);
  159. qemu_get_be64s(f, &env->dmmuregs[i]);
  160. }
  161. for (i = 0; i < 64; i++) {
  162. qemu_get_be64s(f, &env->itlb_tag[i]);
  163. qemu_get_be64s(f, &env->itlb_tte[i]);
  164. qemu_get_be64s(f, &env->dtlb_tag[i]);
  165. qemu_get_be64s(f, &env->dtlb_tte[i]);
  166. }
  167. qemu_get_be32s(f, &env->mmu_version);
  168. for (i = 0; i < MAXTL_MAX; i++) {
  169. qemu_get_be64s(f, &env->ts[i].tpc);
  170. qemu_get_be64s(f, &env->ts[i].tnpc);
  171. qemu_get_be64s(f, &env->ts[i].tstate);
  172. qemu_get_be32s(f, &env->ts[i].tt);
  173. }
  174. qemu_get_be32s(f, &env->xcc);
  175. qemu_get_be32s(f, &env->asi);
  176. qemu_get_be32s(f, &env->pstate);
  177. qemu_get_be32s(f, &env->tl);
  178. env->tsptr = &env->ts[env->tl & MAXTL_MASK];
  179. qemu_get_be32s(f, &env->cansave);
  180. qemu_get_be32s(f, &env->canrestore);
  181. qemu_get_be32s(f, &env->otherwin);
  182. qemu_get_be32s(f, &env->wstate);
  183. qemu_get_be32s(f, &env->cleanwin);
  184. for (i = 0; i < 8; i++)
  185. qemu_get_be64s(f, &env->agregs[i]);
  186. for (i = 0; i < 8; i++)
  187. qemu_get_be64s(f, &env->bgregs[i]);
  188. for (i = 0; i < 8; i++)
  189. qemu_get_be64s(f, &env->igregs[i]);
  190. for (i = 0; i < 8; i++)
  191. qemu_get_be64s(f, &env->mgregs[i]);
  192. qemu_get_be64s(f, &env->fprs);
  193. qemu_get_be64s(f, &env->tick_cmpr);
  194. qemu_get_be64s(f, &env->stick_cmpr);
  195. qemu_get_ptimer(f, env->tick);
  196. qemu_get_ptimer(f, env->stick);
  197. qemu_get_be64s(f, &env->gsr);
  198. qemu_get_be32s(f, &env->gl);
  199. qemu_get_be64s(f, &env->hpstate);
  200. for (i = 0; i < MAXTL_MAX; i++)
  201. qemu_get_be64s(f, &env->htstate[i]);
  202. qemu_get_be64s(f, &env->hintp);
  203. qemu_get_be64s(f, &env->htba);
  204. qemu_get_be64s(f, &env->hver);
  205. qemu_get_be64s(f, &env->hstick_cmpr);
  206. qemu_get_be64s(f, &env->ssr);
  207. qemu_get_ptimer(f, env->hstick);
  208. #endif
  209. tlb_flush(env, 1);
  210. return 0;
  211. }