shix.c 3.0 KB

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  1. /*
  2. * SHIX 2.0 board description
  3. *
  4. * Copyright (c) 2005 Samuel Tardieu
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a copy
  7. * of this software and associated documentation files (the "Software"), to deal
  8. * in the Software without restriction, including without limitation the rights
  9. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. * copies of the Software, and to permit persons to whom the Software is
  11. * furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22. * THE SOFTWARE.
  23. */
  24. /*
  25. Shix 2.0 board by Alexis Polti, described at
  26. http://perso.enst.fr/~polti/realisations/shix20/
  27. More information in target-sh4/README.sh4
  28. */
  29. #include "hw.h"
  30. #include "sh.h"
  31. #include "sysemu.h"
  32. #include "boards.h"
  33. #define BIOS_FILENAME "shix_bios.bin"
  34. #define BIOS_ADDRESS 0xA0000000
  35. void irq_info(void)
  36. {
  37. /* XXXXX */
  38. }
  39. void pic_info(void)
  40. {
  41. /* XXXXX */
  42. }
  43. static void shix_init(ram_addr_t ram_size, int vga_ram_size,
  44. const char *boot_device,
  45. const char *kernel_filename, const char *kernel_cmdline,
  46. const char *initrd_filename, const char *cpu_model)
  47. {
  48. int ret;
  49. CPUState *env;
  50. struct SH7750State *s;
  51. if (!cpu_model)
  52. cpu_model = "any";
  53. printf("Initializing CPU\n");
  54. env = cpu_init(cpu_model);
  55. /* Allocate memory space */
  56. printf("Allocating ROM\n");
  57. cpu_register_physical_memory(0x00000000, 0x00004000, IO_MEM_ROM);
  58. printf("Allocating SDRAM 1\n");
  59. cpu_register_physical_memory(0x08000000, 0x01000000, 0x00004000);
  60. printf("Allocating SDRAM 2\n");
  61. cpu_register_physical_memory(0x0c000000, 0x01000000, 0x01004000);
  62. /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
  63. if (bios_name == NULL)
  64. bios_name = BIOS_FILENAME;
  65. printf("%s: load BIOS '%s'\n", __func__, bios_name);
  66. ret = load_image(bios_name, phys_ram_base);
  67. if (ret < 0) { /* Check bios size */
  68. fprintf(stderr, "ret=%d\n", ret);
  69. fprintf(stderr, "qemu: could not load SHIX bios '%s'\n",
  70. bios_name);
  71. exit(1);
  72. }
  73. /* Register peripherals */
  74. s = sh7750_init(env);
  75. /* XXXXX Check success */
  76. tc58128_init(s, "shix_linux_nand.bin", NULL);
  77. fprintf(stderr, "initialization terminated\n");
  78. }
  79. QEMUMachine shix_machine = {
  80. .name = "shix",
  81. .desc = "shix card",
  82. .init = shix_init,
  83. .ram_require = (0x00004000 + 0x01000000 + 0x01000000) | RAMSIZE_FIXED,
  84. };