sh.h 1.7 KB

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  1. #ifndef QEMU_SH_H
  2. #define QEMU_SH_H
  3. /* Definitions for SH board emulation. */
  4. #include "sh_intc.h"
  5. #define A7ADDR(x) ((x) & 0x1fffffff)
  6. #define P4ADDR(x) ((x) | 0xe0000000)
  7. /* sh7750.c */
  8. struct SH7750State;
  9. struct SH7750State *sh7750_init(CPUState * cpu);
  10. typedef struct {
  11. /* The callback will be triggered if any of the designated lines change */
  12. uint16_t portamask_trigger;
  13. uint16_t portbmask_trigger;
  14. /* Return 0 if no action was taken */
  15. int (*port_change_cb) (uint16_t porta, uint16_t portb,
  16. uint16_t * periph_pdtra,
  17. uint16_t * periph_portdira,
  18. uint16_t * periph_pdtrb,
  19. uint16_t * periph_portdirb);
  20. } sh7750_io_device;
  21. int sh7750_register_io_device(struct SH7750State *s,
  22. sh7750_io_device * device);
  23. /* sh_timer.c */
  24. #define TMU012_FEAT_TOCR (1 << 0)
  25. #define TMU012_FEAT_3CHAN (1 << 1)
  26. #define TMU012_FEAT_EXTCLK (1 << 2)
  27. void tmu012_init(target_phys_addr_t base, int feat, uint32_t freq,
  28. qemu_irq ch0_irq, qemu_irq ch1_irq,
  29. qemu_irq ch2_irq0, qemu_irq ch2_irq1);
  30. /* sh_serial.c */
  31. #define SH_SERIAL_FEAT_SCIF (1 << 0)
  32. void sh_serial_init (target_phys_addr_t base, int feat,
  33. uint32_t freq, CharDriverState *chr,
  34. qemu_irq eri_source,
  35. qemu_irq rxi_source,
  36. qemu_irq txi_source,
  37. qemu_irq tei_source,
  38. qemu_irq bri_source);
  39. /* sh7750.c */
  40. qemu_irq sh7750_irl(struct SH7750State *s);
  41. /* tc58128.c */
  42. int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2);
  43. /* ide.c */
  44. void mmio_ide_init(target_phys_addr_t membase, target_phys_addr_t membase2,
  45. qemu_irq irq, int shift,
  46. BlockDriverState *hd0, BlockDriverState *hd1);
  47. #endif