mipssim.c 8.0 KB

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  1. /*
  2. * QEMU/mipssim emulation
  3. *
  4. * Emulates a very simple machine model similar to the one used by the
  5. * proprietary MIPS emulator.
  6. *
  7. * Copyright (c) 2007 Thiemo Seufer
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a copy
  10. * of this software and associated documentation files (the "Software"), to deal
  11. * in the Software without restriction, including without limitation the rights
  12. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13. * copies of the Software, and to permit persons to whom the Software is
  14. * furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice shall be included in
  17. * all copies or substantial portions of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  25. * THE SOFTWARE.
  26. */
  27. #include "qemu/osdep.h"
  28. #include "qapi/error.h"
  29. #include "qemu-common.h"
  30. #include "cpu.h"
  31. #include "hw/mips/mips.h"
  32. #include "hw/mips/cpudevs.h"
  33. #include "hw/char/serial.h"
  34. #include "hw/isa/isa.h"
  35. #include "net/net.h"
  36. #include "sysemu/sysemu.h"
  37. #include "hw/boards.h"
  38. #include "hw/mips/bios.h"
  39. #include "hw/loader.h"
  40. #include "elf.h"
  41. #include "hw/sysbus.h"
  42. #include "hw/qdev-properties.h"
  43. #include "exec/address-spaces.h"
  44. #include "qemu/error-report.h"
  45. #include "sysemu/qtest.h"
  46. #include "sysemu/reset.h"
  47. static struct _loaderparams {
  48. int ram_size;
  49. const char *kernel_filename;
  50. const char *kernel_cmdline;
  51. const char *initrd_filename;
  52. } loaderparams;
  53. typedef struct ResetData {
  54. MIPSCPU *cpu;
  55. uint64_t vector;
  56. } ResetData;
  57. static int64_t load_kernel(void)
  58. {
  59. int64_t entry, kernel_high, initrd_size;
  60. long kernel_size;
  61. ram_addr_t initrd_offset;
  62. int big_endian;
  63. #ifdef TARGET_WORDS_BIGENDIAN
  64. big_endian = 1;
  65. #else
  66. big_endian = 0;
  67. #endif
  68. kernel_size = load_elf(loaderparams.kernel_filename, NULL,
  69. cpu_mips_kseg0_to_phys, NULL,
  70. (uint64_t *)&entry, NULL,
  71. (uint64_t *)&kernel_high, NULL, big_endian,
  72. EM_MIPS, 1, 0);
  73. if (kernel_size >= 0) {
  74. if ((entry & ~0x7fffffffULL) == 0x80000000) {
  75. entry = (int32_t)entry;
  76. }
  77. } else {
  78. error_report("could not load kernel '%s': %s",
  79. loaderparams.kernel_filename,
  80. load_elf_strerror(kernel_size));
  81. exit(1);
  82. }
  83. /* load initrd */
  84. initrd_size = 0;
  85. initrd_offset = 0;
  86. if (loaderparams.initrd_filename) {
  87. initrd_size = get_image_size(loaderparams.initrd_filename);
  88. if (initrd_size > 0) {
  89. initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) &
  90. INITRD_PAGE_MASK;
  91. if (initrd_offset + initrd_size > loaderparams.ram_size) {
  92. error_report("memory too small for initial ram disk '%s'",
  93. loaderparams.initrd_filename);
  94. exit(1);
  95. }
  96. initrd_size = load_image_targphys(loaderparams.initrd_filename,
  97. initrd_offset, loaderparams.ram_size - initrd_offset);
  98. }
  99. if (initrd_size == (target_ulong) -1) {
  100. error_report("could not load initial ram disk '%s'",
  101. loaderparams.initrd_filename);
  102. exit(1);
  103. }
  104. }
  105. return entry;
  106. }
  107. static void main_cpu_reset(void *opaque)
  108. {
  109. ResetData *s = (ResetData *)opaque;
  110. CPUMIPSState *env = &s->cpu->env;
  111. cpu_reset(CPU(s->cpu));
  112. env->active_tc.PC = s->vector & ~(target_ulong)1;
  113. if (s->vector & 1) {
  114. env->hflags |= MIPS_HFLAG_M16;
  115. }
  116. }
  117. static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
  118. {
  119. DeviceState *dev;
  120. SysBusDevice *s;
  121. dev = qdev_new("mipsnet");
  122. qdev_set_nic_properties(dev, nd);
  123. s = SYS_BUS_DEVICE(dev);
  124. sysbus_realize_and_unref(s, &error_fatal);
  125. sysbus_connect_irq(s, 0, irq);
  126. memory_region_add_subregion(get_system_io(),
  127. base,
  128. sysbus_mmio_get_region(s, 0));
  129. }
  130. static void
  131. mips_mipssim_init(MachineState *machine)
  132. {
  133. const char *kernel_filename = machine->kernel_filename;
  134. const char *kernel_cmdline = machine->kernel_cmdline;
  135. const char *initrd_filename = machine->initrd_filename;
  136. char *filename;
  137. MemoryRegion *address_space_mem = get_system_memory();
  138. MemoryRegion *isa = g_new(MemoryRegion, 1);
  139. MemoryRegion *bios = g_new(MemoryRegion, 1);
  140. MIPSCPU *cpu;
  141. CPUMIPSState *env;
  142. ResetData *reset_info;
  143. int bios_size;
  144. /* Init CPUs. */
  145. cpu = MIPS_CPU(cpu_create(machine->cpu_type));
  146. env = &cpu->env;
  147. reset_info = g_malloc0(sizeof(ResetData));
  148. reset_info->cpu = cpu;
  149. reset_info->vector = env->active_tc.PC;
  150. qemu_register_reset(main_cpu_reset, reset_info);
  151. /* Allocate RAM. */
  152. memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
  153. &error_fatal);
  154. memory_region_add_subregion(address_space_mem, 0, machine->ram);
  155. /* Map the BIOS / boot exception handler. */
  156. memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
  157. /* Load a BIOS / boot exception handler image. */
  158. if (bios_name == NULL) {
  159. bios_name = BIOS_FILENAME;
  160. }
  161. filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
  162. if (filename) {
  163. bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE);
  164. g_free(filename);
  165. } else {
  166. bios_size = -1;
  167. }
  168. if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
  169. !kernel_filename && !qtest_enabled()) {
  170. /* Bail out if we have neither a kernel image nor boot vector code. */
  171. error_report("Could not load MIPS bios '%s', and no "
  172. "-kernel argument was specified", bios_name);
  173. exit(1);
  174. } else {
  175. /* We have a boot vector start address. */
  176. env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
  177. }
  178. if (kernel_filename) {
  179. loaderparams.ram_size = machine->ram_size;
  180. loaderparams.kernel_filename = kernel_filename;
  181. loaderparams.kernel_cmdline = kernel_cmdline;
  182. loaderparams.initrd_filename = initrd_filename;
  183. reset_info->vector = load_kernel();
  184. }
  185. /* Init CPU internal devices. */
  186. cpu_mips_irq_init_cpu(cpu);
  187. cpu_mips_clock_init(cpu);
  188. /* Register 64 KB of ISA IO space at 0x1fd00000. */
  189. memory_region_init_alias(isa, NULL, "isa_mmio",
  190. get_system_io(), 0, 0x00010000);
  191. memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
  192. /*
  193. * A single 16450 sits at offset 0x3f8. It is attached to
  194. * MIPS CPU INT2, which is interrupt 4.
  195. */
  196. if (serial_hd(0)) {
  197. DeviceState *dev = qdev_new(TYPE_SERIAL_IO);
  198. qdev_prop_set_chr(dev, "chardev", serial_hd(0));
  199. qdev_set_legacy_instance_id(dev, 0x3f8, 2);
  200. sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  201. sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]);
  202. sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8,
  203. sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
  204. }
  205. if (nd_table[0].used)
  206. /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
  207. mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
  208. }
  209. static void mips_mipssim_machine_init(MachineClass *mc)
  210. {
  211. mc->desc = "MIPS MIPSsim platform";
  212. mc->init = mips_mipssim_init;
  213. #ifdef TARGET_MIPS64
  214. mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
  215. #else
  216. mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
  217. #endif
  218. mc->default_ram_id = "mips_mipssim.ram";
  219. }
  220. DEFINE_MACHINE("mipssim", mips_mipssim_machine_init)