fuloong2e.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400
  1. /*
  2. * QEMU fuloong 2e mini pc support
  3. *
  4. * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
  5. * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
  6. * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
  7. * This code is licensed under the GNU GPL v2.
  8. *
  9. * Contributions after 2012-01-13 are licensed under the terms of the
  10. * GNU GPL, version 2 or (at your option) any later version.
  11. */
  12. /*
  13. * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
  14. * https://www.linux-mips.org/wiki/Fuloong_2E
  15. *
  16. * Loongson 2e user manual:
  17. * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
  18. */
  19. #include "qemu/osdep.h"
  20. #include "qemu-common.h"
  21. #include "qemu/units.h"
  22. #include "qapi/error.h"
  23. #include "cpu.h"
  24. #include "hw/intc/i8259.h"
  25. #include "hw/dma/i8257.h"
  26. #include "hw/isa/superio.h"
  27. #include "net/net.h"
  28. #include "hw/boards.h"
  29. #include "hw/i2c/smbus_eeprom.h"
  30. #include "hw/block/flash.h"
  31. #include "hw/mips/mips.h"
  32. #include "hw/mips/cpudevs.h"
  33. #include "hw/pci/pci.h"
  34. #include "qemu/log.h"
  35. #include "hw/loader.h"
  36. #include "hw/ide/pci.h"
  37. #include "elf.h"
  38. #include "hw/isa/vt82c686.h"
  39. #include "hw/rtc/mc146818rtc.h"
  40. #include "hw/timer/i8254.h"
  41. #include "exec/address-spaces.h"
  42. #include "sysemu/qtest.h"
  43. #include "sysemu/reset.h"
  44. #include "qemu/error-report.h"
  45. #define DEBUG_FULOONG2E_INIT
  46. #define ENVP_ADDR 0x80002000l
  47. #define ENVP_NB_ENTRIES 16
  48. #define ENVP_ENTRY_SIZE 256
  49. /* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
  50. #define BIOS_SIZE (512 * KiB)
  51. #define MAX_IDE_BUS 2
  52. /*
  53. * PMON is not part of qemu and released with BSD license, anyone
  54. * who want to build a pmon binary please first git-clone the source
  55. * from the git repository at:
  56. * http://www.loongson.cn/support/git/pmon
  57. * Then follow the "Compile Guide" available at:
  58. * http://dev.lemote.com/code/pmon
  59. *
  60. * Notes:
  61. * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
  62. * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
  63. * in the "Compile Guide".
  64. */
  65. #define FULOONG_BIOSNAME "pmon_2e.bin"
  66. /* PCI SLOT in Fuloong 2e */
  67. #define FULOONG2E_VIA_SLOT 5
  68. #define FULOONG2E_ATI_SLOT 6
  69. #define FULOONG2E_RTL8139_SLOT 7
  70. static struct _loaderparams {
  71. int ram_size;
  72. const char *kernel_filename;
  73. const char *kernel_cmdline;
  74. const char *initrd_filename;
  75. } loaderparams;
  76. static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
  77. const char *string, ...)
  78. {
  79. va_list ap;
  80. int32_t table_addr;
  81. if (index >= ENVP_NB_ENTRIES) {
  82. return;
  83. }
  84. if (string == NULL) {
  85. prom_buf[index] = 0;
  86. return;
  87. }
  88. table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
  89. prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
  90. va_start(ap, string);
  91. vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
  92. va_end(ap);
  93. }
  94. static int64_t load_kernel(CPUMIPSState *env)
  95. {
  96. int64_t kernel_entry, kernel_low, kernel_high, initrd_size;
  97. int index = 0;
  98. long kernel_size;
  99. ram_addr_t initrd_offset;
  100. uint32_t *prom_buf;
  101. long prom_size;
  102. kernel_size = load_elf(loaderparams.kernel_filename, NULL,
  103. cpu_mips_kseg0_to_phys, NULL,
  104. (uint64_t *)&kernel_entry,
  105. (uint64_t *)&kernel_low, (uint64_t *)&kernel_high,
  106. NULL, 0, EM_MIPS, 1, 0);
  107. if (kernel_size < 0) {
  108. error_report("could not load kernel '%s': %s",
  109. loaderparams.kernel_filename,
  110. load_elf_strerror(kernel_size));
  111. exit(1);
  112. }
  113. /* load initrd */
  114. initrd_size = 0;
  115. initrd_offset = 0;
  116. if (loaderparams.initrd_filename) {
  117. initrd_size = get_image_size(loaderparams.initrd_filename);
  118. if (initrd_size > 0) {
  119. initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) &
  120. INITRD_PAGE_MASK;
  121. if (initrd_offset + initrd_size > ram_size) {
  122. error_report("memory too small for initial ram disk '%s'",
  123. loaderparams.initrd_filename);
  124. exit(1);
  125. }
  126. initrd_size = load_image_targphys(loaderparams.initrd_filename,
  127. initrd_offset,
  128. ram_size - initrd_offset);
  129. }
  130. if (initrd_size == (target_ulong) -1) {
  131. error_report("could not load initial ram disk '%s'",
  132. loaderparams.initrd_filename);
  133. exit(1);
  134. }
  135. }
  136. /* Setup prom parameters. */
  137. prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
  138. prom_buf = g_malloc(prom_size);
  139. prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
  140. if (initrd_size > 0) {
  141. prom_set(prom_buf, index++,
  142. "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
  143. cpu_mips_phys_to_kseg0(NULL, initrd_offset),
  144. initrd_size, loaderparams.kernel_cmdline);
  145. } else {
  146. prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
  147. }
  148. /* Setup minimum environment variables */
  149. prom_set(prom_buf, index++, "busclock=33000000");
  150. prom_set(prom_buf, index++, "cpuclock=100000000");
  151. prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
  152. prom_set(prom_buf, index++, "modetty0=38400n8r");
  153. prom_set(prom_buf, index++, NULL);
  154. rom_add_blob_fixed("prom", prom_buf, prom_size,
  155. cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
  156. g_free(prom_buf);
  157. return kernel_entry;
  158. }
  159. static void write_bootloader(CPUMIPSState *env, uint8_t *base,
  160. int64_t kernel_addr)
  161. {
  162. uint32_t *p;
  163. /* Small bootloader */
  164. p = (uint32_t *)base;
  165. /* j 0x1fc00040 */
  166. stl_p(p++, 0x0bf00010);
  167. /* nop */
  168. stl_p(p++, 0x00000000);
  169. /* Second part of the bootloader */
  170. p = (uint32_t *)(base + 0x040);
  171. /* lui a0, 0 */
  172. stl_p(p++, 0x3c040000);
  173. /* ori a0, a0, 2 */
  174. stl_p(p++, 0x34840002);
  175. /* lui a1, high(ENVP_ADDR) */
  176. stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));
  177. /* ori a1, a0, low(ENVP_ADDR) */
  178. stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));
  179. /* lui a2, high(ENVP_ADDR + 8) */
  180. stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff));
  181. /* ori a2, a2, low(ENVP_ADDR + 8) */
  182. stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));
  183. /* lui a3, high(env->ram_size) */
  184. stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));
  185. /* ori a3, a3, low(env->ram_size) */
  186. stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));
  187. /* lui ra, high(kernel_addr) */
  188. stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));
  189. /* ori ra, ra, low(kernel_addr) */
  190. stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));
  191. /* jr ra */
  192. stl_p(p++, 0x03e00008);
  193. /* nop */
  194. stl_p(p++, 0x00000000);
  195. }
  196. static void main_cpu_reset(void *opaque)
  197. {
  198. MIPSCPU *cpu = opaque;
  199. CPUMIPSState *env = &cpu->env;
  200. cpu_reset(CPU(cpu));
  201. /* TODO: 2E reset stuff */
  202. if (loaderparams.kernel_filename) {
  203. env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
  204. }
  205. }
  206. static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
  207. I2CBus **i2c_bus, ISABus **p_isa_bus)
  208. {
  209. qemu_irq *i8259;
  210. ISABus *isa_bus;
  211. PCIDevice *dev;
  212. isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
  213. if (!isa_bus) {
  214. fprintf(stderr, "vt82c686b_init error\n");
  215. exit(1);
  216. }
  217. *p_isa_bus = isa_bus;
  218. /* Interrupt controller */
  219. /* The 8259 -> IP5 */
  220. i8259 = i8259_init(isa_bus, intc);
  221. isa_bus_irqs(isa_bus, i8259);
  222. /* init other devices */
  223. i8254_pit_init(isa_bus, 0x40, 0, NULL);
  224. i8257_dma_init(isa_bus, 0);
  225. /* Super I/O */
  226. isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
  227. dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide");
  228. pci_ide_create_devs(dev);
  229. pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
  230. pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
  231. *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
  232. /* Audio support */
  233. vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
  234. vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
  235. }
  236. /* Network support */
  237. static void network_init(PCIBus *pci_bus)
  238. {
  239. int i;
  240. for (i = 0; i < nb_nics; i++) {
  241. NICInfo *nd = &nd_table[i];
  242. const char *default_devaddr = NULL;
  243. if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
  244. /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
  245. default_devaddr = "07";
  246. }
  247. pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
  248. }
  249. }
  250. static void mips_fuloong2e_init(MachineState *machine)
  251. {
  252. const char *kernel_filename = machine->kernel_filename;
  253. const char *kernel_cmdline = machine->kernel_cmdline;
  254. const char *initrd_filename = machine->initrd_filename;
  255. char *filename;
  256. MemoryRegion *address_space_mem = get_system_memory();
  257. MemoryRegion *bios = g_new(MemoryRegion, 1);
  258. long bios_size;
  259. uint8_t *spd_data;
  260. int64_t kernel_entry;
  261. PCIDevice *pci_dev;
  262. PCIBus *pci_bus;
  263. ISABus *isa_bus;
  264. I2CBus *smbus;
  265. MIPSCPU *cpu;
  266. CPUMIPSState *env;
  267. DeviceState *dev;
  268. /* init CPUs */
  269. cpu = MIPS_CPU(cpu_create(machine->cpu_type));
  270. env = &cpu->env;
  271. qemu_register_reset(main_cpu_reset, cpu);
  272. /* TODO: support more than 256M RAM as highmem */
  273. if (machine->ram_size != 256 * MiB) {
  274. error_report("Invalid RAM size, should be 256MB");
  275. exit(EXIT_FAILURE);
  276. }
  277. memory_region_add_subregion(address_space_mem, 0, machine->ram);
  278. /* Boot ROM */
  279. memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
  280. &error_fatal);
  281. memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
  282. /*
  283. * We do not support flash operation, just loading pmon.bin as raw BIOS.
  284. * Please use -L to set the BIOS path and -bios to set bios name.
  285. */
  286. if (kernel_filename) {
  287. loaderparams.ram_size = machine->ram_size;
  288. loaderparams.kernel_filename = kernel_filename;
  289. loaderparams.kernel_cmdline = kernel_cmdline;
  290. loaderparams.initrd_filename = initrd_filename;
  291. kernel_entry = load_kernel(env);
  292. write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
  293. } else {
  294. if (bios_name == NULL) {
  295. bios_name = FULOONG_BIOSNAME;
  296. }
  297. filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
  298. if (filename) {
  299. bios_size = load_image_targphys(filename, 0x1fc00000LL,
  300. BIOS_SIZE);
  301. g_free(filename);
  302. } else {
  303. bios_size = -1;
  304. }
  305. if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
  306. !kernel_filename && !qtest_enabled()) {
  307. error_report("Could not load MIPS bios '%s'", bios_name);
  308. exit(1);
  309. }
  310. }
  311. /* Init internal devices */
  312. cpu_mips_irq_init_cpu(cpu);
  313. cpu_mips_clock_init(cpu);
  314. /* North bridge, Bonito --> IP2 */
  315. pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
  316. /* South bridge -> IP5 */
  317. vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
  318. &smbus, &isa_bus);
  319. /* GPU */
  320. if (vga_interface_type != VGA_NONE) {
  321. pci_dev = pci_new(-1, "ati-vga");
  322. dev = DEVICE(pci_dev);
  323. qdev_prop_set_uint32(dev, "vgamem_mb", 16);
  324. qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
  325. pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
  326. }
  327. /* Populate SPD eeprom data */
  328. spd_data = spd_data_generate(DDR, machine->ram_size);
  329. smbus_eeprom_init_one(smbus, 0x50, spd_data);
  330. mc146818_rtc_init(isa_bus, 2000, NULL);
  331. /* Network card: RTL8139D */
  332. network_init(pci_bus);
  333. }
  334. static void mips_fuloong2e_machine_init(MachineClass *mc)
  335. {
  336. mc->desc = "Fuloong 2e mini pc";
  337. mc->alias = "fulong2e"; /* Incorrect name used up to QEMU 4.2 */
  338. mc->init = mips_fuloong2e_init;
  339. mc->block_default_type = IF_IDE;
  340. mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
  341. mc->default_ram_size = 256 * MiB;
  342. mc->default_ram_id = "fuloong2e.ram";
  343. mc->minimum_page_bits = 14;
  344. }
  345. DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)