ssd0323.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386
  1. /*
  2. * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
  3. *
  4. * Copyright (c) 2006-2007 CodeSourcery.
  5. * Written by Paul Brook
  6. *
  7. * This code is licensed under the GPL.
  8. */
  9. /* The controller can support a variety of different displays, but we only
  10. implement one. Most of the commends relating to brightness and geometry
  11. setup are ignored. */
  12. #include "qemu/osdep.h"
  13. #include "hw/ssi/ssi.h"
  14. #include "migration/vmstate.h"
  15. #include "qemu/module.h"
  16. #include "ui/console.h"
  17. //#define DEBUG_SSD0323 1
  18. #ifdef DEBUG_SSD0323
  19. #define DPRINTF(fmt, ...) \
  20. do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
  21. #define BADF(fmt, ...) \
  22. do { \
  23. fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); abort(); \
  24. } while (0)
  25. #else
  26. #define DPRINTF(fmt, ...) do {} while(0)
  27. #define BADF(fmt, ...) \
  28. do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
  29. #endif
  30. /* Scaling factor for pixels. */
  31. #define MAGNIFY 4
  32. #define REMAP_SWAP_COLUMN 0x01
  33. #define REMAP_SWAP_NYBBLE 0x02
  34. #define REMAP_VERTICAL 0x04
  35. #define REMAP_SWAP_COM 0x10
  36. #define REMAP_SPLIT_COM 0x40
  37. enum ssd0323_mode
  38. {
  39. SSD0323_CMD,
  40. SSD0323_DATA
  41. };
  42. typedef struct {
  43. SSISlave ssidev;
  44. QemuConsole *con;
  45. uint32_t cmd_len;
  46. int32_t cmd;
  47. int32_t cmd_data[8];
  48. int32_t row;
  49. int32_t row_start;
  50. int32_t row_end;
  51. int32_t col;
  52. int32_t col_start;
  53. int32_t col_end;
  54. int32_t redraw;
  55. int32_t remap;
  56. uint32_t mode;
  57. uint8_t framebuffer[128 * 80 / 2];
  58. } ssd0323_state;
  59. #define TYPE_SSD0323 "ssd0323"
  60. #define SSD0323(obj) OBJECT_CHECK(ssd0323_state, (obj), TYPE_SSD0323)
  61. static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
  62. {
  63. ssd0323_state *s = SSD0323(dev);
  64. switch (s->mode) {
  65. case SSD0323_DATA:
  66. DPRINTF("data 0x%02x\n", data);
  67. s->framebuffer[s->col + s->row * 64] = data;
  68. if (s->remap & REMAP_VERTICAL) {
  69. s->row++;
  70. if (s->row > s->row_end) {
  71. s->row = s->row_start;
  72. s->col++;
  73. }
  74. if (s->col > s->col_end) {
  75. s->col = s->col_start;
  76. }
  77. } else {
  78. s->col++;
  79. if (s->col > s->col_end) {
  80. s->row++;
  81. s->col = s->col_start;
  82. }
  83. if (s->row > s->row_end) {
  84. s->row = s->row_start;
  85. }
  86. }
  87. s->redraw = 1;
  88. break;
  89. case SSD0323_CMD:
  90. DPRINTF("cmd 0x%02x\n", data);
  91. if (s->cmd_len == 0) {
  92. s->cmd = data;
  93. } else {
  94. s->cmd_data[s->cmd_len - 1] = data;
  95. }
  96. s->cmd_len++;
  97. switch (s->cmd) {
  98. #define DATA(x) if (s->cmd_len <= (x)) return 0
  99. case 0x15: /* Set column. */
  100. DATA(2);
  101. s->col = s->col_start = s->cmd_data[0] % 64;
  102. s->col_end = s->cmd_data[1] % 64;
  103. break;
  104. case 0x75: /* Set row. */
  105. DATA(2);
  106. s->row = s->row_start = s->cmd_data[0] % 80;
  107. s->row_end = s->cmd_data[1] % 80;
  108. break;
  109. case 0x81: /* Set contrast */
  110. DATA(1);
  111. break;
  112. case 0x84: case 0x85: case 0x86: /* Max current. */
  113. DATA(0);
  114. break;
  115. case 0xa0: /* Set remapping. */
  116. /* FIXME: Implement this. */
  117. DATA(1);
  118. s->remap = s->cmd_data[0];
  119. break;
  120. case 0xa1: /* Set display start line. */
  121. case 0xa2: /* Set display offset. */
  122. /* FIXME: Implement these. */
  123. DATA(1);
  124. break;
  125. case 0xa4: /* Normal mode. */
  126. case 0xa5: /* All on. */
  127. case 0xa6: /* All off. */
  128. case 0xa7: /* Inverse. */
  129. /* FIXME: Implement these. */
  130. DATA(0);
  131. break;
  132. case 0xa8: /* Set multiplex ratio. */
  133. case 0xad: /* Set DC-DC converter. */
  134. DATA(1);
  135. /* Ignored. Don't care. */
  136. break;
  137. case 0xae: /* Display off. */
  138. case 0xaf: /* Display on. */
  139. DATA(0);
  140. /* TODO: Implement power control. */
  141. break;
  142. case 0xb1: /* Set phase length. */
  143. case 0xb2: /* Set row period. */
  144. case 0xb3: /* Set clock rate. */
  145. case 0xbc: /* Set precharge. */
  146. case 0xbe: /* Set VCOMH. */
  147. case 0xbf: /* Set segment low. */
  148. DATA(1);
  149. /* Ignored. Don't care. */
  150. break;
  151. case 0xb8: /* Set grey scale table. */
  152. /* FIXME: Implement this. */
  153. DATA(8);
  154. break;
  155. case 0xe3: /* NOP. */
  156. DATA(0);
  157. break;
  158. case 0xff: /* Nasty hack because we don't handle chip selects
  159. properly. */
  160. break;
  161. default:
  162. BADF("Unknown command: 0x%x\n", data);
  163. }
  164. s->cmd_len = 0;
  165. return 0;
  166. }
  167. return 0;
  168. }
  169. static void ssd0323_update_display(void *opaque)
  170. {
  171. ssd0323_state *s = (ssd0323_state *)opaque;
  172. DisplaySurface *surface = qemu_console_surface(s->con);
  173. uint8_t *dest;
  174. uint8_t *src;
  175. int x;
  176. int y;
  177. int i;
  178. int line;
  179. char *colors[16];
  180. char colortab[MAGNIFY * 64];
  181. char *p;
  182. int dest_width;
  183. if (!s->redraw)
  184. return;
  185. switch (surface_bits_per_pixel(surface)) {
  186. case 0:
  187. return;
  188. case 15:
  189. dest_width = 2;
  190. break;
  191. case 16:
  192. dest_width = 2;
  193. break;
  194. case 24:
  195. dest_width = 3;
  196. break;
  197. case 32:
  198. dest_width = 4;
  199. break;
  200. default:
  201. BADF("Bad color depth\n");
  202. return;
  203. }
  204. p = colortab;
  205. for (i = 0; i < 16; i++) {
  206. int n;
  207. colors[i] = p;
  208. switch (surface_bits_per_pixel(surface)) {
  209. case 15:
  210. n = i * 2 + (i >> 3);
  211. p[0] = n | (n << 5);
  212. p[1] = (n << 2) | (n >> 3);
  213. break;
  214. case 16:
  215. n = i * 2 + (i >> 3);
  216. p[0] = n | (n << 6) | ((n << 1) & 0x20);
  217. p[1] = (n << 3) | (n >> 2);
  218. break;
  219. case 24:
  220. case 32:
  221. n = (i << 4) | i;
  222. p[0] = p[1] = p[2] = n;
  223. break;
  224. default:
  225. BADF("Bad color depth\n");
  226. return;
  227. }
  228. p += dest_width;
  229. }
  230. /* TODO: Implement row/column remapping. */
  231. dest = surface_data(surface);
  232. for (y = 0; y < 64; y++) {
  233. line = y;
  234. src = s->framebuffer + 64 * line;
  235. for (x = 0; x < 64; x++) {
  236. int val;
  237. val = *src >> 4;
  238. for (i = 0; i < MAGNIFY; i++) {
  239. memcpy(dest, colors[val], dest_width);
  240. dest += dest_width;
  241. }
  242. val = *src & 0xf;
  243. for (i = 0; i < MAGNIFY; i++) {
  244. memcpy(dest, colors[val], dest_width);
  245. dest += dest_width;
  246. }
  247. src++;
  248. }
  249. for (i = 1; i < MAGNIFY; i++) {
  250. memcpy(dest, dest - dest_width * MAGNIFY * 128,
  251. dest_width * 128 * MAGNIFY);
  252. dest += dest_width * 128 * MAGNIFY;
  253. }
  254. }
  255. s->redraw = 0;
  256. dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
  257. }
  258. static void ssd0323_invalidate_display(void * opaque)
  259. {
  260. ssd0323_state *s = (ssd0323_state *)opaque;
  261. s->redraw = 1;
  262. }
  263. /* Command/data input. */
  264. static void ssd0323_cd(void *opaque, int n, int level)
  265. {
  266. ssd0323_state *s = (ssd0323_state *)opaque;
  267. DPRINTF("%s mode\n", level ? "Data" : "Command");
  268. s->mode = level ? SSD0323_DATA : SSD0323_CMD;
  269. }
  270. static int ssd0323_post_load(void *opaque, int version_id)
  271. {
  272. ssd0323_state *s = (ssd0323_state *)opaque;
  273. if (s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
  274. return -EINVAL;
  275. }
  276. if (s->row < 0 || s->row >= 80) {
  277. return -EINVAL;
  278. }
  279. if (s->row_start < 0 || s->row_start >= 80) {
  280. return -EINVAL;
  281. }
  282. if (s->row_end < 0 || s->row_end >= 80) {
  283. return -EINVAL;
  284. }
  285. if (s->col < 0 || s->col >= 64) {
  286. return -EINVAL;
  287. }
  288. if (s->col_start < 0 || s->col_start >= 64) {
  289. return -EINVAL;
  290. }
  291. if (s->col_end < 0 || s->col_end >= 64) {
  292. return -EINVAL;
  293. }
  294. if (s->mode != SSD0323_CMD && s->mode != SSD0323_DATA) {
  295. return -EINVAL;
  296. }
  297. return 0;
  298. }
  299. static const VMStateDescription vmstate_ssd0323 = {
  300. .name = "ssd0323_oled",
  301. .version_id = 2,
  302. .minimum_version_id = 2,
  303. .post_load = ssd0323_post_load,
  304. .fields = (VMStateField []) {
  305. VMSTATE_UINT32(cmd_len, ssd0323_state),
  306. VMSTATE_INT32(cmd, ssd0323_state),
  307. VMSTATE_INT32_ARRAY(cmd_data, ssd0323_state, 8),
  308. VMSTATE_INT32(row, ssd0323_state),
  309. VMSTATE_INT32(row_start, ssd0323_state),
  310. VMSTATE_INT32(row_end, ssd0323_state),
  311. VMSTATE_INT32(col, ssd0323_state),
  312. VMSTATE_INT32(col_start, ssd0323_state),
  313. VMSTATE_INT32(col_end, ssd0323_state),
  314. VMSTATE_INT32(redraw, ssd0323_state),
  315. VMSTATE_INT32(remap, ssd0323_state),
  316. VMSTATE_UINT32(mode, ssd0323_state),
  317. VMSTATE_BUFFER(framebuffer, ssd0323_state),
  318. VMSTATE_SSI_SLAVE(ssidev, ssd0323_state),
  319. VMSTATE_END_OF_LIST()
  320. }
  321. };
  322. static const GraphicHwOps ssd0323_ops = {
  323. .invalidate = ssd0323_invalidate_display,
  324. .gfx_update = ssd0323_update_display,
  325. };
  326. static void ssd0323_realize(SSISlave *d, Error **errp)
  327. {
  328. DeviceState *dev = DEVICE(d);
  329. ssd0323_state *s = SSD0323(d);
  330. s->col_end = 63;
  331. s->row_end = 79;
  332. s->con = graphic_console_init(dev, 0, &ssd0323_ops, s);
  333. qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY);
  334. qdev_init_gpio_in(dev, ssd0323_cd, 1);
  335. }
  336. static void ssd0323_class_init(ObjectClass *klass, void *data)
  337. {
  338. DeviceClass *dc = DEVICE_CLASS(klass);
  339. SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
  340. k->realize = ssd0323_realize;
  341. k->transfer = ssd0323_transfer;
  342. k->cs_polarity = SSI_CS_HIGH;
  343. dc->vmsd = &vmstate_ssd0323;
  344. }
  345. static const TypeInfo ssd0323_info = {
  346. .name = TYPE_SSD0323,
  347. .parent = TYPE_SSI_SLAVE,
  348. .instance_size = sizeof(ssd0323_state),
  349. .class_init = ssd0323_class_init,
  350. };
  351. static void ssd03232_register_types(void)
  352. {
  353. type_register_static(&ssd0323_info);
  354. }
  355. type_init(ssd03232_register_types)