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exynos4_boards.c 6.2 KB

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  1. /*
  2. * Samsung exynos4 SoC based boards emulation
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
  5. * Maksim Kozlov <m.kozlov@samsung.com>
  6. * Evgeny Voevodin <e.voevodin@samsung.com>
  7. * Igor Mitsyanko <i.mitsyanko@samsung.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  17. * for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along
  20. * with this program; if not, see <http://www.gnu.org/licenses/>.
  21. *
  22. */
  23. #include "qemu/osdep.h"
  24. #include "qemu/units.h"
  25. #include "qapi/error.h"
  26. #include "qemu/error-report.h"
  27. #include "cpu.h"
  28. #include "sysemu/sysemu.h"
  29. #include "hw/sysbus.h"
  30. #include "net/net.h"
  31. #include "hw/arm/boot.h"
  32. #include "exec/address-spaces.h"
  33. #include "hw/arm/exynos4210.h"
  34. #include "hw/net/lan9118.h"
  35. #include "hw/qdev-properties.h"
  36. #include "hw/boards.h"
  37. #include "hw/irq.h"
  38. #define SMDK_LAN9118_BASE_ADDR 0x05000000
  39. typedef enum Exynos4BoardType {
  40. EXYNOS4_BOARD_NURI,
  41. EXYNOS4_BOARD_SMDKC210,
  42. EXYNOS4_NUM_OF_BOARDS
  43. } Exynos4BoardType;
  44. typedef struct Exynos4BoardState {
  45. Exynos4210State soc;
  46. MemoryRegion dram0_mem;
  47. MemoryRegion dram1_mem;
  48. } Exynos4BoardState;
  49. static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
  50. [EXYNOS4_BOARD_NURI] = 0xD33,
  51. [EXYNOS4_BOARD_SMDKC210] = 0xB16,
  52. };
  53. static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
  54. [EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG,
  55. [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
  56. };
  57. static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
  58. [EXYNOS4_BOARD_NURI] = 1 * GiB,
  59. [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
  60. };
  61. static struct arm_boot_info exynos4_board_binfo = {
  62. .loader_start = EXYNOS4210_BASE_BOOT_ADDR,
  63. .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
  64. .nb_cpus = EXYNOS4210_NCPUS,
  65. .write_secondary_boot = exynos4210_write_secondary,
  66. };
  67. static void lan9215_init(uint32_t base, qemu_irq irq)
  68. {
  69. DeviceState *dev;
  70. SysBusDevice *s;
  71. /* This should be a 9215 but the 9118 is close enough */
  72. if (nd_table[0].used) {
  73. qemu_check_nic_model(&nd_table[0], "lan9118");
  74. dev = qdev_new(TYPE_LAN9118);
  75. qdev_set_nic_properties(dev, &nd_table[0]);
  76. qdev_prop_set_uint32(dev, "mode_16bit", 1);
  77. s = SYS_BUS_DEVICE(dev);
  78. sysbus_realize_and_unref(s, &error_fatal);
  79. sysbus_mmio_map(s, 0, base);
  80. sysbus_connect_irq(s, 0, irq);
  81. }
  82. }
  83. static void exynos4_boards_init_ram(Exynos4BoardState *s,
  84. MemoryRegion *system_mem,
  85. unsigned long ram_size)
  86. {
  87. unsigned long mem_size = ram_size;
  88. if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
  89. memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
  90. mem_size - EXYNOS4210_DRAM_MAX_SIZE,
  91. &error_fatal);
  92. memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
  93. &s->dram1_mem);
  94. mem_size = EXYNOS4210_DRAM_MAX_SIZE;
  95. }
  96. memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
  97. &error_fatal);
  98. memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
  99. &s->dram0_mem);
  100. }
  101. static Exynos4BoardState *
  102. exynos4_boards_init_common(MachineState *machine,
  103. Exynos4BoardType board_type)
  104. {
  105. Exynos4BoardState *s = g_new(Exynos4BoardState, 1);
  106. exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
  107. exynos4_board_binfo.board_id = exynos4_board_id[board_type];
  108. exynos4_board_binfo.smp_bootreg_addr =
  109. exynos4_board_smp_bootreg_addr[board_type];
  110. exynos4_board_binfo.gic_cpu_if_addr =
  111. EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
  112. exynos4_boards_init_ram(s, get_system_memory(),
  113. exynos4_board_ram_size[board_type]);
  114. object_initialize_child(OBJECT(machine), "soc", &s->soc,
  115. TYPE_EXYNOS4210_SOC);
  116. sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
  117. return s;
  118. }
  119. static void nuri_init(MachineState *machine)
  120. {
  121. exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI);
  122. arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo);
  123. }
  124. static void smdkc210_init(MachineState *machine)
  125. {
  126. Exynos4BoardState *s = exynos4_boards_init_common(machine,
  127. EXYNOS4_BOARD_SMDKC210);
  128. lan9215_init(SMDK_LAN9118_BASE_ADDR,
  129. qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
  130. arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo);
  131. }
  132. static void nuri_class_init(ObjectClass *oc, void *data)
  133. {
  134. MachineClass *mc = MACHINE_CLASS(oc);
  135. mc->desc = "Samsung NURI board (Exynos4210)";
  136. mc->init = nuri_init;
  137. mc->max_cpus = EXYNOS4210_NCPUS;
  138. mc->min_cpus = EXYNOS4210_NCPUS;
  139. mc->default_cpus = EXYNOS4210_NCPUS;
  140. mc->ignore_memory_transaction_failures = true;
  141. }
  142. static const TypeInfo nuri_type = {
  143. .name = MACHINE_TYPE_NAME("nuri"),
  144. .parent = TYPE_MACHINE,
  145. .class_init = nuri_class_init,
  146. };
  147. static void smdkc210_class_init(ObjectClass *oc, void *data)
  148. {
  149. MachineClass *mc = MACHINE_CLASS(oc);
  150. mc->desc = "Samsung SMDKC210 board (Exynos4210)";
  151. mc->init = smdkc210_init;
  152. mc->max_cpus = EXYNOS4210_NCPUS;
  153. mc->min_cpus = EXYNOS4210_NCPUS;
  154. mc->default_cpus = EXYNOS4210_NCPUS;
  155. mc->ignore_memory_transaction_failures = true;
  156. }
  157. static const TypeInfo smdkc210_type = {
  158. .name = MACHINE_TYPE_NAME("smdkc210"),
  159. .parent = TYPE_MACHINE,
  160. .class_init = smdkc210_class_init,
  161. };
  162. static void exynos4_machines_init(void)
  163. {
  164. type_register_static(&nuri_type);
  165. type_register_static(&smdkc210_type);
  166. }
  167. type_init(exynos4_machines_init)