bcm2835_peripherals.c 14 KB

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  1. /*
  2. * Raspberry Pi emulation (c) 2012 Gregory Estrade
  3. * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
  4. *
  5. * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
  6. * Written by Andrew Baumann
  7. *
  8. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  9. * See the COPYING file in the top-level directory.
  10. */
  11. #include "qemu/osdep.h"
  12. #include "qapi/error.h"
  13. #include "qemu/module.h"
  14. #include "hw/arm/bcm2835_peripherals.h"
  15. #include "hw/misc/bcm2835_mbox_defs.h"
  16. #include "hw/arm/raspi_platform.h"
  17. #include "sysemu/sysemu.h"
  18. /* Peripheral base address on the VC (GPU) system bus */
  19. #define BCM2835_VC_PERI_BASE 0x7e000000
  20. /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
  21. #define BCM2835_SDHC_CAPAREG 0x52134b4
  22. static void create_unimp(BCM2835PeripheralState *ps,
  23. UnimplementedDeviceState *uds,
  24. const char *name, hwaddr ofs, hwaddr size)
  25. {
  26. object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
  27. qdev_prop_set_string(DEVICE(uds), "name", name);
  28. qdev_prop_set_uint64(DEVICE(uds), "size", size);
  29. sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
  30. memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
  31. sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
  32. }
  33. static void bcm2835_peripherals_init(Object *obj)
  34. {
  35. BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
  36. /* Memory region for peripheral devices, which we export to our parent */
  37. memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
  38. sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
  39. /* Internal memory region for peripheral bus addresses (not exported) */
  40. memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
  41. /* Internal memory region for request/response communication with
  42. * mailbox-addressable peripherals (not exported)
  43. */
  44. memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
  45. MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
  46. /* Interrupt Controller */
  47. object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
  48. /* SYS Timer */
  49. object_initialize_child(obj, "systimer", &s->systmr,
  50. TYPE_BCM2835_SYSTIMER);
  51. /* UART0 */
  52. object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
  53. /* AUX / UART1 */
  54. object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
  55. /* Mailboxes */
  56. object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
  57. object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
  58. OBJECT(&s->mbox_mr));
  59. /* Framebuffer */
  60. object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
  61. object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
  62. object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
  63. OBJECT(&s->gpu_bus_mr));
  64. /* Property channel */
  65. object_initialize_child(obj, "property", &s->property,
  66. TYPE_BCM2835_PROPERTY);
  67. object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
  68. "board-rev");
  69. object_property_add_const_link(OBJECT(&s->property), "fb",
  70. OBJECT(&s->fb));
  71. object_property_add_const_link(OBJECT(&s->property), "dma-mr",
  72. OBJECT(&s->gpu_bus_mr));
  73. /* Random Number Generator */
  74. object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
  75. /* Extended Mass Media Controller */
  76. object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
  77. /* SDHOST */
  78. object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
  79. /* DMA Channels */
  80. object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
  81. object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
  82. OBJECT(&s->gpu_bus_mr));
  83. /* Thermal */
  84. object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
  85. /* GPIO */
  86. object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
  87. object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
  88. OBJECT(&s->sdhci.sdbus));
  89. object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
  90. OBJECT(&s->sdhost.sdbus));
  91. /* Mphi */
  92. object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
  93. /* DWC2 */
  94. object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
  95. object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
  96. OBJECT(&s->gpu_bus_mr));
  97. }
  98. static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
  99. {
  100. BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
  101. Object *obj;
  102. MemoryRegion *ram;
  103. Error *err = NULL;
  104. uint64_t ram_size, vcram_size;
  105. int n;
  106. obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
  107. ram = MEMORY_REGION(obj);
  108. ram_size = memory_region_size(ram);
  109. /* Map peripherals and RAM into the GPU address space. */
  110. memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
  111. "bcm2835-peripherals", &s->peri_mr, 0,
  112. memory_region_size(&s->peri_mr));
  113. memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
  114. &s->peri_mr_alias, 1);
  115. /* RAM is aliased four times (different cache configurations) on the GPU */
  116. for (n = 0; n < 4; n++) {
  117. memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
  118. "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
  119. memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
  120. &s->ram_alias[n], 0);
  121. }
  122. /* Interrupt Controller */
  123. if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) {
  124. return;
  125. }
  126. memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
  127. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
  128. sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
  129. /* Sys Timer */
  130. if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) {
  131. return;
  132. }
  133. memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
  134. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
  135. sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
  136. qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
  137. INTERRUPT_ARM_TIMER));
  138. /* UART0 */
  139. qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
  140. if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) {
  141. return;
  142. }
  143. memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
  144. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
  145. sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
  146. qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
  147. INTERRUPT_UART0));
  148. /* AUX / UART1 */
  149. qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
  150. if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) {
  151. return;
  152. }
  153. memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
  154. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
  155. sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
  156. qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
  157. INTERRUPT_AUX));
  158. /* Mailboxes */
  159. if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) {
  160. return;
  161. }
  162. memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
  163. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
  164. sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
  165. qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
  166. INTERRUPT_ARM_MAILBOX));
  167. /* Framebuffer */
  168. vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
  169. if (err) {
  170. error_propagate(errp, err);
  171. return;
  172. }
  173. if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base",
  174. ram_size - vcram_size, errp)) {
  175. return;
  176. }
  177. if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) {
  178. return;
  179. }
  180. memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
  181. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
  182. sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
  183. qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
  184. /* Property channel */
  185. if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
  186. return;
  187. }
  188. memory_region_add_subregion(&s->mbox_mr,
  189. MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
  190. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
  191. sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
  192. qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
  193. /* Random Number Generator */
  194. if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) {
  195. return;
  196. }
  197. memory_region_add_subregion(&s->peri_mr, RNG_OFFSET,
  198. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
  199. /* Extended Mass Media Controller
  200. *
  201. * Compatible with:
  202. * - SD Host Controller Specification Version 3.0 Draft 1.0
  203. * - SDIO Specification Version 3.0
  204. * - MMC Specification Version 4.4
  205. *
  206. * For the exact details please refer to the Arasan documentation:
  207. * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
  208. */
  209. object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
  210. &error_abort);
  211. object_property_set_uint(OBJECT(&s->sdhci), "capareg",
  212. BCM2835_SDHC_CAPAREG, &error_abort);
  213. object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
  214. &error_abort);
  215. if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
  216. return;
  217. }
  218. memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
  219. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
  220. sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
  221. qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
  222. INTERRUPT_ARASANSDIO));
  223. /* SDHOST */
  224. if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) {
  225. return;
  226. }
  227. memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
  228. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
  229. sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
  230. qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
  231. INTERRUPT_SDIO));
  232. /* DMA Channels */
  233. if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
  234. return;
  235. }
  236. memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
  237. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
  238. memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
  239. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
  240. for (n = 0; n <= 12; n++) {
  241. sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n,
  242. qdev_get_gpio_in_named(DEVICE(&s->ic),
  243. BCM2835_IC_GPU_IRQ,
  244. INTERRUPT_DMA0 + n));
  245. }
  246. /* THERMAL */
  247. if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) {
  248. return;
  249. }
  250. memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET,
  251. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
  252. /* GPIO */
  253. if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
  254. return;
  255. }
  256. memory_region_add_subregion(&s->peri_mr, GPIO_OFFSET,
  257. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
  258. object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
  259. /* Mphi */
  260. if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) {
  261. return;
  262. }
  263. memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,
  264. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));
  265. sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
  266. qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
  267. INTERRUPT_HOSTPORT));
  268. /* DWC2 */
  269. if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) {
  270. return;
  271. }
  272. memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
  273. sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
  274. sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
  275. qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
  276. INTERRUPT_USB));
  277. create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
  278. create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
  279. create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
  280. create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
  281. create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
  282. create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
  283. create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
  284. create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
  285. create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
  286. create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
  287. create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
  288. create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
  289. create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
  290. create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
  291. }
  292. static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
  293. {
  294. DeviceClass *dc = DEVICE_CLASS(oc);
  295. dc->realize = bcm2835_peripherals_realize;
  296. }
  297. static const TypeInfo bcm2835_peripherals_type_info = {
  298. .name = TYPE_BCM2835_PERIPHERALS,
  299. .parent = TYPE_SYS_BUS_DEVICE,
  300. .instance_size = sizeof(BCM2835PeripheralState),
  301. .instance_init = bcm2835_peripherals_init,
  302. .class_init = bcm2835_peripherals_class_init,
  303. };
  304. static void bcm2835_peripherals_register_types(void)
  305. {
  306. type_register_static(&bcm2835_peripherals_type_info);
  307. }
  308. type_init(bcm2835_peripherals_register_types)