cpu.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597
  1. #include "qemu/osdep.h"
  2. #include "hw/boards.h"
  3. #include "migration/vmstate.h"
  4. #include "hw/acpi/cpu.h"
  5. #include "qapi/error.h"
  6. #include "qapi/qapi-events-misc.h"
  7. #include "trace.h"
  8. #include "sysemu/numa.h"
  9. #define ACPI_CPU_HOTPLUG_REG_LEN 12
  10. #define ACPI_CPU_SELECTOR_OFFSET_WR 0
  11. #define ACPI_CPU_FLAGS_OFFSET_RW 4
  12. #define ACPI_CPU_CMD_OFFSET_WR 5
  13. #define ACPI_CPU_CMD_DATA_OFFSET_RW 8
  14. #define ACPI_CPU_CMD_DATA2_OFFSET_R 0
  15. enum {
  16. CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
  17. CPHP_OST_EVENT_CMD = 1,
  18. CPHP_OST_STATUS_CMD = 2,
  19. CPHP_GET_CPU_ID_CMD = 3,
  20. CPHP_CMD_MAX
  21. };
  22. static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
  23. {
  24. ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
  25. info->slot_type = ACPI_SLOT_TYPE_CPU;
  26. info->slot = g_strdup_printf("%d", idx);
  27. info->source = cdev->ost_event;
  28. info->status = cdev->ost_status;
  29. if (cdev->cpu) {
  30. DeviceState *dev = DEVICE(cdev->cpu);
  31. if (dev->id) {
  32. info->device = g_strdup(dev->id);
  33. info->has_device = true;
  34. }
  35. }
  36. return info;
  37. }
  38. void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
  39. {
  40. int i;
  41. for (i = 0; i < cpu_st->dev_count; i++) {
  42. ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1);
  43. elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]);
  44. elem->next = NULL;
  45. **list = elem;
  46. *list = &elem->next;
  47. }
  48. }
  49. static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
  50. {
  51. uint64_t val = 0;
  52. CPUHotplugState *cpu_st = opaque;
  53. AcpiCpuStatus *cdev;
  54. if (cpu_st->selector >= cpu_st->dev_count) {
  55. return val;
  56. }
  57. cdev = &cpu_st->devs[cpu_st->selector];
  58. switch (addr) {
  59. case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
  60. val |= cdev->cpu ? 1 : 0;
  61. val |= cdev->is_inserting ? 2 : 0;
  62. val |= cdev->is_removing ? 4 : 0;
  63. trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
  64. break;
  65. case ACPI_CPU_CMD_DATA_OFFSET_RW:
  66. switch (cpu_st->command) {
  67. case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
  68. val = cpu_st->selector;
  69. break;
  70. case CPHP_GET_CPU_ID_CMD:
  71. val = cdev->arch_id & 0xFFFFFFFF;
  72. break;
  73. default:
  74. break;
  75. }
  76. trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
  77. break;
  78. case ACPI_CPU_CMD_DATA2_OFFSET_R:
  79. switch (cpu_st->command) {
  80. case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
  81. val = 0;
  82. break;
  83. case CPHP_GET_CPU_ID_CMD:
  84. val = cdev->arch_id >> 32;
  85. break;
  86. default:
  87. break;
  88. }
  89. trace_cpuhp_acpi_read_cmd_data2(cpu_st->selector, val);
  90. break;
  91. default:
  92. break;
  93. }
  94. return val;
  95. }
  96. static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
  97. unsigned int size)
  98. {
  99. CPUHotplugState *cpu_st = opaque;
  100. AcpiCpuStatus *cdev;
  101. ACPIOSTInfo *info;
  102. assert(cpu_st->dev_count);
  103. if (addr) {
  104. if (cpu_st->selector >= cpu_st->dev_count) {
  105. trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
  106. return;
  107. }
  108. }
  109. switch (addr) {
  110. case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
  111. cpu_st->selector = data;
  112. trace_cpuhp_acpi_write_idx(cpu_st->selector);
  113. break;
  114. case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
  115. cdev = &cpu_st->devs[cpu_st->selector];
  116. if (data & 2) { /* clear insert event */
  117. cdev->is_inserting = false;
  118. trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
  119. } else if (data & 4) { /* clear remove event */
  120. cdev->is_removing = false;
  121. trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
  122. } else if (data & 8) {
  123. DeviceState *dev = NULL;
  124. HotplugHandler *hotplug_ctrl = NULL;
  125. if (!cdev->cpu || cdev->cpu == first_cpu) {
  126. trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
  127. break;
  128. }
  129. trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
  130. dev = DEVICE(cdev->cpu);
  131. hotplug_ctrl = qdev_get_hotplug_handler(dev);
  132. hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
  133. object_unparent(OBJECT(dev));
  134. }
  135. break;
  136. case ACPI_CPU_CMD_OFFSET_WR:
  137. trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
  138. if (data < CPHP_CMD_MAX) {
  139. cpu_st->command = data;
  140. if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
  141. uint32_t iter = cpu_st->selector;
  142. do {
  143. cdev = &cpu_st->devs[iter];
  144. if (cdev->is_inserting || cdev->is_removing) {
  145. cpu_st->selector = iter;
  146. trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
  147. cdev->is_inserting, cdev->is_removing);
  148. break;
  149. }
  150. iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
  151. } while (iter != cpu_st->selector);
  152. }
  153. }
  154. break;
  155. case ACPI_CPU_CMD_DATA_OFFSET_RW:
  156. switch (cpu_st->command) {
  157. case CPHP_OST_EVENT_CMD: {
  158. cdev = &cpu_st->devs[cpu_st->selector];
  159. cdev->ost_event = data;
  160. trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
  161. break;
  162. }
  163. case CPHP_OST_STATUS_CMD: {
  164. cdev = &cpu_st->devs[cpu_st->selector];
  165. cdev->ost_status = data;
  166. info = acpi_cpu_device_status(cpu_st->selector, cdev);
  167. qapi_event_send_acpi_device_ost(info);
  168. qapi_free_ACPIOSTInfo(info);
  169. trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
  170. cdev->ost_status);
  171. break;
  172. }
  173. default:
  174. break;
  175. }
  176. break;
  177. default:
  178. break;
  179. }
  180. }
  181. static const MemoryRegionOps cpu_hotplug_ops = {
  182. .read = cpu_hotplug_rd,
  183. .write = cpu_hotplug_wr,
  184. .endianness = DEVICE_LITTLE_ENDIAN,
  185. .valid = {
  186. .min_access_size = 1,
  187. .max_access_size = 4,
  188. },
  189. };
  190. void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
  191. CPUHotplugState *state, hwaddr base_addr)
  192. {
  193. MachineState *machine = MACHINE(qdev_get_machine());
  194. MachineClass *mc = MACHINE_GET_CLASS(machine);
  195. const CPUArchIdList *id_list;
  196. int i;
  197. assert(mc->possible_cpu_arch_ids);
  198. id_list = mc->possible_cpu_arch_ids(machine);
  199. state->dev_count = id_list->len;
  200. state->devs = g_new0(typeof(*state->devs), state->dev_count);
  201. for (i = 0; i < id_list->len; i++) {
  202. state->devs[i].cpu = CPU(id_list->cpus[i].cpu);
  203. state->devs[i].arch_id = id_list->cpus[i].arch_id;
  204. }
  205. memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
  206. "acpi-cpu-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
  207. memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
  208. }
  209. static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
  210. {
  211. CPUClass *k = CPU_GET_CLASS(dev);
  212. uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
  213. int i;
  214. for (i = 0; i < cpu_st->dev_count; i++) {
  215. if (cpu_arch_id == cpu_st->devs[i].arch_id) {
  216. return &cpu_st->devs[i];
  217. }
  218. }
  219. return NULL;
  220. }
  221. void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
  222. CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
  223. {
  224. AcpiCpuStatus *cdev;
  225. cdev = get_cpu_status(cpu_st, dev);
  226. if (!cdev) {
  227. return;
  228. }
  229. cdev->cpu = CPU(dev);
  230. if (dev->hotplugged) {
  231. cdev->is_inserting = true;
  232. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  233. }
  234. }
  235. void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
  236. CPUHotplugState *cpu_st,
  237. DeviceState *dev, Error **errp)
  238. {
  239. AcpiCpuStatus *cdev;
  240. cdev = get_cpu_status(cpu_st, dev);
  241. if (!cdev) {
  242. return;
  243. }
  244. cdev->is_removing = true;
  245. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  246. }
  247. void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
  248. DeviceState *dev, Error **errp)
  249. {
  250. AcpiCpuStatus *cdev;
  251. cdev = get_cpu_status(cpu_st, dev);
  252. if (!cdev) {
  253. return;
  254. }
  255. cdev->cpu = NULL;
  256. }
  257. static const VMStateDescription vmstate_cpuhp_sts = {
  258. .name = "CPU hotplug device state",
  259. .version_id = 1,
  260. .minimum_version_id = 1,
  261. .minimum_version_id_old = 1,
  262. .fields = (VMStateField[]) {
  263. VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
  264. VMSTATE_BOOL(is_removing, AcpiCpuStatus),
  265. VMSTATE_UINT32(ost_event, AcpiCpuStatus),
  266. VMSTATE_UINT32(ost_status, AcpiCpuStatus),
  267. VMSTATE_END_OF_LIST()
  268. }
  269. };
  270. const VMStateDescription vmstate_cpu_hotplug = {
  271. .name = "CPU hotplug state",
  272. .version_id = 1,
  273. .minimum_version_id = 1,
  274. .minimum_version_id_old = 1,
  275. .fields = (VMStateField[]) {
  276. VMSTATE_UINT32(selector, CPUHotplugState),
  277. VMSTATE_UINT8(command, CPUHotplugState),
  278. VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
  279. vmstate_cpuhp_sts, AcpiCpuStatus),
  280. VMSTATE_END_OF_LIST()
  281. }
  282. };
  283. #define CPU_NAME_FMT "C%.03X"
  284. #define CPUHP_RES_DEVICE "PRES"
  285. #define CPU_LOCK "CPLK"
  286. #define CPU_STS_METHOD "CSTA"
  287. #define CPU_SCAN_METHOD "CSCN"
  288. #define CPU_NOTIFY_METHOD "CTFY"
  289. #define CPU_EJECT_METHOD "CEJ0"
  290. #define CPU_OST_METHOD "COST"
  291. #define CPU_ENABLED "CPEN"
  292. #define CPU_SELECTOR "CSEL"
  293. #define CPU_COMMAND "CCMD"
  294. #define CPU_DATA "CDAT"
  295. #define CPU_INSERT_EVENT "CINS"
  296. #define CPU_REMOVE_EVENT "CRMV"
  297. #define CPU_EJECT_EVENT "CEJ0"
  298. void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
  299. hwaddr io_base,
  300. const char *res_root,
  301. const char *event_handler_method)
  302. {
  303. Aml *ifctx;
  304. Aml *field;
  305. Aml *method;
  306. Aml *cpu_ctrl_dev;
  307. Aml *cpus_dev;
  308. Aml *zero = aml_int(0);
  309. Aml *one = aml_int(1);
  310. Aml *sb_scope = aml_scope("_SB");
  311. MachineClass *mc = MACHINE_GET_CLASS(machine);
  312. const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
  313. char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
  314. Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
  315. AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
  316. AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);
  317. cpu_ctrl_dev = aml_device("%s", cphp_res_path);
  318. {
  319. Aml *crs;
  320. aml_append(cpu_ctrl_dev,
  321. aml_name_decl("_HID", aml_eisaid("PNP0A06")));
  322. aml_append(cpu_ctrl_dev,
  323. aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
  324. aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
  325. crs = aml_resource_template();
  326. aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
  327. ACPI_CPU_HOTPLUG_REG_LEN));
  328. aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
  329. /* declare CPU hotplug MMIO region with related access fields */
  330. aml_append(cpu_ctrl_dev,
  331. aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
  332. ACPI_CPU_HOTPLUG_REG_LEN));
  333. field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
  334. AML_WRITE_AS_ZEROS);
  335. aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
  336. /* 1 if enabled, read only */
  337. aml_append(field, aml_named_field(CPU_ENABLED, 1));
  338. /* (read) 1 if has a insert event. (write) 1 to clear event */
  339. aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
  340. /* (read) 1 if has a remove event. (write) 1 to clear event */
  341. aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
  342. /* initiates device eject, write only */
  343. aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
  344. aml_append(field, aml_reserved_field(4));
  345. aml_append(field, aml_named_field(CPU_COMMAND, 8));
  346. aml_append(cpu_ctrl_dev, field);
  347. field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
  348. /* CPU selector, write only */
  349. aml_append(field, aml_named_field(CPU_SELECTOR, 32));
  350. /* flags + cmd + 2byte align */
  351. aml_append(field, aml_reserved_field(4 * 8));
  352. aml_append(field, aml_named_field(CPU_DATA, 32));
  353. aml_append(cpu_ctrl_dev, field);
  354. if (opts.has_legacy_cphp) {
  355. method = aml_method("_INI", 0, AML_SERIALIZED);
  356. /* switch off legacy CPU hotplug HW and use new one,
  357. * on reboot system is in new mode and writing 0
  358. * in CPU_SELECTOR selects BSP, which is NOP at
  359. * the time _INI is called */
  360. aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR)));
  361. aml_append(cpu_ctrl_dev, method);
  362. }
  363. }
  364. aml_append(sb_scope, cpu_ctrl_dev);
  365. cpus_dev = aml_device("\\_SB.CPUS");
  366. {
  367. int i;
  368. Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
  369. Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
  370. Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
  371. Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
  372. Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
  373. Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
  374. Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
  375. Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);
  376. aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
  377. aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
  378. method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
  379. for (i = 0; i < arch_ids->len; i++) {
  380. Aml *cpu = aml_name(CPU_NAME_FMT, i);
  381. Aml *uid = aml_arg(0);
  382. Aml *event = aml_arg(1);
  383. ifctx = aml_if(aml_equal(uid, aml_int(i)));
  384. {
  385. aml_append(ifctx, aml_notify(cpu, event));
  386. }
  387. aml_append(method, ifctx);
  388. }
  389. aml_append(cpus_dev, method);
  390. method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
  391. {
  392. Aml *idx = aml_arg(0);
  393. Aml *sta = aml_local(0);
  394. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  395. aml_append(method, aml_store(idx, cpu_selector));
  396. aml_append(method, aml_store(zero, sta));
  397. ifctx = aml_if(aml_equal(is_enabled, one));
  398. {
  399. aml_append(ifctx, aml_store(aml_int(0xF), sta));
  400. }
  401. aml_append(method, ifctx);
  402. aml_append(method, aml_release(ctrl_lock));
  403. aml_append(method, aml_return(sta));
  404. }
  405. aml_append(cpus_dev, method);
  406. method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
  407. {
  408. Aml *idx = aml_arg(0);
  409. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  410. aml_append(method, aml_store(idx, cpu_selector));
  411. aml_append(method, aml_store(one, ej_evt));
  412. aml_append(method, aml_release(ctrl_lock));
  413. }
  414. aml_append(cpus_dev, method);
  415. method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
  416. {
  417. Aml *else_ctx;
  418. Aml *while_ctx;
  419. Aml *has_event = aml_local(0);
  420. Aml *dev_chk = aml_int(1);
  421. Aml *eject_req = aml_int(3);
  422. Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
  423. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  424. aml_append(method, aml_store(one, has_event));
  425. while_ctx = aml_while(aml_equal(has_event, one));
  426. {
  427. /* clear loop exit condition, ins_evt/rm_evt checks
  428. * will set it to 1 while next_cpu_cmd returns a CPU
  429. * with events */
  430. aml_append(while_ctx, aml_store(zero, has_event));
  431. aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
  432. ifctx = aml_if(aml_equal(ins_evt, one));
  433. {
  434. aml_append(ifctx,
  435. aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk));
  436. aml_append(ifctx, aml_store(one, ins_evt));
  437. aml_append(ifctx, aml_store(one, has_event));
  438. }
  439. aml_append(while_ctx, ifctx);
  440. else_ctx = aml_else();
  441. ifctx = aml_if(aml_equal(rm_evt, one));
  442. {
  443. aml_append(ifctx,
  444. aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req));
  445. aml_append(ifctx, aml_store(one, rm_evt));
  446. aml_append(ifctx, aml_store(one, has_event));
  447. }
  448. aml_append(else_ctx, ifctx);
  449. aml_append(while_ctx, else_ctx);
  450. }
  451. aml_append(method, while_ctx);
  452. aml_append(method, aml_release(ctrl_lock));
  453. }
  454. aml_append(cpus_dev, method);
  455. method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
  456. {
  457. Aml *uid = aml_arg(0);
  458. Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
  459. Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
  460. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  461. aml_append(method, aml_store(uid, cpu_selector));
  462. aml_append(method, aml_store(ev_cmd, cpu_cmd));
  463. aml_append(method, aml_store(aml_arg(1), cpu_data));
  464. aml_append(method, aml_store(st_cmd, cpu_cmd));
  465. aml_append(method, aml_store(aml_arg(2), cpu_data));
  466. aml_append(method, aml_release(ctrl_lock));
  467. }
  468. aml_append(cpus_dev, method);
  469. /* build Processor object for each processor */
  470. for (i = 0; i < arch_ids->len; i++) {
  471. Aml *dev;
  472. Aml *uid = aml_int(i);
  473. GArray *madt_buf = g_array_new(0, 1, 1);
  474. int arch_id = arch_ids->cpus[i].arch_id;
  475. if (opts.acpi_1_compatible && arch_id < 255) {
  476. dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
  477. } else {
  478. dev = aml_device(CPU_NAME_FMT, i);
  479. aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
  480. aml_append(dev, aml_name_decl("_UID", uid));
  481. }
  482. method = aml_method("_STA", 0, AML_SERIALIZED);
  483. aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
  484. aml_append(dev, method);
  485. /* build _MAT object */
  486. assert(adevc && adevc->madt_cpu);
  487. adevc->madt_cpu(adev, i, arch_ids, madt_buf);
  488. switch (madt_buf->data[0]) {
  489. case ACPI_APIC_PROCESSOR: {
  490. AcpiMadtProcessorApic *apic = (void *)madt_buf->data;
  491. apic->flags = cpu_to_le32(1);
  492. break;
  493. }
  494. case ACPI_APIC_LOCAL_X2APIC: {
  495. AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data;
  496. apic->flags = cpu_to_le32(1);
  497. break;
  498. }
  499. default:
  500. assert(0);
  501. }
  502. aml_append(dev, aml_name_decl("_MAT",
  503. aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
  504. g_array_free(madt_buf, true);
  505. if (CPU(arch_ids->cpus[i].cpu) != first_cpu) {
  506. method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
  507. aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
  508. aml_append(dev, method);
  509. }
  510. method = aml_method("_OST", 3, AML_SERIALIZED);
  511. aml_append(method,
  512. aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
  513. aml_arg(1), aml_arg(2))
  514. );
  515. aml_append(dev, method);
  516. /* Linux guests discard SRAT info for non-present CPUs
  517. * as a result _PXM is required for all CPUs which might
  518. * be hot-plugged. For simplicity, add it for all CPUs.
  519. */
  520. if (arch_ids->cpus[i].props.has_node_id) {
  521. aml_append(dev, aml_name_decl("_PXM",
  522. aml_int(arch_ids->cpus[i].props.node_id)));
  523. }
  524. aml_append(cpus_dev, dev);
  525. }
  526. }
  527. aml_append(sb_scope, cpus_dev);
  528. aml_append(table, sb_scope);
  529. method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
  530. aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
  531. aml_append(table, method);
  532. g_free(cphp_res_path);
  533. }