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pci-testdev.c 9.8 KB

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  1. /*
  2. * QEMU PCI test device
  3. *
  4. * Copyright (c) 2012 Red Hat Inc.
  5. * Author: Michael S. Tsirkin <mst@redhat.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "qemu/osdep.h"
  21. #include "hw/pci/pci.h"
  22. #include "hw/qdev-properties.h"
  23. #include "qemu/event_notifier.h"
  24. #include "qemu/module.h"
  25. #include "sysemu/kvm.h"
  26. typedef struct PCITestDevHdr {
  27. uint8_t test;
  28. uint8_t width;
  29. uint8_t pad0[2];
  30. uint32_t offset;
  31. uint8_t data;
  32. uint8_t pad1[3];
  33. uint32_t count;
  34. uint8_t name[];
  35. } PCITestDevHdr;
  36. typedef struct IOTest {
  37. MemoryRegion *mr;
  38. EventNotifier notifier;
  39. bool hasnotifier;
  40. unsigned size;
  41. bool match_data;
  42. PCITestDevHdr *hdr;
  43. unsigned bufsize;
  44. } IOTest;
  45. #define IOTEST_DATAMATCH 0xFA
  46. #define IOTEST_NOMATCH 0xCE
  47. #define IOTEST_IOSIZE 128
  48. #define IOTEST_MEMSIZE 2048
  49. static const char *iotest_test[] = {
  50. "no-eventfd",
  51. "wildcard-eventfd",
  52. "datamatch-eventfd"
  53. };
  54. static const char *iotest_type[] = {
  55. "mmio",
  56. "portio"
  57. };
  58. #define IOTEST_TEST(i) (iotest_test[((i) % ARRAY_SIZE(iotest_test))])
  59. #define IOTEST_TYPE(i) (iotest_type[((i) / ARRAY_SIZE(iotest_test))])
  60. #define IOTEST_MAX_TEST (ARRAY_SIZE(iotest_test))
  61. #define IOTEST_MAX_TYPE (ARRAY_SIZE(iotest_type))
  62. #define IOTEST_MAX (IOTEST_MAX_TEST * IOTEST_MAX_TYPE)
  63. enum {
  64. IOTEST_ACCESS_NAME,
  65. IOTEST_ACCESS_DATA,
  66. IOTEST_ACCESS_MAX,
  67. };
  68. #define IOTEST_ACCESS_TYPE uint8_t
  69. #define IOTEST_ACCESS_WIDTH (sizeof(uint8_t))
  70. typedef struct PCITestDevState {
  71. /*< private >*/
  72. PCIDevice parent_obj;
  73. /*< public >*/
  74. MemoryRegion mmio;
  75. MemoryRegion portio;
  76. IOTest *tests;
  77. int current;
  78. uint64_t membar_size;
  79. MemoryRegion membar;
  80. } PCITestDevState;
  81. #define TYPE_PCI_TEST_DEV "pci-testdev"
  82. #define PCI_TEST_DEV(obj) \
  83. OBJECT_CHECK(PCITestDevState, (obj), TYPE_PCI_TEST_DEV)
  84. #define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio"))
  85. #define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ? &(d)->mmio : &(d)->portio)
  86. #define IOTEST_SIZE(i) (IOTEST_IS_MEM(i) ? IOTEST_MEMSIZE : IOTEST_IOSIZE)
  87. #define IOTEST_PCI_BAR(i) (IOTEST_IS_MEM(i) ? PCI_BASE_ADDRESS_SPACE_MEMORY : \
  88. PCI_BASE_ADDRESS_SPACE_IO)
  89. static int pci_testdev_start(IOTest *test)
  90. {
  91. test->hdr->count = 0;
  92. if (!test->hasnotifier) {
  93. return 0;
  94. }
  95. event_notifier_test_and_clear(&test->notifier);
  96. memory_region_add_eventfd(test->mr,
  97. le32_to_cpu(test->hdr->offset),
  98. test->size,
  99. test->match_data,
  100. test->hdr->data,
  101. &test->notifier);
  102. return 0;
  103. }
  104. static void pci_testdev_stop(IOTest *test)
  105. {
  106. if (!test->hasnotifier) {
  107. return;
  108. }
  109. memory_region_del_eventfd(test->mr,
  110. le32_to_cpu(test->hdr->offset),
  111. test->size,
  112. test->match_data,
  113. test->hdr->data,
  114. &test->notifier);
  115. }
  116. static void
  117. pci_testdev_reset(PCITestDevState *d)
  118. {
  119. if (d->current == -1) {
  120. return;
  121. }
  122. pci_testdev_stop(&d->tests[d->current]);
  123. d->current = -1;
  124. }
  125. static void pci_testdev_inc(IOTest *test, unsigned inc)
  126. {
  127. uint32_t c = le32_to_cpu(test->hdr->count);
  128. test->hdr->count = cpu_to_le32(c + inc);
  129. }
  130. static void
  131. pci_testdev_write(void *opaque, hwaddr addr, uint64_t val,
  132. unsigned size, int type)
  133. {
  134. PCITestDevState *d = opaque;
  135. IOTest *test;
  136. int t, r;
  137. if (addr == offsetof(PCITestDevHdr, test)) {
  138. pci_testdev_reset(d);
  139. if (val >= IOTEST_MAX_TEST) {
  140. return;
  141. }
  142. t = type * IOTEST_MAX_TEST + val;
  143. r = pci_testdev_start(&d->tests[t]);
  144. if (r < 0) {
  145. return;
  146. }
  147. d->current = t;
  148. return;
  149. }
  150. if (d->current < 0) {
  151. return;
  152. }
  153. test = &d->tests[d->current];
  154. if (addr != le32_to_cpu(test->hdr->offset)) {
  155. return;
  156. }
  157. if (test->match_data && test->size != size) {
  158. return;
  159. }
  160. if (test->match_data && val != test->hdr->data) {
  161. return;
  162. }
  163. pci_testdev_inc(test, 1);
  164. }
  165. static uint64_t
  166. pci_testdev_read(void *opaque, hwaddr addr, unsigned size)
  167. {
  168. PCITestDevState *d = opaque;
  169. const char *buf;
  170. IOTest *test;
  171. if (d->current < 0) {
  172. return 0;
  173. }
  174. test = &d->tests[d->current];
  175. buf = (const char *)test->hdr;
  176. if (addr + size >= test->bufsize) {
  177. return 0;
  178. }
  179. if (test->hasnotifier) {
  180. event_notifier_test_and_clear(&test->notifier);
  181. }
  182. return buf[addr];
  183. }
  184. static void
  185. pci_testdev_mmio_write(void *opaque, hwaddr addr, uint64_t val,
  186. unsigned size)
  187. {
  188. pci_testdev_write(opaque, addr, val, size, 0);
  189. }
  190. static void
  191. pci_testdev_pio_write(void *opaque, hwaddr addr, uint64_t val,
  192. unsigned size)
  193. {
  194. pci_testdev_write(opaque, addr, val, size, 1);
  195. }
  196. static const MemoryRegionOps pci_testdev_mmio_ops = {
  197. .read = pci_testdev_read,
  198. .write = pci_testdev_mmio_write,
  199. .endianness = DEVICE_LITTLE_ENDIAN,
  200. .impl = {
  201. .min_access_size = 1,
  202. .max_access_size = 1,
  203. },
  204. };
  205. static const MemoryRegionOps pci_testdev_pio_ops = {
  206. .read = pci_testdev_read,
  207. .write = pci_testdev_pio_write,
  208. .endianness = DEVICE_LITTLE_ENDIAN,
  209. .impl = {
  210. .min_access_size = 1,
  211. .max_access_size = 1,
  212. },
  213. };
  214. static void pci_testdev_realize(PCIDevice *pci_dev, Error **errp)
  215. {
  216. PCITestDevState *d = PCI_TEST_DEV(pci_dev);
  217. uint8_t *pci_conf;
  218. char *name;
  219. int r, i;
  220. bool fastmmio = kvm_ioeventfd_any_length_enabled();
  221. pci_conf = pci_dev->config;
  222. pci_conf[PCI_INTERRUPT_PIN] = 0; /* no interrupt pin */
  223. memory_region_init_io(&d->mmio, OBJECT(d), &pci_testdev_mmio_ops, d,
  224. "pci-testdev-mmio", IOTEST_MEMSIZE * 2);
  225. memory_region_init_io(&d->portio, OBJECT(d), &pci_testdev_pio_ops, d,
  226. "pci-testdev-portio", IOTEST_IOSIZE * 2);
  227. pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
  228. pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
  229. if (d->membar_size) {
  230. memory_region_init(&d->membar, OBJECT(d), "pci-testdev-membar",
  231. d->membar_size);
  232. pci_register_bar(pci_dev, 2,
  233. PCI_BASE_ADDRESS_SPACE_MEMORY |
  234. PCI_BASE_ADDRESS_MEM_PREFETCH |
  235. PCI_BASE_ADDRESS_MEM_TYPE_64,
  236. &d->membar);
  237. }
  238. d->current = -1;
  239. d->tests = g_malloc0(IOTEST_MAX * sizeof *d->tests);
  240. for (i = 0; i < IOTEST_MAX; ++i) {
  241. IOTest *test = &d->tests[i];
  242. name = g_strdup_printf("%s-%s", IOTEST_TYPE(i), IOTEST_TEST(i));
  243. test->bufsize = sizeof(PCITestDevHdr) + strlen(name) + 1;
  244. test->hdr = g_malloc0(test->bufsize);
  245. memcpy(test->hdr->name, name, strlen(name) + 1);
  246. g_free(name);
  247. test->hdr->offset = cpu_to_le32(IOTEST_SIZE(i) + i * IOTEST_ACCESS_WIDTH);
  248. test->match_data = strcmp(IOTEST_TEST(i), "wildcard-eventfd");
  249. if (fastmmio && IOTEST_IS_MEM(i) && !test->match_data) {
  250. test->size = 0;
  251. } else {
  252. test->size = IOTEST_ACCESS_WIDTH;
  253. }
  254. test->hdr->test = i;
  255. test->hdr->data = test->match_data ? IOTEST_DATAMATCH : IOTEST_NOMATCH;
  256. test->hdr->width = IOTEST_ACCESS_WIDTH;
  257. test->mr = IOTEST_REGION(d, i);
  258. if (!strcmp(IOTEST_TEST(i), "no-eventfd")) {
  259. test->hasnotifier = false;
  260. continue;
  261. }
  262. r = event_notifier_init(&test->notifier, 0);
  263. assert(r >= 0);
  264. test->hasnotifier = true;
  265. }
  266. }
  267. static void
  268. pci_testdev_uninit(PCIDevice *dev)
  269. {
  270. PCITestDevState *d = PCI_TEST_DEV(dev);
  271. int i;
  272. pci_testdev_reset(d);
  273. for (i = 0; i < IOTEST_MAX; ++i) {
  274. if (d->tests[i].hasnotifier) {
  275. event_notifier_cleanup(&d->tests[i].notifier);
  276. }
  277. g_free(d->tests[i].hdr);
  278. }
  279. g_free(d->tests);
  280. }
  281. static void qdev_pci_testdev_reset(DeviceState *dev)
  282. {
  283. PCITestDevState *d = PCI_TEST_DEV(dev);
  284. pci_testdev_reset(d);
  285. }
  286. static Property pci_testdev_properties[] = {
  287. DEFINE_PROP_SIZE("membar", PCITestDevState, membar_size, 0),
  288. DEFINE_PROP_END_OF_LIST(),
  289. };
  290. static void pci_testdev_class_init(ObjectClass *klass, void *data)
  291. {
  292. DeviceClass *dc = DEVICE_CLASS(klass);
  293. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  294. k->realize = pci_testdev_realize;
  295. k->exit = pci_testdev_uninit;
  296. k->vendor_id = PCI_VENDOR_ID_REDHAT;
  297. k->device_id = PCI_DEVICE_ID_REDHAT_TEST;
  298. k->revision = 0x00;
  299. k->class_id = PCI_CLASS_OTHERS;
  300. dc->desc = "PCI Test Device";
  301. set_bit(DEVICE_CATEGORY_MISC, dc->categories);
  302. dc->reset = qdev_pci_testdev_reset;
  303. dc->props = pci_testdev_properties;
  304. }
  305. static const TypeInfo pci_testdev_info = {
  306. .name = TYPE_PCI_TEST_DEV,
  307. .parent = TYPE_PCI_DEVICE,
  308. .instance_size = sizeof(PCITestDevState),
  309. .class_init = pci_testdev_class_init,
  310. .interfaces = (InterfaceInfo[]) {
  311. { INTERFACE_CONVENTIONAL_PCI_DEVICE },
  312. { },
  313. },
  314. };
  315. static void pci_testdev_register_types(void)
  316. {
  317. type_register_static(&pci_testdev_info);
  318. }
  319. type_init(pci_testdev_register_types)