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tsc210x.c 33 KB

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  1. /*
  2. * TI TSC2102 (touchscreen/sensors/audio controller) emulator.
  3. * TI TSC2301 (touchscreen/sensors/keypad).
  4. *
  5. * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
  6. * Copyright (C) 2008 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 or
  11. * (at your option) version 3 of the License.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along
  19. * with this program; if not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include "qemu/osdep.h"
  22. #include "hw/hw.h"
  23. #include "audio/audio.h"
  24. #include "qemu/timer.h"
  25. #include "sysemu/reset.h"
  26. #include "ui/console.h"
  27. #include "hw/arm/omap.h" /* For I2SCodec */
  28. #include "hw/input/tsc2xxx.h"
  29. #include "hw/irq.h"
  30. #include "migration/vmstate.h"
  31. #define TSC_DATA_REGISTERS_PAGE 0x0
  32. #define TSC_CONTROL_REGISTERS_PAGE 0x1
  33. #define TSC_AUDIO_REGISTERS_PAGE 0x2
  34. #define TSC_VERBOSE
  35. #define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p]))
  36. typedef struct {
  37. qemu_irq pint;
  38. qemu_irq kbint;
  39. qemu_irq davint;
  40. QEMUTimer *timer;
  41. QEMUSoundCard card;
  42. uWireSlave chip;
  43. I2SCodec codec;
  44. uint8_t in_fifo[16384];
  45. uint8_t out_fifo[16384];
  46. uint16_t model;
  47. int32_t x, y;
  48. bool pressure;
  49. uint8_t page, offset;
  50. uint16_t dav;
  51. bool state;
  52. bool irq;
  53. bool command;
  54. bool busy;
  55. bool enabled;
  56. bool host_mode;
  57. uint8_t function, nextfunction;
  58. uint8_t precision, nextprecision;
  59. uint8_t filter;
  60. uint8_t pin_func;
  61. uint8_t ref;
  62. uint8_t timing;
  63. uint8_t noise;
  64. uint16_t audio_ctrl1;
  65. uint16_t audio_ctrl2;
  66. uint16_t audio_ctrl3;
  67. uint16_t pll[3];
  68. uint16_t volume;
  69. int64_t volume_change;
  70. bool softstep;
  71. uint16_t dac_power;
  72. int64_t powerdown;
  73. uint16_t filter_data[0x14];
  74. const char *name;
  75. SWVoiceIn *adc_voice[1];
  76. SWVoiceOut *dac_voice[1];
  77. int i2s_rx_rate;
  78. int i2s_tx_rate;
  79. int tr[8];
  80. struct {
  81. uint16_t down;
  82. uint16_t mask;
  83. int scan;
  84. int debounce;
  85. int mode;
  86. int intr;
  87. } kb;
  88. int64_t now; /* Time at migration */
  89. } TSC210xState;
  90. static const int resolution[4] = { 12, 8, 10, 12 };
  91. #define TSC_MODE_NO_SCAN 0x0
  92. #define TSC_MODE_XY_SCAN 0x1
  93. #define TSC_MODE_XYZ_SCAN 0x2
  94. #define TSC_MODE_X 0x3
  95. #define TSC_MODE_Y 0x4
  96. #define TSC_MODE_Z 0x5
  97. #define TSC_MODE_BAT1 0x6
  98. #define TSC_MODE_BAT2 0x7
  99. #define TSC_MODE_AUX 0x8
  100. #define TSC_MODE_AUX_SCAN 0x9
  101. #define TSC_MODE_TEMP1 0xa
  102. #define TSC_MODE_PORT_SCAN 0xb
  103. #define TSC_MODE_TEMP2 0xc
  104. #define TSC_MODE_XX_DRV 0xd
  105. #define TSC_MODE_YY_DRV 0xe
  106. #define TSC_MODE_YX_DRV 0xf
  107. static const uint16_t mode_regs[16] = {
  108. 0x0000, /* No scan */
  109. 0x0600, /* X, Y scan */
  110. 0x0780, /* X, Y, Z scan */
  111. 0x0400, /* X */
  112. 0x0200, /* Y */
  113. 0x0180, /* Z */
  114. 0x0040, /* BAT1 */
  115. 0x0030, /* BAT2 */
  116. 0x0010, /* AUX */
  117. 0x0010, /* AUX scan */
  118. 0x0004, /* TEMP1 */
  119. 0x0070, /* Port scan */
  120. 0x0002, /* TEMP2 */
  121. 0x0000, /* X+, X- drivers */
  122. 0x0000, /* Y+, Y- drivers */
  123. 0x0000, /* Y+, X- drivers */
  124. };
  125. #define X_TRANSFORM(s) \
  126. ((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3])
  127. #define Y_TRANSFORM(s) \
  128. ((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7])
  129. #define Z1_TRANSFORM(s) \
  130. ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
  131. #define Z2_TRANSFORM(s) \
  132. ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
  133. #define BAT1_VAL 0x8660
  134. #define BAT2_VAL 0x0000
  135. #define AUX1_VAL 0x35c0
  136. #define AUX2_VAL 0xffff
  137. #define TEMP1_VAL 0x8c70
  138. #define TEMP2_VAL 0xa5b0
  139. #define TSC_POWEROFF_DELAY 50
  140. #define TSC_SOFTSTEP_DELAY 50
  141. static void tsc210x_reset(TSC210xState *s)
  142. {
  143. s->state = false;
  144. s->pin_func = 2;
  145. s->enabled = false;
  146. s->busy = false;
  147. s->nextfunction = 0;
  148. s->ref = 0;
  149. s->timing = 0;
  150. s->irq = false;
  151. s->dav = 0;
  152. s->audio_ctrl1 = 0x0000;
  153. s->audio_ctrl2 = 0x4410;
  154. s->audio_ctrl3 = 0x0000;
  155. s->pll[0] = 0x1004;
  156. s->pll[1] = 0x0000;
  157. s->pll[2] = 0x1fff;
  158. s->volume = 0xffff;
  159. s->dac_power = 0x8540;
  160. s->softstep = true;
  161. s->volume_change = 0;
  162. s->powerdown = 0;
  163. s->filter_data[0x00] = 0x6be3;
  164. s->filter_data[0x01] = 0x9666;
  165. s->filter_data[0x02] = 0x675d;
  166. s->filter_data[0x03] = 0x6be3;
  167. s->filter_data[0x04] = 0x9666;
  168. s->filter_data[0x05] = 0x675d;
  169. s->filter_data[0x06] = 0x7d83;
  170. s->filter_data[0x07] = 0x84ee;
  171. s->filter_data[0x08] = 0x7d83;
  172. s->filter_data[0x09] = 0x84ee;
  173. s->filter_data[0x0a] = 0x6be3;
  174. s->filter_data[0x0b] = 0x9666;
  175. s->filter_data[0x0c] = 0x675d;
  176. s->filter_data[0x0d] = 0x6be3;
  177. s->filter_data[0x0e] = 0x9666;
  178. s->filter_data[0x0f] = 0x675d;
  179. s->filter_data[0x10] = 0x7d83;
  180. s->filter_data[0x11] = 0x84ee;
  181. s->filter_data[0x12] = 0x7d83;
  182. s->filter_data[0x13] = 0x84ee;
  183. s->i2s_tx_rate = 0;
  184. s->i2s_rx_rate = 0;
  185. s->kb.scan = 1;
  186. s->kb.debounce = 0;
  187. s->kb.mask = 0x0000;
  188. s->kb.mode = 3;
  189. s->kb.intr = 0;
  190. qemu_set_irq(s->pint, !s->irq);
  191. qemu_set_irq(s->davint, !s->dav);
  192. qemu_irq_raise(s->kbint);
  193. }
  194. typedef struct {
  195. int rate;
  196. int dsor;
  197. int fsref;
  198. } TSC210xRateInfo;
  199. /* { rate, dsor, fsref } */
  200. static const TSC210xRateInfo tsc2102_rates[] = {
  201. /* Fsref / 6.0 */
  202. { 7350, 63, 1 },
  203. { 8000, 63, 0 },
  204. /* Fsref / 6.0 */
  205. { 7350, 54, 1 },
  206. { 8000, 54, 0 },
  207. /* Fsref / 5.0 */
  208. { 8820, 45, 1 },
  209. { 9600, 45, 0 },
  210. /* Fsref / 4.0 */
  211. { 11025, 36, 1 },
  212. { 12000, 36, 0 },
  213. /* Fsref / 3.0 */
  214. { 14700, 27, 1 },
  215. { 16000, 27, 0 },
  216. /* Fsref / 2.0 */
  217. { 22050, 18, 1 },
  218. { 24000, 18, 0 },
  219. /* Fsref / 1.5 */
  220. { 29400, 9, 1 },
  221. { 32000, 9, 0 },
  222. /* Fsref */
  223. { 44100, 0, 1 },
  224. { 48000, 0, 0 },
  225. { 0, 0, 0 },
  226. };
  227. static inline void tsc210x_out_flush(TSC210xState *s, int len)
  228. {
  229. uint8_t *data = s->codec.out.fifo + s->codec.out.start;
  230. uint8_t *end = data + len;
  231. while (data < end)
  232. data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
  233. s->codec.out.len -= len;
  234. if (s->codec.out.len)
  235. memmove(s->codec.out.fifo, end, s->codec.out.len);
  236. s->codec.out.start = 0;
  237. }
  238. static void tsc210x_audio_out_cb(TSC210xState *s, int free_b)
  239. {
  240. if (s->codec.out.len >= free_b) {
  241. tsc210x_out_flush(s, free_b);
  242. return;
  243. }
  244. s->codec.out.size = MIN(free_b, 16384);
  245. qemu_irq_raise(s->codec.tx_start);
  246. }
  247. static void tsc2102_audio_rate_update(TSC210xState *s)
  248. {
  249. const TSC210xRateInfo *rate;
  250. s->codec.tx_rate = 0;
  251. s->codec.rx_rate = 0;
  252. if (s->dac_power & (1 << 15)) /* PWDNC */
  253. return;
  254. for (rate = tsc2102_rates; rate->rate; rate ++)
  255. if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */
  256. rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
  257. break;
  258. if (!rate->rate) {
  259. printf("%s: unknown sampling rate configured\n", __func__);
  260. return;
  261. }
  262. s->codec.tx_rate = rate->rate;
  263. }
  264. static void tsc2102_audio_output_update(TSC210xState *s)
  265. {
  266. int enable;
  267. struct audsettings fmt;
  268. if (s->dac_voice[0]) {
  269. tsc210x_out_flush(s, s->codec.out.len);
  270. s->codec.out.size = 0;
  271. AUD_set_active_out(s->dac_voice[0], 0);
  272. AUD_close_out(&s->card, s->dac_voice[0]);
  273. s->dac_voice[0] = NULL;
  274. }
  275. s->codec.cts = 0;
  276. enable =
  277. (~s->dac_power & (1 << 15)) && /* PWDNC */
  278. (~s->dac_power & (1 << 10)); /* DAPWDN */
  279. if (!enable || !s->codec.tx_rate)
  280. return;
  281. /* Force our own sampling rate even in slave DAC mode */
  282. fmt.endianness = 0;
  283. fmt.nchannels = 2;
  284. fmt.freq = s->codec.tx_rate;
  285. fmt.fmt = AUDIO_FORMAT_S16;
  286. s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
  287. "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
  288. if (s->dac_voice[0]) {
  289. s->codec.cts = 1;
  290. AUD_set_active_out(s->dac_voice[0], 1);
  291. }
  292. }
  293. static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg)
  294. {
  295. switch (reg) {
  296. case 0x00: /* X */
  297. s->dav &= 0xfbff;
  298. return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
  299. (s->noise & 3);
  300. case 0x01: /* Y */
  301. s->noise ++;
  302. s->dav &= 0xfdff;
  303. return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^
  304. (s->noise & 3);
  305. case 0x02: /* Z1 */
  306. s->dav &= 0xfeff;
  307. return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
  308. (s->noise & 3);
  309. case 0x03: /* Z2 */
  310. s->dav &= 0xff7f;
  311. return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
  312. (s->noise & 3);
  313. case 0x04: /* KPData */
  314. if ((s->model & 0xff00) == 0x2300) {
  315. if (s->kb.intr && (s->kb.mode & 2)) {
  316. s->kb.intr = 0;
  317. qemu_irq_raise(s->kbint);
  318. }
  319. return s->kb.down;
  320. }
  321. return 0xffff;
  322. case 0x05: /* BAT1 */
  323. s->dav &= 0xffbf;
  324. return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
  325. (s->noise & 6);
  326. case 0x06: /* BAT2 */
  327. s->dav &= 0xffdf;
  328. return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
  329. case 0x07: /* AUX1 */
  330. s->dav &= 0xffef;
  331. return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
  332. case 0x08: /* AUX2 */
  333. s->dav &= 0xfff7;
  334. return 0xffff;
  335. case 0x09: /* TEMP1 */
  336. s->dav &= 0xfffb;
  337. return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
  338. (s->noise & 5);
  339. case 0x0a: /* TEMP2 */
  340. s->dav &= 0xfffd;
  341. return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
  342. (s->noise & 3);
  343. case 0x0b: /* DAC */
  344. s->dav &= 0xfffe;
  345. return 0xffff;
  346. default:
  347. #ifdef TSC_VERBOSE
  348. fprintf(stderr, "tsc2102_data_register_read: "
  349. "no such register: 0x%02x\n", reg);
  350. #endif
  351. return 0xffff;
  352. }
  353. }
  354. static uint16_t tsc2102_control_register_read(
  355. TSC210xState *s, int reg)
  356. {
  357. switch (reg) {
  358. case 0x00: /* TSC ADC */
  359. return (s->pressure << 15) | ((!s->busy) << 14) |
  360. (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
  361. case 0x01: /* Status / Keypad Control */
  362. if ((s->model & 0xff00) == 0x2100)
  363. return (s->pin_func << 14) | ((!s->enabled) << 13) |
  364. (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
  365. else
  366. return (s->kb.intr << 15) | ((s->kb.scan || !s->kb.down) << 14) |
  367. (s->kb.debounce << 11);
  368. case 0x02: /* DAC Control */
  369. if ((s->model & 0xff00) == 0x2300)
  370. return s->dac_power & 0x8000;
  371. else
  372. goto bad_reg;
  373. case 0x03: /* Reference */
  374. return s->ref;
  375. case 0x04: /* Reset */
  376. return 0xffff;
  377. case 0x05: /* Configuration */
  378. return s->timing;
  379. case 0x06: /* Secondary configuration */
  380. if ((s->model & 0xff00) == 0x2100)
  381. goto bad_reg;
  382. return ((!s->dav) << 15) | ((s->kb.mode & 1) << 14) | s->pll[2];
  383. case 0x10: /* Keypad Mask */
  384. if ((s->model & 0xff00) == 0x2100)
  385. goto bad_reg;
  386. return s->kb.mask;
  387. default:
  388. bad_reg:
  389. #ifdef TSC_VERBOSE
  390. fprintf(stderr, "tsc2102_control_register_read: "
  391. "no such register: 0x%02x\n", reg);
  392. #endif
  393. return 0xffff;
  394. }
  395. }
  396. static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
  397. {
  398. int l_ch, r_ch;
  399. uint16_t val;
  400. switch (reg) {
  401. case 0x00: /* Audio Control 1 */
  402. return s->audio_ctrl1;
  403. case 0x01:
  404. return 0xff00;
  405. case 0x02: /* DAC Volume Control */
  406. return s->volume;
  407. case 0x03:
  408. return 0x8b00;
  409. case 0x04: /* Audio Control 2 */
  410. l_ch = 1;
  411. r_ch = 1;
  412. if (s->softstep && !(s->dac_power & (1 << 10))) {
  413. l_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
  414. s->volume_change + TSC_SOFTSTEP_DELAY);
  415. r_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
  416. s->volume_change + TSC_SOFTSTEP_DELAY);
  417. }
  418. return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
  419. case 0x05: /* Stereo DAC Power Control */
  420. return 0x2aa0 | s->dac_power |
  421. (((s->dac_power & (1 << 10)) &&
  422. (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
  423. s->powerdown + TSC_POWEROFF_DELAY)) << 6);
  424. case 0x06: /* Audio Control 3 */
  425. val = s->audio_ctrl3 | 0x0001;
  426. s->audio_ctrl3 &= 0xff3f;
  427. return val;
  428. case 0x07: /* LCH_BASS_BOOST_N0 */
  429. case 0x08: /* LCH_BASS_BOOST_N1 */
  430. case 0x09: /* LCH_BASS_BOOST_N2 */
  431. case 0x0a: /* LCH_BASS_BOOST_N3 */
  432. case 0x0b: /* LCH_BASS_BOOST_N4 */
  433. case 0x0c: /* LCH_BASS_BOOST_N5 */
  434. case 0x0d: /* LCH_BASS_BOOST_D1 */
  435. case 0x0e: /* LCH_BASS_BOOST_D2 */
  436. case 0x0f: /* LCH_BASS_BOOST_D4 */
  437. case 0x10: /* LCH_BASS_BOOST_D5 */
  438. case 0x11: /* RCH_BASS_BOOST_N0 */
  439. case 0x12: /* RCH_BASS_BOOST_N1 */
  440. case 0x13: /* RCH_BASS_BOOST_N2 */
  441. case 0x14: /* RCH_BASS_BOOST_N3 */
  442. case 0x15: /* RCH_BASS_BOOST_N4 */
  443. case 0x16: /* RCH_BASS_BOOST_N5 */
  444. case 0x17: /* RCH_BASS_BOOST_D1 */
  445. case 0x18: /* RCH_BASS_BOOST_D2 */
  446. case 0x19: /* RCH_BASS_BOOST_D4 */
  447. case 0x1a: /* RCH_BASS_BOOST_D5 */
  448. return s->filter_data[reg - 0x07];
  449. case 0x1b: /* PLL Programmability 1 */
  450. return s->pll[0];
  451. case 0x1c: /* PLL Programmability 2 */
  452. return s->pll[1];
  453. case 0x1d: /* Audio Control 4 */
  454. return (!s->softstep) << 14;
  455. default:
  456. #ifdef TSC_VERBOSE
  457. fprintf(stderr, "tsc2102_audio_register_read: "
  458. "no such register: 0x%02x\n", reg);
  459. #endif
  460. return 0xffff;
  461. }
  462. }
  463. static void tsc2102_data_register_write(
  464. TSC210xState *s, int reg, uint16_t value)
  465. {
  466. switch (reg) {
  467. case 0x00: /* X */
  468. case 0x01: /* Y */
  469. case 0x02: /* Z1 */
  470. case 0x03: /* Z2 */
  471. case 0x05: /* BAT1 */
  472. case 0x06: /* BAT2 */
  473. case 0x07: /* AUX1 */
  474. case 0x08: /* AUX2 */
  475. case 0x09: /* TEMP1 */
  476. case 0x0a: /* TEMP2 */
  477. return;
  478. default:
  479. qemu_log_mask(LOG_GUEST_ERROR, "tsc2102_data_register_write: "
  480. "no such register: 0x%02x\n", reg);
  481. }
  482. }
  483. static void tsc2102_control_register_write(
  484. TSC210xState *s, int reg, uint16_t value)
  485. {
  486. switch (reg) {
  487. case 0x00: /* TSC ADC */
  488. s->host_mode = value >> 15;
  489. s->enabled = !(value & 0x4000);
  490. if (s->busy && !s->enabled)
  491. timer_del(s->timer);
  492. s->busy = s->busy && s->enabled;
  493. s->nextfunction = (value >> 10) & 0xf;
  494. s->nextprecision = (value >> 8) & 3;
  495. s->filter = value & 0xff;
  496. return;
  497. case 0x01: /* Status / Keypad Control */
  498. if ((s->model & 0xff00) == 0x2100)
  499. s->pin_func = value >> 14;
  500. else {
  501. s->kb.scan = (value >> 14) & 1;
  502. s->kb.debounce = (value >> 11) & 7;
  503. if (s->kb.intr && s->kb.scan) {
  504. s->kb.intr = 0;
  505. qemu_irq_raise(s->kbint);
  506. }
  507. }
  508. return;
  509. case 0x02: /* DAC Control */
  510. if ((s->model & 0xff00) == 0x2300) {
  511. s->dac_power &= 0x7fff;
  512. s->dac_power |= 0x8000 & value;
  513. } else
  514. goto bad_reg;
  515. break;
  516. case 0x03: /* Reference */
  517. s->ref = value & 0x1f;
  518. return;
  519. case 0x04: /* Reset */
  520. if (value == 0xbb00) {
  521. if (s->busy)
  522. timer_del(s->timer);
  523. tsc210x_reset(s);
  524. #ifdef TSC_VERBOSE
  525. } else {
  526. fprintf(stderr, "tsc2102_control_register_write: "
  527. "wrong value written into RESET\n");
  528. #endif
  529. }
  530. return;
  531. case 0x05: /* Configuration */
  532. s->timing = value & 0x3f;
  533. #ifdef TSC_VERBOSE
  534. if (value & ~0x3f)
  535. fprintf(stderr, "tsc2102_control_register_write: "
  536. "wrong value written into CONFIG\n");
  537. #endif
  538. return;
  539. case 0x06: /* Secondary configuration */
  540. if ((s->model & 0xff00) == 0x2100)
  541. goto bad_reg;
  542. s->kb.mode = value >> 14;
  543. s->pll[2] = value & 0x3ffff;
  544. return;
  545. case 0x10: /* Keypad Mask */
  546. if ((s->model & 0xff00) == 0x2100)
  547. goto bad_reg;
  548. s->kb.mask = value;
  549. return;
  550. default:
  551. bad_reg:
  552. qemu_log_mask(LOG_GUEST_ERROR, "tsc2102_control_register_write: "
  553. "no such register: 0x%02x\n", reg);
  554. }
  555. }
  556. static void tsc2102_audio_register_write(
  557. TSC210xState *s, int reg, uint16_t value)
  558. {
  559. switch (reg) {
  560. case 0x00: /* Audio Control 1 */
  561. s->audio_ctrl1 = value & 0x0f3f;
  562. #ifdef TSC_VERBOSE
  563. if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
  564. fprintf(stderr, "tsc2102_audio_register_write: "
  565. "wrong value written into Audio 1\n");
  566. #endif
  567. tsc2102_audio_rate_update(s);
  568. tsc2102_audio_output_update(s);
  569. return;
  570. case 0x01:
  571. #ifdef TSC_VERBOSE
  572. if (value != 0xff00)
  573. fprintf(stderr, "tsc2102_audio_register_write: "
  574. "wrong value written into reg 0x01\n");
  575. #endif
  576. return;
  577. case 0x02: /* DAC Volume Control */
  578. s->volume = value;
  579. s->volume_change = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  580. return;
  581. case 0x03:
  582. #ifdef TSC_VERBOSE
  583. if (value != 0x8b00)
  584. fprintf(stderr, "tsc2102_audio_register_write: "
  585. "wrong value written into reg 0x03\n");
  586. #endif
  587. return;
  588. case 0x04: /* Audio Control 2 */
  589. s->audio_ctrl2 = value & 0xf7f2;
  590. #ifdef TSC_VERBOSE
  591. if (value & ~0xf7fd)
  592. fprintf(stderr, "tsc2102_audio_register_write: "
  593. "wrong value written into Audio 2\n");
  594. #endif
  595. return;
  596. case 0x05: /* Stereo DAC Power Control */
  597. if ((value & ~s->dac_power) & (1 << 10))
  598. s->powerdown = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  599. s->dac_power = value & 0x9543;
  600. #ifdef TSC_VERBOSE
  601. if ((value & ~0x9543) != 0x2aa0)
  602. fprintf(stderr, "tsc2102_audio_register_write: "
  603. "wrong value written into Power\n");
  604. #endif
  605. tsc2102_audio_rate_update(s);
  606. tsc2102_audio_output_update(s);
  607. return;
  608. case 0x06: /* Audio Control 3 */
  609. s->audio_ctrl3 &= 0x00c0;
  610. s->audio_ctrl3 |= value & 0xf800;
  611. #ifdef TSC_VERBOSE
  612. if (value & ~0xf8c7)
  613. fprintf(stderr, "tsc2102_audio_register_write: "
  614. "wrong value written into Audio 3\n");
  615. #endif
  616. tsc2102_audio_output_update(s);
  617. return;
  618. case 0x07: /* LCH_BASS_BOOST_N0 */
  619. case 0x08: /* LCH_BASS_BOOST_N1 */
  620. case 0x09: /* LCH_BASS_BOOST_N2 */
  621. case 0x0a: /* LCH_BASS_BOOST_N3 */
  622. case 0x0b: /* LCH_BASS_BOOST_N4 */
  623. case 0x0c: /* LCH_BASS_BOOST_N5 */
  624. case 0x0d: /* LCH_BASS_BOOST_D1 */
  625. case 0x0e: /* LCH_BASS_BOOST_D2 */
  626. case 0x0f: /* LCH_BASS_BOOST_D4 */
  627. case 0x10: /* LCH_BASS_BOOST_D5 */
  628. case 0x11: /* RCH_BASS_BOOST_N0 */
  629. case 0x12: /* RCH_BASS_BOOST_N1 */
  630. case 0x13: /* RCH_BASS_BOOST_N2 */
  631. case 0x14: /* RCH_BASS_BOOST_N3 */
  632. case 0x15: /* RCH_BASS_BOOST_N4 */
  633. case 0x16: /* RCH_BASS_BOOST_N5 */
  634. case 0x17: /* RCH_BASS_BOOST_D1 */
  635. case 0x18: /* RCH_BASS_BOOST_D2 */
  636. case 0x19: /* RCH_BASS_BOOST_D4 */
  637. case 0x1a: /* RCH_BASS_BOOST_D5 */
  638. s->filter_data[reg - 0x07] = value;
  639. return;
  640. case 0x1b: /* PLL Programmability 1 */
  641. s->pll[0] = value & 0xfffc;
  642. #ifdef TSC_VERBOSE
  643. if (value & ~0xfffc)
  644. fprintf(stderr, "tsc2102_audio_register_write: "
  645. "wrong value written into PLL 1\n");
  646. #endif
  647. return;
  648. case 0x1c: /* PLL Programmability 2 */
  649. s->pll[1] = value & 0xfffc;
  650. #ifdef TSC_VERBOSE
  651. if (value & ~0xfffc)
  652. fprintf(stderr, "tsc2102_audio_register_write: "
  653. "wrong value written into PLL 2\n");
  654. #endif
  655. return;
  656. case 0x1d: /* Audio Control 4 */
  657. s->softstep = !(value & 0x4000);
  658. #ifdef TSC_VERBOSE
  659. if (value & ~0x4000)
  660. fprintf(stderr, "tsc2102_audio_register_write: "
  661. "wrong value written into Audio 4\n");
  662. #endif
  663. return;
  664. default:
  665. qemu_log_mask(LOG_GUEST_ERROR, "tsc2102_audio_register_write: "
  666. "no such register: 0x%02x\n", reg);
  667. }
  668. }
  669. /* This handles most of the chip logic. */
  670. static void tsc210x_pin_update(TSC210xState *s)
  671. {
  672. int64_t expires;
  673. bool pin_state;
  674. switch (s->pin_func) {
  675. case 0:
  676. pin_state = s->pressure;
  677. break;
  678. case 1:
  679. pin_state = !!s->dav;
  680. break;
  681. case 2:
  682. default:
  683. pin_state = s->pressure && !s->dav;
  684. }
  685. if (!s->enabled)
  686. pin_state = false;
  687. if (pin_state != s->irq) {
  688. s->irq = pin_state;
  689. qemu_set_irq(s->pint, !s->irq);
  690. }
  691. switch (s->nextfunction) {
  692. case TSC_MODE_XY_SCAN:
  693. case TSC_MODE_XYZ_SCAN:
  694. if (!s->pressure)
  695. return;
  696. break;
  697. case TSC_MODE_X:
  698. case TSC_MODE_Y:
  699. case TSC_MODE_Z:
  700. if (!s->pressure)
  701. return;
  702. /* Fall through */
  703. case TSC_MODE_BAT1:
  704. case TSC_MODE_BAT2:
  705. case TSC_MODE_AUX:
  706. case TSC_MODE_TEMP1:
  707. case TSC_MODE_TEMP2:
  708. if (s->dav)
  709. s->enabled = false;
  710. break;
  711. case TSC_MODE_AUX_SCAN:
  712. case TSC_MODE_PORT_SCAN:
  713. break;
  714. case TSC_MODE_NO_SCAN:
  715. case TSC_MODE_XX_DRV:
  716. case TSC_MODE_YY_DRV:
  717. case TSC_MODE_YX_DRV:
  718. default:
  719. return;
  720. }
  721. if (!s->enabled || s->busy || s->dav)
  722. return;
  723. s->busy = true;
  724. s->precision = s->nextprecision;
  725. s->function = s->nextfunction;
  726. expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
  727. (NANOSECONDS_PER_SECOND >> 10);
  728. timer_mod(s->timer, expires);
  729. }
  730. static uint16_t tsc210x_read(TSC210xState *s)
  731. {
  732. uint16_t ret = 0x0000;
  733. if (!s->command)
  734. fprintf(stderr, "tsc210x_read: SPI underrun!\n");
  735. switch (s->page) {
  736. case TSC_DATA_REGISTERS_PAGE:
  737. ret = tsc2102_data_register_read(s, s->offset);
  738. if (!s->dav)
  739. qemu_irq_raise(s->davint);
  740. break;
  741. case TSC_CONTROL_REGISTERS_PAGE:
  742. ret = tsc2102_control_register_read(s, s->offset);
  743. break;
  744. case TSC_AUDIO_REGISTERS_PAGE:
  745. ret = tsc2102_audio_register_read(s, s->offset);
  746. break;
  747. default:
  748. hw_error("tsc210x_read: wrong memory page\n");
  749. }
  750. tsc210x_pin_update(s);
  751. /* Allow sequential reads. */
  752. s->offset ++;
  753. s->state = false;
  754. return ret;
  755. }
  756. static void tsc210x_write(TSC210xState *s, uint16_t value)
  757. {
  758. /*
  759. * This is a two-state state machine for reading
  760. * command and data every second time.
  761. */
  762. if (!s->state) {
  763. s->command = (value >> 15) != 0;
  764. s->page = (value >> 11) & 0x0f;
  765. s->offset = (value >> 5) & 0x3f;
  766. s->state = true;
  767. } else {
  768. if (s->command)
  769. fprintf(stderr, "tsc210x_write: SPI overrun!\n");
  770. else
  771. switch (s->page) {
  772. case TSC_DATA_REGISTERS_PAGE:
  773. tsc2102_data_register_write(s, s->offset, value);
  774. break;
  775. case TSC_CONTROL_REGISTERS_PAGE:
  776. tsc2102_control_register_write(s, s->offset, value);
  777. break;
  778. case TSC_AUDIO_REGISTERS_PAGE:
  779. tsc2102_audio_register_write(s, s->offset, value);
  780. break;
  781. default:
  782. hw_error("tsc210x_write: wrong memory page\n");
  783. }
  784. tsc210x_pin_update(s);
  785. s->state = false;
  786. }
  787. }
  788. uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
  789. {
  790. TSC210xState *s = opaque;
  791. uint32_t ret = 0;
  792. if (len != 16)
  793. hw_error("%s: FIXME: bad SPI word width %i\n", __func__, len);
  794. /* TODO: sequential reads etc - how do we make sure the host doesn't
  795. * unintentionally read out a conversion result from a register while
  796. * transmitting the command word of the next command? */
  797. if (!value || (s->state && s->command))
  798. ret = tsc210x_read(s);
  799. if (value || (s->state && !s->command))
  800. tsc210x_write(s, value);
  801. return ret;
  802. }
  803. static void tsc210x_timer_tick(void *opaque)
  804. {
  805. TSC210xState *s = opaque;
  806. /* Timer ticked -- a set of conversions has been finished. */
  807. if (!s->busy)
  808. return;
  809. s->busy = false;
  810. s->dav |= mode_regs[s->function];
  811. tsc210x_pin_update(s);
  812. qemu_irq_lower(s->davint);
  813. }
  814. static void tsc210x_touchscreen_event(void *opaque,
  815. int x, int y, int z, int buttons_state)
  816. {
  817. TSC210xState *s = opaque;
  818. int p = s->pressure;
  819. if (buttons_state) {
  820. s->x = x;
  821. s->y = y;
  822. }
  823. s->pressure = !!buttons_state;
  824. /*
  825. * Note: We would get better responsiveness in the guest by
  826. * signaling TS events immediately, but for now we simulate
  827. * the first conversion delay for sake of correctness.
  828. */
  829. if (p != s->pressure)
  830. tsc210x_pin_update(s);
  831. }
  832. static void tsc210x_i2s_swallow(TSC210xState *s)
  833. {
  834. if (s->dac_voice[0])
  835. tsc210x_out_flush(s, s->codec.out.len);
  836. else
  837. s->codec.out.len = 0;
  838. }
  839. static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
  840. {
  841. s->i2s_tx_rate = out;
  842. s->i2s_rx_rate = in;
  843. }
  844. static int tsc210x_pre_save(void *opaque)
  845. {
  846. TSC210xState *s = (TSC210xState *) opaque;
  847. s->now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  848. return 0;
  849. }
  850. static int tsc210x_post_load(void *opaque, int version_id)
  851. {
  852. TSC210xState *s = (TSC210xState *) opaque;
  853. int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  854. if (s->function >= ARRAY_SIZE(mode_regs)) {
  855. return -EINVAL;
  856. }
  857. if (s->nextfunction >= ARRAY_SIZE(mode_regs)) {
  858. return -EINVAL;
  859. }
  860. if (s->precision >= ARRAY_SIZE(resolution)) {
  861. return -EINVAL;
  862. }
  863. if (s->nextprecision >= ARRAY_SIZE(resolution)) {
  864. return -EINVAL;
  865. }
  866. s->volume_change -= s->now;
  867. s->volume_change += now;
  868. s->powerdown -= s->now;
  869. s->powerdown += now;
  870. s->busy = timer_pending(s->timer);
  871. qemu_set_irq(s->pint, !s->irq);
  872. qemu_set_irq(s->davint, !s->dav);
  873. return 0;
  874. }
  875. static VMStateField vmstatefields_tsc210x[] = {
  876. VMSTATE_BOOL(enabled, TSC210xState),
  877. VMSTATE_BOOL(host_mode, TSC210xState),
  878. VMSTATE_BOOL(irq, TSC210xState),
  879. VMSTATE_BOOL(command, TSC210xState),
  880. VMSTATE_BOOL(pressure, TSC210xState),
  881. VMSTATE_BOOL(softstep, TSC210xState),
  882. VMSTATE_BOOL(state, TSC210xState),
  883. VMSTATE_UINT16(dav, TSC210xState),
  884. VMSTATE_INT32(x, TSC210xState),
  885. VMSTATE_INT32(y, TSC210xState),
  886. VMSTATE_UINT8(offset, TSC210xState),
  887. VMSTATE_UINT8(page, TSC210xState),
  888. VMSTATE_UINT8(filter, TSC210xState),
  889. VMSTATE_UINT8(pin_func, TSC210xState),
  890. VMSTATE_UINT8(ref, TSC210xState),
  891. VMSTATE_UINT8(timing, TSC210xState),
  892. VMSTATE_UINT8(noise, TSC210xState),
  893. VMSTATE_UINT8(function, TSC210xState),
  894. VMSTATE_UINT8(nextfunction, TSC210xState),
  895. VMSTATE_UINT8(precision, TSC210xState),
  896. VMSTATE_UINT8(nextprecision, TSC210xState),
  897. VMSTATE_UINT16(audio_ctrl1, TSC210xState),
  898. VMSTATE_UINT16(audio_ctrl2, TSC210xState),
  899. VMSTATE_UINT16(audio_ctrl3, TSC210xState),
  900. VMSTATE_UINT16_ARRAY(pll, TSC210xState, 3),
  901. VMSTATE_UINT16(volume, TSC210xState),
  902. VMSTATE_UINT16(dac_power, TSC210xState),
  903. VMSTATE_INT64(volume_change, TSC210xState),
  904. VMSTATE_INT64(powerdown, TSC210xState),
  905. VMSTATE_INT64(now, TSC210xState),
  906. VMSTATE_UINT16_ARRAY(filter_data, TSC210xState, 0x14),
  907. VMSTATE_TIMER_PTR(timer, TSC210xState),
  908. VMSTATE_END_OF_LIST()
  909. };
  910. static const VMStateDescription vmstate_tsc2102 = {
  911. .name = "tsc2102",
  912. .version_id = 1,
  913. .minimum_version_id = 1,
  914. .pre_save = tsc210x_pre_save,
  915. .post_load = tsc210x_post_load,
  916. .fields = vmstatefields_tsc210x,
  917. };
  918. static const VMStateDescription vmstate_tsc2301 = {
  919. .name = "tsc2301",
  920. .version_id = 1,
  921. .minimum_version_id = 1,
  922. .pre_save = tsc210x_pre_save,
  923. .post_load = tsc210x_post_load,
  924. .fields = vmstatefields_tsc210x,
  925. };
  926. uWireSlave *tsc2102_init(qemu_irq pint)
  927. {
  928. TSC210xState *s;
  929. s = g_new0(TSC210xState, 1);
  930. s->x = 160;
  931. s->y = 160;
  932. s->pressure = 0;
  933. s->precision = s->nextprecision = 0;
  934. s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s);
  935. s->pint = pint;
  936. s->model = 0x2102;
  937. s->name = "tsc2102";
  938. s->tr[0] = 0;
  939. s->tr[1] = 1;
  940. s->tr[2] = 1;
  941. s->tr[3] = 0;
  942. s->tr[4] = 1;
  943. s->tr[5] = 0;
  944. s->tr[6] = 1;
  945. s->tr[7] = 0;
  946. s->chip.opaque = s;
  947. s->chip.send = (void *) tsc210x_write;
  948. s->chip.receive = (void *) tsc210x_read;
  949. s->codec.opaque = s;
  950. s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
  951. s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
  952. s->codec.in.fifo = s->in_fifo;
  953. s->codec.out.fifo = s->out_fifo;
  954. tsc210x_reset(s);
  955. qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
  956. "QEMU TSC2102-driven Touchscreen");
  957. AUD_register_card(s->name, &s->card);
  958. qemu_register_reset((void *) tsc210x_reset, s);
  959. vmstate_register(NULL, 0, &vmstate_tsc2102, s);
  960. return &s->chip;
  961. }
  962. uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
  963. {
  964. TSC210xState *s;
  965. s = g_new0(TSC210xState, 1);
  966. s->x = 400;
  967. s->y = 240;
  968. s->pressure = 0;
  969. s->precision = s->nextprecision = 0;
  970. s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s);
  971. s->pint = penirq;
  972. s->kbint = kbirq;
  973. s->davint = dav;
  974. s->model = 0x2301;
  975. s->name = "tsc2301";
  976. s->tr[0] = 0;
  977. s->tr[1] = 1;
  978. s->tr[2] = 1;
  979. s->tr[3] = 0;
  980. s->tr[4] = 1;
  981. s->tr[5] = 0;
  982. s->tr[6] = 1;
  983. s->tr[7] = 0;
  984. s->chip.opaque = s;
  985. s->chip.send = (void *) tsc210x_write;
  986. s->chip.receive = (void *) tsc210x_read;
  987. s->codec.opaque = s;
  988. s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
  989. s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
  990. s->codec.in.fifo = s->in_fifo;
  991. s->codec.out.fifo = s->out_fifo;
  992. tsc210x_reset(s);
  993. qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
  994. "QEMU TSC2301-driven Touchscreen");
  995. AUD_register_card(s->name, &s->card);
  996. qemu_register_reset((void *) tsc210x_reset, s);
  997. vmstate_register(NULL, 0, &vmstate_tsc2301, s);
  998. return &s->chip;
  999. }
  1000. I2SCodec *tsc210x_codec(uWireSlave *chip)
  1001. {
  1002. TSC210xState *s = (TSC210xState *) chip->opaque;
  1003. return &s->codec;
  1004. }
  1005. /*
  1006. * Use tslib generated calibration data to generate ADC input values
  1007. * from the touchscreen. Assuming 12-bit precision was used during
  1008. * tslib calibration.
  1009. */
  1010. void tsc210x_set_transform(uWireSlave *chip,
  1011. MouseTransformInfo *info)
  1012. {
  1013. TSC210xState *s = (TSC210xState *) chip->opaque;
  1014. #if 0
  1015. int64_t ltr[8];
  1016. ltr[0] = (int64_t) info->a[1] * info->y;
  1017. ltr[1] = (int64_t) info->a[4] * info->x;
  1018. ltr[2] = (int64_t) info->a[1] * info->a[3] -
  1019. (int64_t) info->a[4] * info->a[0];
  1020. ltr[3] = (int64_t) info->a[2] * info->a[4] -
  1021. (int64_t) info->a[5] * info->a[1];
  1022. ltr[4] = (int64_t) info->a[0] * info->y;
  1023. ltr[5] = (int64_t) info->a[3] * info->x;
  1024. ltr[6] = (int64_t) info->a[4] * info->a[0] -
  1025. (int64_t) info->a[1] * info->a[3];
  1026. ltr[7] = (int64_t) info->a[2] * info->a[3] -
  1027. (int64_t) info->a[5] * info->a[0];
  1028. /* Avoid integer overflow */
  1029. s->tr[0] = ltr[0] >> 11;
  1030. s->tr[1] = ltr[1] >> 11;
  1031. s->tr[2] = muldiv64(ltr[2], 1, info->a[6]);
  1032. s->tr[3] = muldiv64(ltr[3], 1 << 4, ltr[2]);
  1033. s->tr[4] = ltr[4] >> 11;
  1034. s->tr[5] = ltr[5] >> 11;
  1035. s->tr[6] = muldiv64(ltr[6], 1, info->a[6]);
  1036. s->tr[7] = muldiv64(ltr[7], 1 << 4, ltr[6]);
  1037. #else
  1038. /* This version assumes touchscreen X & Y axis are parallel or
  1039. * perpendicular to LCD's X & Y axis in some way. */
  1040. if (abs(info->a[0]) > abs(info->a[1])) {
  1041. s->tr[0] = 0;
  1042. s->tr[1] = -info->a[6] * info->x;
  1043. s->tr[2] = info->a[0];
  1044. s->tr[3] = -info->a[2] / info->a[0];
  1045. s->tr[4] = info->a[6] * info->y;
  1046. s->tr[5] = 0;
  1047. s->tr[6] = info->a[4];
  1048. s->tr[7] = -info->a[5] / info->a[4];
  1049. } else {
  1050. s->tr[0] = info->a[6] * info->y;
  1051. s->tr[1] = 0;
  1052. s->tr[2] = info->a[1];
  1053. s->tr[3] = -info->a[2] / info->a[1];
  1054. s->tr[4] = 0;
  1055. s->tr[5] = -info->a[6] * info->x;
  1056. s->tr[6] = info->a[3];
  1057. s->tr[7] = -info->a[5] / info->a[3];
  1058. }
  1059. s->tr[0] >>= 11;
  1060. s->tr[1] >>= 11;
  1061. s->tr[3] <<= 4;
  1062. s->tr[4] >>= 11;
  1063. s->tr[5] >>= 11;
  1064. s->tr[7] <<= 4;
  1065. #endif
  1066. }
  1067. void tsc210x_key_event(uWireSlave *chip, int key, int down)
  1068. {
  1069. TSC210xState *s = (TSC210xState *) chip->opaque;
  1070. if (down)
  1071. s->kb.down |= 1 << key;
  1072. else
  1073. s->kb.down &= ~(1 << key);
  1074. if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
  1075. s->kb.intr = 1;
  1076. qemu_irq_lower(s->kbint);
  1077. } else if (s->kb.intr && !(s->kb.down & ~s->kb.mask) &&
  1078. !(s->kb.mode & 1)) {
  1079. s->kb.intr = 0;
  1080. qemu_irq_raise(s->kbint);
  1081. }
  1082. }