pc_piix.c 34 KB

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  1. /*
  2. * QEMU PC System Emulator
  3. *
  4. * Copyright (c) 2003-2004 Fabrice Bellard
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a copy
  7. * of this software and associated documentation files (the "Software"), to deal
  8. * in the Software without restriction, including without limitation the rights
  9. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. * copies of the Software, and to permit persons to whom the Software is
  11. * furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22. * THE SOFTWARE.
  23. */
  24. #include "qemu/osdep.h"
  25. #include "config-devices.h"
  26. #include "qemu/units.h"
  27. #include "hw/loader.h"
  28. #include "hw/i386/x86.h"
  29. #include "hw/i386/pc.h"
  30. #include "hw/i386/apic.h"
  31. #include "hw/pci-host/i440fx.h"
  32. #include "hw/southbridge/piix.h"
  33. #include "hw/display/ramfb.h"
  34. #include "hw/firmware/smbios.h"
  35. #include "hw/pci/pci.h"
  36. #include "hw/pci/pci_ids.h"
  37. #include "hw/usb.h"
  38. #include "net/net.h"
  39. #include "hw/ide.h"
  40. #include "hw/irq.h"
  41. #include "sysemu/kvm.h"
  42. #include "hw/kvm/clock.h"
  43. #include "sysemu/sysemu.h"
  44. #include "hw/sysbus.h"
  45. #include "sysemu/arch_init.h"
  46. #include "hw/i2c/smbus_eeprom.h"
  47. #include "hw/xen/xen.h"
  48. #include "exec/memory.h"
  49. #include "exec/address-spaces.h"
  50. #include "hw/acpi/acpi.h"
  51. #include "cpu.h"
  52. #include "qapi/error.h"
  53. #include "qemu/error-report.h"
  54. #ifdef CONFIG_XEN
  55. #include <xen/hvm/hvm_info_table.h>
  56. #include "hw/xen/xen_pt.h"
  57. #endif
  58. #include "migration/global_state.h"
  59. #include "migration/misc.h"
  60. #include "sysemu/numa.h"
  61. #define MAX_IDE_BUS 2
  62. #ifdef CONFIG_IDE_ISA
  63. static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  64. static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  65. static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  66. #endif
  67. /* PC hardware initialisation */
  68. static void pc_init1(MachineState *machine,
  69. const char *host_type, const char *pci_type)
  70. {
  71. PCMachineState *pcms = PC_MACHINE(machine);
  72. PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
  73. X86MachineState *x86ms = X86_MACHINE(machine);
  74. MemoryRegion *system_memory = get_system_memory();
  75. MemoryRegion *system_io = get_system_io();
  76. PCIBus *pci_bus;
  77. ISABus *isa_bus;
  78. PCII440FXState *i440fx_state;
  79. int piix3_devfn = -1;
  80. qemu_irq smi_irq;
  81. GSIState *gsi_state;
  82. DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  83. BusState *idebus[MAX_IDE_BUS];
  84. ISADevice *rtc_state;
  85. MemoryRegion *ram_memory;
  86. MemoryRegion *pci_memory;
  87. MemoryRegion *rom_memory;
  88. ram_addr_t lowmem;
  89. /*
  90. * Calculate ram split, for memory below and above 4G. It's a bit
  91. * complicated for backward compatibility reasons ...
  92. *
  93. * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
  94. * default value for max_ram_below_4g now.
  95. *
  96. * - Then, to gigabyte align the memory, we move the split to 3G
  97. * (lowmem = 0xc0000000). But only in case we have to split in
  98. * the first place, i.e. ram_size is larger than (traditional)
  99. * lowmem. And for new machine types (gigabyte_align = true)
  100. * only, for live migration compatibility reasons.
  101. *
  102. * - Next the max-ram-below-4g option was added, which allowed to
  103. * reduce lowmem to a smaller value, to allow a larger PCI I/O
  104. * window below 4G. qemu doesn't enforce gigabyte alignment here,
  105. * but prints a warning.
  106. *
  107. * - Finally max-ram-below-4g got updated to also allow raising lowmem,
  108. * so legacy non-PAE guests can get as much memory as possible in
  109. * the 32bit address space below 4G.
  110. *
  111. * - Note that Xen has its own ram setp code in xen_ram_init(),
  112. * called via xen_hvm_init().
  113. *
  114. * Examples:
  115. * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
  116. * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
  117. * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
  118. * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
  119. */
  120. if (xen_enabled()) {
  121. xen_hvm_init(pcms, &ram_memory);
  122. } else {
  123. if (!x86ms->max_ram_below_4g) {
  124. x86ms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
  125. }
  126. lowmem = x86ms->max_ram_below_4g;
  127. if (machine->ram_size >= x86ms->max_ram_below_4g) {
  128. if (pcmc->gigabyte_align) {
  129. if (lowmem > 0xc0000000) {
  130. lowmem = 0xc0000000;
  131. }
  132. if (lowmem & (1 * GiB - 1)) {
  133. warn_report("Large machine and max_ram_below_4g "
  134. "(%" PRIu64 ") not a multiple of 1G; "
  135. "possible bad performance.",
  136. x86ms->max_ram_below_4g);
  137. }
  138. }
  139. }
  140. if (machine->ram_size >= lowmem) {
  141. x86ms->above_4g_mem_size = machine->ram_size - lowmem;
  142. x86ms->below_4g_mem_size = lowmem;
  143. } else {
  144. x86ms->above_4g_mem_size = 0;
  145. x86ms->below_4g_mem_size = machine->ram_size;
  146. }
  147. }
  148. x86_cpus_init(x86ms, pcmc->default_cpu_version);
  149. if (kvm_enabled() && pcmc->kvmclock_enabled) {
  150. kvmclock_create();
  151. }
  152. if (pcmc->pci_enabled) {
  153. pci_memory = g_new(MemoryRegion, 1);
  154. memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
  155. rom_memory = pci_memory;
  156. } else {
  157. pci_memory = NULL;
  158. rom_memory = system_memory;
  159. }
  160. pc_guest_info_init(pcms);
  161. if (pcmc->smbios_defaults) {
  162. MachineClass *mc = MACHINE_GET_CLASS(machine);
  163. /* These values are guest ABI, do not change */
  164. smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
  165. mc->name, pcmc->smbios_legacy_mode,
  166. pcmc->smbios_uuid_encoded,
  167. SMBIOS_ENTRY_POINT_21);
  168. }
  169. /* allocate ram and load rom/bios */
  170. if (!xen_enabled()) {
  171. pc_memory_init(pcms, system_memory,
  172. rom_memory, &ram_memory);
  173. } else if (machine->kernel_filename != NULL) {
  174. /* For xen HVM direct kernel boot, load linux here */
  175. xen_load_linux(pcms);
  176. }
  177. gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
  178. if (pcmc->pci_enabled) {
  179. PIIX3State *piix3;
  180. pci_bus = i440fx_init(host_type,
  181. pci_type,
  182. &i440fx_state,
  183. system_memory, system_io, machine->ram_size,
  184. x86ms->below_4g_mem_size,
  185. x86ms->above_4g_mem_size,
  186. pci_memory, ram_memory);
  187. pcms->bus = pci_bus;
  188. piix3 = piix3_create(pci_bus, &isa_bus);
  189. piix3->pic = x86ms->gsi;
  190. piix3_devfn = piix3->dev.devfn;
  191. } else {
  192. pci_bus = NULL;
  193. i440fx_state = NULL;
  194. isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
  195. &error_abort);
  196. no_hpet = 1;
  197. }
  198. isa_bus_irqs(isa_bus, x86ms->gsi);
  199. pc_i8259_create(isa_bus, gsi_state->i8259_irq);
  200. if (pcmc->pci_enabled) {
  201. ioapic_init_gsi(gsi_state, "i440fx");
  202. }
  203. if (tcg_enabled()) {
  204. x86_register_ferr_irq(x86ms->gsi[13]);
  205. }
  206. pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
  207. assert(pcms->vmport != ON_OFF_AUTO__MAX);
  208. if (pcms->vmport == ON_OFF_AUTO_AUTO) {
  209. pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
  210. }
  211. /* init basic PC hardware */
  212. pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true,
  213. (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
  214. 0x4);
  215. pc_nic_init(pcmc, isa_bus, pci_bus);
  216. ide_drive_get(hd, ARRAY_SIZE(hd));
  217. if (pcmc->pci_enabled) {
  218. PCIDevice *dev;
  219. if (xen_enabled()) {
  220. dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
  221. } else {
  222. dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
  223. }
  224. idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
  225. idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
  226. pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
  227. }
  228. #ifdef CONFIG_IDE_ISA
  229. else {
  230. int i;
  231. for (i = 0; i < MAX_IDE_BUS; i++) {
  232. ISADevice *dev;
  233. char busname[] = "ide.0";
  234. dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
  235. ide_irq[i],
  236. hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
  237. /*
  238. * The ide bus name is ide.0 for the first bus and ide.1 for the
  239. * second one.
  240. */
  241. busname[4] = '0' + i;
  242. idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
  243. }
  244. pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
  245. }
  246. #endif
  247. if (pcmc->pci_enabled && machine_usb(machine)) {
  248. pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
  249. }
  250. if (pcmc->pci_enabled && acpi_enabled) {
  251. DeviceState *piix4_pm;
  252. smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
  253. /* TODO: Populate SPD eeprom data. */
  254. pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
  255. x86ms->gsi[9], smi_irq,
  256. pc_machine_is_smm_enabled(pcms),
  257. &piix4_pm);
  258. smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
  259. object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
  260. TYPE_HOTPLUG_HANDLER,
  261. (Object **)&pcms->acpi_dev,
  262. object_property_allow_set_link,
  263. OBJ_PROP_LINK_STRONG, &error_abort);
  264. object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
  265. PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
  266. }
  267. if (machine->nvdimms_state->is_enabled) {
  268. nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
  269. x86ms->fw_cfg, OBJECT(pcms));
  270. }
  271. }
  272. /* Looking for a pc_compat_2_4() function? It doesn't exist.
  273. * pc_compat_*() functions that run on machine-init time and
  274. * change global QEMU state are deprecated. Please don't create
  275. * one, and implement any pc-*-2.4 (and newer) compat code in
  276. * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
  277. */
  278. static void pc_compat_2_3_fn(MachineState *machine)
  279. {
  280. PCMachineState *pcms = PC_MACHINE(machine);
  281. if (kvm_enabled()) {
  282. pcms->smm = ON_OFF_AUTO_OFF;
  283. }
  284. }
  285. static void pc_compat_2_2_fn(MachineState *machine)
  286. {
  287. pc_compat_2_3_fn(machine);
  288. }
  289. static void pc_compat_2_1_fn(MachineState *machine)
  290. {
  291. pc_compat_2_2_fn(machine);
  292. x86_cpu_change_kvm_default("svm", NULL);
  293. }
  294. static void pc_compat_2_0_fn(MachineState *machine)
  295. {
  296. pc_compat_2_1_fn(machine);
  297. }
  298. static void pc_compat_1_7_fn(MachineState *machine)
  299. {
  300. pc_compat_2_0_fn(machine);
  301. x86_cpu_change_kvm_default("x2apic", NULL);
  302. }
  303. static void pc_compat_1_6_fn(MachineState *machine)
  304. {
  305. pc_compat_1_7_fn(machine);
  306. }
  307. static void pc_compat_1_5_fn(MachineState *machine)
  308. {
  309. pc_compat_1_6_fn(machine);
  310. }
  311. static void pc_compat_1_4_fn(MachineState *machine)
  312. {
  313. pc_compat_1_5_fn(machine);
  314. }
  315. static void pc_compat_1_3(MachineState *machine)
  316. {
  317. pc_compat_1_4_fn(machine);
  318. }
  319. /* PC compat function for pc-0.14 to pc-1.2 */
  320. static void pc_compat_1_2(MachineState *machine)
  321. {
  322. pc_compat_1_3(machine);
  323. x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
  324. }
  325. /* PC compat function for pc-0.12 and pc-0.13 */
  326. static void pc_compat_0_13(MachineState *machine)
  327. {
  328. pc_compat_1_2(machine);
  329. }
  330. static void pc_init_isa(MachineState *machine)
  331. {
  332. pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
  333. }
  334. #ifdef CONFIG_XEN
  335. static void pc_xen_hvm_init_pci(MachineState *machine)
  336. {
  337. const char *pci_type = has_igd_gfx_passthru ?
  338. TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
  339. pc_init1(machine,
  340. TYPE_I440FX_PCI_HOST_BRIDGE,
  341. pci_type);
  342. }
  343. static void pc_xen_hvm_init(MachineState *machine)
  344. {
  345. PCMachineState *pcms = PC_MACHINE(machine);
  346. if (!xen_enabled()) {
  347. error_report("xenfv machine requires the xen accelerator");
  348. exit(1);
  349. }
  350. pc_xen_hvm_init_pci(machine);
  351. pci_create_simple(pcms->bus, -1, "xen-platform");
  352. }
  353. #endif
  354. #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
  355. static void pc_init_##suffix(MachineState *machine) \
  356. { \
  357. void (*compat)(MachineState *m) = (compatfn); \
  358. if (compat) { \
  359. compat(machine); \
  360. } \
  361. pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
  362. TYPE_I440FX_PCI_DEVICE); \
  363. } \
  364. DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
  365. static void pc_i440fx_machine_options(MachineClass *m)
  366. {
  367. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  368. pcmc->default_nic_model = "e1000";
  369. m->family = "pc_piix";
  370. m->desc = "Standard PC (i440FX + PIIX, 1996)";
  371. m->default_machine_opts = "firmware=bios-256k.bin";
  372. m->default_display = "std";
  373. machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
  374. }
  375. static void pc_i440fx_4_2_machine_options(MachineClass *m)
  376. {
  377. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  378. pc_i440fx_machine_options(m);
  379. m->alias = "pc";
  380. m->is_default = 1;
  381. pcmc->default_cpu_version = 1;
  382. }
  383. DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
  384. pc_i440fx_4_2_machine_options);
  385. static void pc_i440fx_4_1_machine_options(MachineClass *m)
  386. {
  387. pc_i440fx_4_2_machine_options(m);
  388. m->alias = NULL;
  389. m->is_default = 0;
  390. compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
  391. compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
  392. }
  393. DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
  394. pc_i440fx_4_1_machine_options);
  395. static void pc_i440fx_4_0_machine_options(MachineClass *m)
  396. {
  397. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  398. pc_i440fx_4_1_machine_options(m);
  399. m->alias = NULL;
  400. m->is_default = 0;
  401. pcmc->default_cpu_version = CPU_VERSION_LEGACY;
  402. compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
  403. compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
  404. }
  405. DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
  406. pc_i440fx_4_0_machine_options);
  407. static void pc_i440fx_3_1_machine_options(MachineClass *m)
  408. {
  409. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  410. pc_i440fx_4_0_machine_options(m);
  411. m->is_default = 0;
  412. pcmc->do_not_add_smb_acpi = true;
  413. m->smbus_no_migration_support = true;
  414. m->alias = NULL;
  415. pcmc->pvh_enabled = false;
  416. compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
  417. compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
  418. }
  419. DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
  420. pc_i440fx_3_1_machine_options);
  421. static void pc_i440fx_3_0_machine_options(MachineClass *m)
  422. {
  423. pc_i440fx_3_1_machine_options(m);
  424. compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
  425. compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
  426. }
  427. DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
  428. pc_i440fx_3_0_machine_options);
  429. static void pc_i440fx_2_12_machine_options(MachineClass *m)
  430. {
  431. pc_i440fx_3_0_machine_options(m);
  432. compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
  433. compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
  434. }
  435. DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
  436. pc_i440fx_2_12_machine_options);
  437. static void pc_i440fx_2_11_machine_options(MachineClass *m)
  438. {
  439. pc_i440fx_2_12_machine_options(m);
  440. compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
  441. compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
  442. }
  443. DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
  444. pc_i440fx_2_11_machine_options);
  445. static void pc_i440fx_2_10_machine_options(MachineClass *m)
  446. {
  447. pc_i440fx_2_11_machine_options(m);
  448. compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
  449. compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
  450. m->auto_enable_numa_with_memhp = false;
  451. }
  452. DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
  453. pc_i440fx_2_10_machine_options);
  454. static void pc_i440fx_2_9_machine_options(MachineClass *m)
  455. {
  456. pc_i440fx_2_10_machine_options(m);
  457. compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
  458. compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
  459. m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
  460. }
  461. DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
  462. pc_i440fx_2_9_machine_options);
  463. static void pc_i440fx_2_8_machine_options(MachineClass *m)
  464. {
  465. pc_i440fx_2_9_machine_options(m);
  466. compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
  467. compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
  468. }
  469. DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
  470. pc_i440fx_2_8_machine_options);
  471. static void pc_i440fx_2_7_machine_options(MachineClass *m)
  472. {
  473. pc_i440fx_2_8_machine_options(m);
  474. compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
  475. compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
  476. }
  477. DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
  478. pc_i440fx_2_7_machine_options);
  479. static void pc_i440fx_2_6_machine_options(MachineClass *m)
  480. {
  481. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  482. pc_i440fx_2_7_machine_options(m);
  483. pcmc->legacy_cpu_hotplug = true;
  484. pcmc->linuxboot_dma_enabled = false;
  485. compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
  486. compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
  487. }
  488. DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
  489. pc_i440fx_2_6_machine_options);
  490. static void pc_i440fx_2_5_machine_options(MachineClass *m)
  491. {
  492. X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
  493. pc_i440fx_2_6_machine_options(m);
  494. x86mc->save_tsc_khz = false;
  495. m->legacy_fw_cfg_order = 1;
  496. compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
  497. compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
  498. }
  499. DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
  500. pc_i440fx_2_5_machine_options);
  501. static void pc_i440fx_2_4_machine_options(MachineClass *m)
  502. {
  503. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  504. pc_i440fx_2_5_machine_options(m);
  505. m->hw_version = "2.4.0";
  506. pcmc->broken_reserved_end = true;
  507. compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
  508. compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
  509. }
  510. DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
  511. pc_i440fx_2_4_machine_options)
  512. static void pc_i440fx_2_3_machine_options(MachineClass *m)
  513. {
  514. pc_i440fx_2_4_machine_options(m);
  515. m->hw_version = "2.3.0";
  516. compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
  517. compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
  518. }
  519. DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
  520. pc_i440fx_2_3_machine_options);
  521. static void pc_i440fx_2_2_machine_options(MachineClass *m)
  522. {
  523. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  524. pc_i440fx_2_3_machine_options(m);
  525. m->hw_version = "2.2.0";
  526. m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
  527. compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
  528. compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
  529. pcmc->rsdp_in_ram = false;
  530. }
  531. DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
  532. pc_i440fx_2_2_machine_options);
  533. static void pc_i440fx_2_1_machine_options(MachineClass *m)
  534. {
  535. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  536. pc_i440fx_2_2_machine_options(m);
  537. m->hw_version = "2.1.0";
  538. m->default_display = NULL;
  539. compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
  540. compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
  541. pcmc->smbios_uuid_encoded = false;
  542. pcmc->enforce_aligned_dimm = false;
  543. }
  544. DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
  545. pc_i440fx_2_1_machine_options);
  546. static void pc_i440fx_2_0_machine_options(MachineClass *m)
  547. {
  548. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  549. pc_i440fx_2_1_machine_options(m);
  550. m->hw_version = "2.0.0";
  551. compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
  552. pcmc->smbios_legacy_mode = true;
  553. pcmc->has_reserved_memory = false;
  554. /* This value depends on the actual DSDT and SSDT compiled into
  555. * the source QEMU; unfortunately it depends on the binary and
  556. * not on the machine type, so we cannot make pc-i440fx-1.7 work on
  557. * both QEMU 1.7 and QEMU 2.0.
  558. *
  559. * Large variations cause migration to fail for more than one
  560. * consecutive value of the "-smp" maxcpus option.
  561. *
  562. * For small variations of the kind caused by different iasl versions,
  563. * the 4k rounding usually leaves slack. However, there could be still
  564. * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
  565. * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
  566. *
  567. * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
  568. * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
  569. */
  570. pcmc->legacy_acpi_table_size = 6652;
  571. pcmc->acpi_data_size = 0x10000;
  572. }
  573. DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
  574. pc_i440fx_2_0_machine_options);
  575. static void pc_i440fx_1_7_machine_options(MachineClass *m)
  576. {
  577. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  578. pc_i440fx_2_0_machine_options(m);
  579. m->hw_version = "1.7.0";
  580. m->default_machine_opts = NULL;
  581. m->option_rom_has_mr = true;
  582. compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len);
  583. pcmc->smbios_defaults = false;
  584. pcmc->gigabyte_align = false;
  585. pcmc->legacy_acpi_table_size = 6414;
  586. }
  587. DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn,
  588. pc_i440fx_1_7_machine_options);
  589. static void pc_i440fx_1_6_machine_options(MachineClass *m)
  590. {
  591. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  592. pc_i440fx_1_7_machine_options(m);
  593. m->hw_version = "1.6.0";
  594. m->rom_file_has_mr = false;
  595. compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len);
  596. pcmc->has_acpi_build = false;
  597. }
  598. DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn,
  599. pc_i440fx_1_6_machine_options);
  600. static void pc_i440fx_1_5_machine_options(MachineClass *m)
  601. {
  602. pc_i440fx_1_6_machine_options(m);
  603. m->hw_version = "1.5.0";
  604. compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len);
  605. }
  606. DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn,
  607. pc_i440fx_1_5_machine_options);
  608. static void pc_i440fx_1_4_machine_options(MachineClass *m)
  609. {
  610. pc_i440fx_1_5_machine_options(m);
  611. m->hw_version = "1.4.0";
  612. m->hot_add_cpu = NULL;
  613. compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
  614. }
  615. DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
  616. pc_i440fx_1_4_machine_options);
  617. static void pc_i440fx_1_3_machine_options(MachineClass *m)
  618. {
  619. X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
  620. static GlobalProperty compat[] = {
  621. PC_CPU_MODEL_IDS("1.3.0")
  622. { "usb-tablet", "usb_version", "1" },
  623. { "virtio-net-pci", "ctrl_mac_addr", "off" },
  624. { "virtio-net-pci", "mq", "off" },
  625. { "e1000", "autonegotiation", "off" },
  626. };
  627. pc_i440fx_1_4_machine_options(m);
  628. m->hw_version = "1.3.0";
  629. x86mc->compat_apic_id_mode = true;
  630. compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
  631. }
  632. DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
  633. pc_i440fx_1_3_machine_options);
  634. static void pc_i440fx_1_2_machine_options(MachineClass *m)
  635. {
  636. static GlobalProperty compat[] = {
  637. PC_CPU_MODEL_IDS("1.2.0")
  638. { "nec-usb-xhci", "msi", "off" },
  639. { "nec-usb-xhci", "msix", "off" },
  640. { "qxl", "revision", "3" },
  641. { "qxl-vga", "revision", "3" },
  642. { "VGA", "mmio", "off" },
  643. };
  644. pc_i440fx_1_3_machine_options(m);
  645. m->hw_version = "1.2.0";
  646. compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
  647. }
  648. DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
  649. pc_i440fx_1_2_machine_options);
  650. static void pc_i440fx_1_1_machine_options(MachineClass *m)
  651. {
  652. static GlobalProperty compat[] = {
  653. PC_CPU_MODEL_IDS("1.1.0")
  654. { "virtio-scsi-pci", "hotplug", "off" },
  655. { "virtio-scsi-pci", "param_change", "off" },
  656. { "VGA", "vgamem_mb", "8" },
  657. { "vmware-svga", "vgamem_mb", "8" },
  658. { "qxl-vga", "vgamem_mb", "8" },
  659. { "qxl", "vgamem_mb", "8" },
  660. { "virtio-blk-pci", "config-wce", "off" },
  661. };
  662. pc_i440fx_1_2_machine_options(m);
  663. m->hw_version = "1.1.0";
  664. compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
  665. }
  666. DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
  667. pc_i440fx_1_1_machine_options);
  668. static void pc_i440fx_1_0_machine_options(MachineClass *m)
  669. {
  670. static GlobalProperty compat[] = {
  671. PC_CPU_MODEL_IDS("1.0")
  672. { TYPE_ISA_FDC, "check_media_rate", "off" },
  673. { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) },
  674. { "apic-common", "vapic", "off" },
  675. { TYPE_USB_DEVICE, "full-path", "no" },
  676. };
  677. pc_i440fx_1_1_machine_options(m);
  678. m->hw_version = "1.0";
  679. compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
  680. }
  681. DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
  682. pc_i440fx_1_0_machine_options);
  683. static void pc_i440fx_0_15_machine_options(MachineClass *m)
  684. {
  685. static GlobalProperty compat[] = {
  686. PC_CPU_MODEL_IDS("0.15")
  687. };
  688. pc_i440fx_1_0_machine_options(m);
  689. m->hw_version = "0.15";
  690. m->deprecation_reason = "use a newer machine type instead";
  691. compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
  692. }
  693. DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
  694. pc_i440fx_0_15_machine_options);
  695. static void pc_i440fx_0_14_machine_options(MachineClass *m)
  696. {
  697. static GlobalProperty compat[] = {
  698. PC_CPU_MODEL_IDS("0.14")
  699. { "virtio-blk-pci", "event_idx", "off" },
  700. { "virtio-serial-pci", "event_idx", "off" },
  701. { "virtio-net-pci", "event_idx", "off" },
  702. { "virtio-balloon-pci", "event_idx", "off" },
  703. { "qxl", "revision", "2" },
  704. { "qxl-vga", "revision", "2" },
  705. };
  706. pc_i440fx_0_15_machine_options(m);
  707. m->hw_version = "0.14";
  708. compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
  709. }
  710. DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
  711. pc_i440fx_0_14_machine_options);
  712. static void pc_i440fx_0_13_machine_options(MachineClass *m)
  713. {
  714. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  715. static GlobalProperty compat[] = {
  716. PC_CPU_MODEL_IDS("0.13")
  717. { TYPE_PCI_DEVICE, "command_serr_enable", "off" },
  718. { "AC97", "use_broken_id", "1" },
  719. { "virtio-9p-pci", "vectors", "0" },
  720. { "VGA", "rombar", "0" },
  721. { "vmware-svga", "rombar", "0" },
  722. };
  723. pc_i440fx_0_14_machine_options(m);
  724. m->hw_version = "0.13";
  725. compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
  726. pcmc->kvmclock_enabled = false;
  727. }
  728. DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
  729. pc_i440fx_0_13_machine_options);
  730. static void pc_i440fx_0_12_machine_options(MachineClass *m)
  731. {
  732. static GlobalProperty compat[] = {
  733. PC_CPU_MODEL_IDS("0.12")
  734. { "virtio-serial-pci", "max_ports", "1" },
  735. { "virtio-serial-pci", "vectors", "0" },
  736. { "usb-mouse", "serial", "1" },
  737. { "usb-tablet", "serial", "1" },
  738. { "usb-kbd", "serial", "1" },
  739. };
  740. pc_i440fx_0_13_machine_options(m);
  741. m->hw_version = "0.12";
  742. compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
  743. }
  744. DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
  745. pc_i440fx_0_12_machine_options);
  746. typedef struct {
  747. uint16_t gpu_device_id;
  748. uint16_t pch_device_id;
  749. uint8_t pch_revision_id;
  750. } IGDDeviceIDInfo;
  751. /* In real world different GPU should have different PCH. But actually
  752. * the different PCH DIDs likely map to different PCH SKUs. We do the
  753. * same thing for the GPU. For PCH, the different SKUs are going to be
  754. * all the same silicon design and implementation, just different
  755. * features turn on and off with fuses. The SW interfaces should be
  756. * consistent across all SKUs in a given family (eg LPT). But just same
  757. * features may not be supported.
  758. *
  759. * Most of these different PCH features probably don't matter to the
  760. * Gfx driver, but obviously any difference in display port connections
  761. * will so it should be fine with any PCH in case of passthrough.
  762. *
  763. * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
  764. * scenarios, 0x9cc3 for BDW(Broadwell).
  765. */
  766. static const IGDDeviceIDInfo igd_combo_id_infos[] = {
  767. /* HSW Classic */
  768. {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
  769. {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
  770. {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
  771. {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
  772. {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
  773. /* HSW ULT */
  774. {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
  775. {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
  776. {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
  777. {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
  778. {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
  779. {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
  780. /* HSW CRW */
  781. {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
  782. {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
  783. /* HSW Server */
  784. {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
  785. /* HSW SRVR */
  786. {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
  787. /* BSW */
  788. {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
  789. {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
  790. {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
  791. {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
  792. {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
  793. {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
  794. {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
  795. {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
  796. {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
  797. {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
  798. {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
  799. };
  800. static void isa_bridge_class_init(ObjectClass *klass, void *data)
  801. {
  802. DeviceClass *dc = DEVICE_CLASS(klass);
  803. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  804. dc->desc = "ISA bridge faked to support IGD PT";
  805. set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
  806. k->vendor_id = PCI_VENDOR_ID_INTEL;
  807. k->class_id = PCI_CLASS_BRIDGE_ISA;
  808. };
  809. static TypeInfo isa_bridge_info = {
  810. .name = "igd-passthrough-isa-bridge",
  811. .parent = TYPE_PCI_DEVICE,
  812. .instance_size = sizeof(PCIDevice),
  813. .class_init = isa_bridge_class_init,
  814. .interfaces = (InterfaceInfo[]) {
  815. { INTERFACE_CONVENTIONAL_PCI_DEVICE },
  816. { },
  817. },
  818. };
  819. static void pt_graphics_register_types(void)
  820. {
  821. type_register_static(&isa_bridge_info);
  822. }
  823. type_init(pt_graphics_register_types)
  824. void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
  825. {
  826. struct PCIDevice *bridge_dev;
  827. int i, num;
  828. uint16_t pch_dev_id = 0xffff;
  829. uint8_t pch_rev_id;
  830. num = ARRAY_SIZE(igd_combo_id_infos);
  831. for (i = 0; i < num; i++) {
  832. if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
  833. pch_dev_id = igd_combo_id_infos[i].pch_device_id;
  834. pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
  835. }
  836. }
  837. if (pch_dev_id == 0xffff) {
  838. return;
  839. }
  840. /* Currently IGD drivers always need to access PCH by 1f.0. */
  841. bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
  842. "igd-passthrough-isa-bridge");
  843. /*
  844. * Note that vendor id is always PCI_VENDOR_ID_INTEL.
  845. */
  846. if (!bridge_dev) {
  847. fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
  848. return;
  849. }
  850. pci_config_set_device_id(bridge_dev->config, pch_dev_id);
  851. pci_config_set_revision(bridge_dev->config, pch_rev_id);
  852. }
  853. static void isapc_machine_options(MachineClass *m)
  854. {
  855. PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
  856. m->desc = "ISA-only PC";
  857. m->max_cpus = 1;
  858. m->option_rom_has_mr = true;
  859. m->rom_file_has_mr = false;
  860. pcmc->pci_enabled = false;
  861. pcmc->has_acpi_build = false;
  862. pcmc->smbios_defaults = false;
  863. pcmc->gigabyte_align = false;
  864. pcmc->smbios_legacy_mode = true;
  865. pcmc->has_reserved_memory = false;
  866. pcmc->default_nic_model = "ne2k_isa";
  867. m->default_cpu_type = X86_CPU_TYPE_NAME("486");
  868. }
  869. DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
  870. isapc_machine_options);
  871. #ifdef CONFIG_XEN
  872. static void xenfv_machine_options(MachineClass *m)
  873. {
  874. m->desc = "Xen Fully-virtualized PC";
  875. m->max_cpus = HVM_MAX_VCPUS;
  876. m->default_machine_opts = "accel=xen";
  877. }
  878. DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
  879. xenfv_machine_options);
  880. #endif