ssd0323.c 10 KB

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  1. /*
  2. * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
  3. *
  4. * Copyright (c) 2006-2007 CodeSourcery.
  5. * Written by Paul Brook
  6. *
  7. * This code is licensed under the GPL.
  8. */
  9. /* The controller can support a variety of different displays, but we only
  10. implement one. Most of the commends relating to brightness and geometry
  11. setup are ignored. */
  12. #include "qemu/osdep.h"
  13. #include "hw/ssi/ssi.h"
  14. #include "migration/vmstate.h"
  15. #include "qemu/module.h"
  16. #include "ui/console.h"
  17. //#define DEBUG_SSD0323 1
  18. #ifdef DEBUG_SSD0323
  19. #define DPRINTF(fmt, ...) \
  20. do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
  21. #define BADF(fmt, ...) \
  22. do { \
  23. fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); abort(); \
  24. } while (0)
  25. #else
  26. #define DPRINTF(fmt, ...) do {} while(0)
  27. #define BADF(fmt, ...) \
  28. do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
  29. #endif
  30. /* Scaling factor for pixels. */
  31. #define MAGNIFY 4
  32. #define REMAP_SWAP_COLUMN 0x01
  33. #define REMAP_SWAP_NYBBLE 0x02
  34. #define REMAP_VERTICAL 0x04
  35. #define REMAP_SWAP_COM 0x10
  36. #define REMAP_SPLIT_COM 0x40
  37. enum ssd0323_mode
  38. {
  39. SSD0323_CMD,
  40. SSD0323_DATA
  41. };
  42. typedef struct {
  43. SSISlave ssidev;
  44. QemuConsole *con;
  45. uint32_t cmd_len;
  46. int32_t cmd;
  47. int32_t cmd_data[8];
  48. int32_t row;
  49. int32_t row_start;
  50. int32_t row_end;
  51. int32_t col;
  52. int32_t col_start;
  53. int32_t col_end;
  54. int32_t redraw;
  55. int32_t remap;
  56. uint32_t mode;
  57. uint8_t framebuffer[128 * 80 / 2];
  58. } ssd0323_state;
  59. static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
  60. {
  61. ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
  62. switch (s->mode) {
  63. case SSD0323_DATA:
  64. DPRINTF("data 0x%02x\n", data);
  65. s->framebuffer[s->col + s->row * 64] = data;
  66. if (s->remap & REMAP_VERTICAL) {
  67. s->row++;
  68. if (s->row > s->row_end) {
  69. s->row = s->row_start;
  70. s->col++;
  71. }
  72. if (s->col > s->col_end) {
  73. s->col = s->col_start;
  74. }
  75. } else {
  76. s->col++;
  77. if (s->col > s->col_end) {
  78. s->row++;
  79. s->col = s->col_start;
  80. }
  81. if (s->row > s->row_end) {
  82. s->row = s->row_start;
  83. }
  84. }
  85. s->redraw = 1;
  86. break;
  87. case SSD0323_CMD:
  88. DPRINTF("cmd 0x%02x\n", data);
  89. if (s->cmd_len == 0) {
  90. s->cmd = data;
  91. } else {
  92. s->cmd_data[s->cmd_len - 1] = data;
  93. }
  94. s->cmd_len++;
  95. switch (s->cmd) {
  96. #define DATA(x) if (s->cmd_len <= (x)) return 0
  97. case 0x15: /* Set column. */
  98. DATA(2);
  99. s->col = s->col_start = s->cmd_data[0] % 64;
  100. s->col_end = s->cmd_data[1] % 64;
  101. break;
  102. case 0x75: /* Set row. */
  103. DATA(2);
  104. s->row = s->row_start = s->cmd_data[0] % 80;
  105. s->row_end = s->cmd_data[1] % 80;
  106. break;
  107. case 0x81: /* Set contrast */
  108. DATA(1);
  109. break;
  110. case 0x84: case 0x85: case 0x86: /* Max current. */
  111. DATA(0);
  112. break;
  113. case 0xa0: /* Set remapping. */
  114. /* FIXME: Implement this. */
  115. DATA(1);
  116. s->remap = s->cmd_data[0];
  117. break;
  118. case 0xa1: /* Set display start line. */
  119. case 0xa2: /* Set display offset. */
  120. /* FIXME: Implement these. */
  121. DATA(1);
  122. break;
  123. case 0xa4: /* Normal mode. */
  124. case 0xa5: /* All on. */
  125. case 0xa6: /* All off. */
  126. case 0xa7: /* Inverse. */
  127. /* FIXME: Implement these. */
  128. DATA(0);
  129. break;
  130. case 0xa8: /* Set multiplex ratio. */
  131. case 0xad: /* Set DC-DC converter. */
  132. DATA(1);
  133. /* Ignored. Don't care. */
  134. break;
  135. case 0xae: /* Display off. */
  136. case 0xaf: /* Display on. */
  137. DATA(0);
  138. /* TODO: Implement power control. */
  139. break;
  140. case 0xb1: /* Set phase length. */
  141. case 0xb2: /* Set row period. */
  142. case 0xb3: /* Set clock rate. */
  143. case 0xbc: /* Set precharge. */
  144. case 0xbe: /* Set VCOMH. */
  145. case 0xbf: /* Set segment low. */
  146. DATA(1);
  147. /* Ignored. Don't care. */
  148. break;
  149. case 0xb8: /* Set grey scale table. */
  150. /* FIXME: Implement this. */
  151. DATA(8);
  152. break;
  153. case 0xe3: /* NOP. */
  154. DATA(0);
  155. break;
  156. case 0xff: /* Nasty hack because we don't handle chip selects
  157. properly. */
  158. break;
  159. default:
  160. BADF("Unknown command: 0x%x\n", data);
  161. }
  162. s->cmd_len = 0;
  163. return 0;
  164. }
  165. return 0;
  166. }
  167. static void ssd0323_update_display(void *opaque)
  168. {
  169. ssd0323_state *s = (ssd0323_state *)opaque;
  170. DisplaySurface *surface = qemu_console_surface(s->con);
  171. uint8_t *dest;
  172. uint8_t *src;
  173. int x;
  174. int y;
  175. int i;
  176. int line;
  177. char *colors[16];
  178. char colortab[MAGNIFY * 64];
  179. char *p;
  180. int dest_width;
  181. if (!s->redraw)
  182. return;
  183. switch (surface_bits_per_pixel(surface)) {
  184. case 0:
  185. return;
  186. case 15:
  187. dest_width = 2;
  188. break;
  189. case 16:
  190. dest_width = 2;
  191. break;
  192. case 24:
  193. dest_width = 3;
  194. break;
  195. case 32:
  196. dest_width = 4;
  197. break;
  198. default:
  199. BADF("Bad color depth\n");
  200. return;
  201. }
  202. p = colortab;
  203. for (i = 0; i < 16; i++) {
  204. int n;
  205. colors[i] = p;
  206. switch (surface_bits_per_pixel(surface)) {
  207. case 15:
  208. n = i * 2 + (i >> 3);
  209. p[0] = n | (n << 5);
  210. p[1] = (n << 2) | (n >> 3);
  211. break;
  212. case 16:
  213. n = i * 2 + (i >> 3);
  214. p[0] = n | (n << 6) | ((n << 1) & 0x20);
  215. p[1] = (n << 3) | (n >> 2);
  216. break;
  217. case 24:
  218. case 32:
  219. n = (i << 4) | i;
  220. p[0] = p[1] = p[2] = n;
  221. break;
  222. default:
  223. BADF("Bad color depth\n");
  224. return;
  225. }
  226. p += dest_width;
  227. }
  228. /* TODO: Implement row/column remapping. */
  229. dest = surface_data(surface);
  230. for (y = 0; y < 64; y++) {
  231. line = y;
  232. src = s->framebuffer + 64 * line;
  233. for (x = 0; x < 64; x++) {
  234. int val;
  235. val = *src >> 4;
  236. for (i = 0; i < MAGNIFY; i++) {
  237. memcpy(dest, colors[val], dest_width);
  238. dest += dest_width;
  239. }
  240. val = *src & 0xf;
  241. for (i = 0; i < MAGNIFY; i++) {
  242. memcpy(dest, colors[val], dest_width);
  243. dest += dest_width;
  244. }
  245. src++;
  246. }
  247. for (i = 1; i < MAGNIFY; i++) {
  248. memcpy(dest, dest - dest_width * MAGNIFY * 128,
  249. dest_width * 128 * MAGNIFY);
  250. dest += dest_width * 128 * MAGNIFY;
  251. }
  252. }
  253. s->redraw = 0;
  254. dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
  255. }
  256. static void ssd0323_invalidate_display(void * opaque)
  257. {
  258. ssd0323_state *s = (ssd0323_state *)opaque;
  259. s->redraw = 1;
  260. }
  261. /* Command/data input. */
  262. static void ssd0323_cd(void *opaque, int n, int level)
  263. {
  264. ssd0323_state *s = (ssd0323_state *)opaque;
  265. DPRINTF("%s mode\n", level ? "Data" : "Command");
  266. s->mode = level ? SSD0323_DATA : SSD0323_CMD;
  267. }
  268. static int ssd0323_post_load(void *opaque, int version_id)
  269. {
  270. ssd0323_state *s = (ssd0323_state *)opaque;
  271. if (s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
  272. return -EINVAL;
  273. }
  274. if (s->row < 0 || s->row >= 80) {
  275. return -EINVAL;
  276. }
  277. if (s->row_start < 0 || s->row_start >= 80) {
  278. return -EINVAL;
  279. }
  280. if (s->row_end < 0 || s->row_end >= 80) {
  281. return -EINVAL;
  282. }
  283. if (s->col < 0 || s->col >= 64) {
  284. return -EINVAL;
  285. }
  286. if (s->col_start < 0 || s->col_start >= 64) {
  287. return -EINVAL;
  288. }
  289. if (s->col_end < 0 || s->col_end >= 64) {
  290. return -EINVAL;
  291. }
  292. if (s->mode != SSD0323_CMD && s->mode != SSD0323_DATA) {
  293. return -EINVAL;
  294. }
  295. return 0;
  296. }
  297. static const VMStateDescription vmstate_ssd0323 = {
  298. .name = "ssd0323_oled",
  299. .version_id = 2,
  300. .minimum_version_id = 2,
  301. .post_load = ssd0323_post_load,
  302. .fields = (VMStateField []) {
  303. VMSTATE_UINT32(cmd_len, ssd0323_state),
  304. VMSTATE_INT32(cmd, ssd0323_state),
  305. VMSTATE_INT32_ARRAY(cmd_data, ssd0323_state, 8),
  306. VMSTATE_INT32(row, ssd0323_state),
  307. VMSTATE_INT32(row_start, ssd0323_state),
  308. VMSTATE_INT32(row_end, ssd0323_state),
  309. VMSTATE_INT32(col, ssd0323_state),
  310. VMSTATE_INT32(col_start, ssd0323_state),
  311. VMSTATE_INT32(col_end, ssd0323_state),
  312. VMSTATE_INT32(redraw, ssd0323_state),
  313. VMSTATE_INT32(remap, ssd0323_state),
  314. VMSTATE_UINT32(mode, ssd0323_state),
  315. VMSTATE_BUFFER(framebuffer, ssd0323_state),
  316. VMSTATE_SSI_SLAVE(ssidev, ssd0323_state),
  317. VMSTATE_END_OF_LIST()
  318. }
  319. };
  320. static const GraphicHwOps ssd0323_ops = {
  321. .invalidate = ssd0323_invalidate_display,
  322. .gfx_update = ssd0323_update_display,
  323. };
  324. static void ssd0323_realize(SSISlave *d, Error **errp)
  325. {
  326. DeviceState *dev = DEVICE(d);
  327. ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, d);
  328. s->col_end = 63;
  329. s->row_end = 79;
  330. s->con = graphic_console_init(dev, 0, &ssd0323_ops, s);
  331. qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY);
  332. qdev_init_gpio_in(dev, ssd0323_cd, 1);
  333. }
  334. static void ssd0323_class_init(ObjectClass *klass, void *data)
  335. {
  336. DeviceClass *dc = DEVICE_CLASS(klass);
  337. SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
  338. k->realize = ssd0323_realize;
  339. k->transfer = ssd0323_transfer;
  340. k->cs_polarity = SSI_CS_HIGH;
  341. dc->vmsd = &vmstate_ssd0323;
  342. }
  343. static const TypeInfo ssd0323_info = {
  344. .name = "ssd0323",
  345. .parent = TYPE_SSI_SLAVE,
  346. .instance_size = sizeof(ssd0323_state),
  347. .class_init = ssd0323_class_init,
  348. };
  349. static void ssd03232_register_types(void)
  350. {
  351. type_register_static(&ssd0323_info);
  352. }
  353. type_init(ssd03232_register_types)