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cpu.c 20 KB

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  1. #include "qemu/osdep.h"
  2. #include "hw/boards.h"
  3. #include "migration/vmstate.h"
  4. #include "hw/acpi/cpu.h"
  5. #include "qapi/error.h"
  6. #include "qapi/qapi-events-misc.h"
  7. #include "trace.h"
  8. #include "sysemu/numa.h"
  9. #define ACPI_CPU_HOTPLUG_REG_LEN 12
  10. #define ACPI_CPU_SELECTOR_OFFSET_WR 0
  11. #define ACPI_CPU_FLAGS_OFFSET_RW 4
  12. #define ACPI_CPU_CMD_OFFSET_WR 5
  13. #define ACPI_CPU_CMD_DATA_OFFSET_RW 8
  14. enum {
  15. CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
  16. CPHP_OST_EVENT_CMD = 1,
  17. CPHP_OST_STATUS_CMD = 2,
  18. CPHP_CMD_MAX
  19. };
  20. static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
  21. {
  22. ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
  23. info->slot_type = ACPI_SLOT_TYPE_CPU;
  24. info->slot = g_strdup_printf("%d", idx);
  25. info->source = cdev->ost_event;
  26. info->status = cdev->ost_status;
  27. if (cdev->cpu) {
  28. DeviceState *dev = DEVICE(cdev->cpu);
  29. if (dev->id) {
  30. info->device = g_strdup(dev->id);
  31. info->has_device = true;
  32. }
  33. }
  34. return info;
  35. }
  36. void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
  37. {
  38. int i;
  39. for (i = 0; i < cpu_st->dev_count; i++) {
  40. ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1);
  41. elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]);
  42. elem->next = NULL;
  43. **list = elem;
  44. *list = &elem->next;
  45. }
  46. }
  47. static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
  48. {
  49. uint64_t val = 0;
  50. CPUHotplugState *cpu_st = opaque;
  51. AcpiCpuStatus *cdev;
  52. if (cpu_st->selector >= cpu_st->dev_count) {
  53. return val;
  54. }
  55. cdev = &cpu_st->devs[cpu_st->selector];
  56. switch (addr) {
  57. case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
  58. val |= cdev->cpu ? 1 : 0;
  59. val |= cdev->is_inserting ? 2 : 0;
  60. val |= cdev->is_removing ? 4 : 0;
  61. trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
  62. break;
  63. case ACPI_CPU_CMD_DATA_OFFSET_RW:
  64. switch (cpu_st->command) {
  65. case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
  66. val = cpu_st->selector;
  67. break;
  68. default:
  69. break;
  70. }
  71. trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
  72. break;
  73. default:
  74. break;
  75. }
  76. return val;
  77. }
  78. static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
  79. unsigned int size)
  80. {
  81. CPUHotplugState *cpu_st = opaque;
  82. AcpiCpuStatus *cdev;
  83. ACPIOSTInfo *info;
  84. assert(cpu_st->dev_count);
  85. if (addr) {
  86. if (cpu_st->selector >= cpu_st->dev_count) {
  87. trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
  88. return;
  89. }
  90. }
  91. switch (addr) {
  92. case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
  93. cpu_st->selector = data;
  94. trace_cpuhp_acpi_write_idx(cpu_st->selector);
  95. break;
  96. case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
  97. cdev = &cpu_st->devs[cpu_st->selector];
  98. if (data & 2) { /* clear insert event */
  99. cdev->is_inserting = false;
  100. trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
  101. } else if (data & 4) { /* clear remove event */
  102. cdev->is_removing = false;
  103. trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
  104. } else if (data & 8) {
  105. DeviceState *dev = NULL;
  106. HotplugHandler *hotplug_ctrl = NULL;
  107. if (!cdev->cpu || cdev->cpu == first_cpu) {
  108. trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
  109. break;
  110. }
  111. trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
  112. dev = DEVICE(cdev->cpu);
  113. hotplug_ctrl = qdev_get_hotplug_handler(dev);
  114. hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
  115. object_unparent(OBJECT(dev));
  116. }
  117. break;
  118. case ACPI_CPU_CMD_OFFSET_WR:
  119. trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
  120. if (data < CPHP_CMD_MAX) {
  121. cpu_st->command = data;
  122. if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
  123. uint32_t iter = cpu_st->selector;
  124. do {
  125. cdev = &cpu_st->devs[iter];
  126. if (cdev->is_inserting || cdev->is_removing) {
  127. cpu_st->selector = iter;
  128. trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
  129. cdev->is_inserting, cdev->is_removing);
  130. break;
  131. }
  132. iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
  133. } while (iter != cpu_st->selector);
  134. }
  135. }
  136. break;
  137. case ACPI_CPU_CMD_DATA_OFFSET_RW:
  138. switch (cpu_st->command) {
  139. case CPHP_OST_EVENT_CMD: {
  140. cdev = &cpu_st->devs[cpu_st->selector];
  141. cdev->ost_event = data;
  142. trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
  143. break;
  144. }
  145. case CPHP_OST_STATUS_CMD: {
  146. cdev = &cpu_st->devs[cpu_st->selector];
  147. cdev->ost_status = data;
  148. info = acpi_cpu_device_status(cpu_st->selector, cdev);
  149. qapi_event_send_acpi_device_ost(info);
  150. qapi_free_ACPIOSTInfo(info);
  151. trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
  152. cdev->ost_status);
  153. break;
  154. }
  155. default:
  156. break;
  157. }
  158. break;
  159. default:
  160. break;
  161. }
  162. }
  163. static const MemoryRegionOps cpu_hotplug_ops = {
  164. .read = cpu_hotplug_rd,
  165. .write = cpu_hotplug_wr,
  166. .endianness = DEVICE_LITTLE_ENDIAN,
  167. .valid = {
  168. .min_access_size = 1,
  169. .max_access_size = 4,
  170. },
  171. };
  172. void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
  173. CPUHotplugState *state, hwaddr base_addr)
  174. {
  175. MachineState *machine = MACHINE(qdev_get_machine());
  176. MachineClass *mc = MACHINE_GET_CLASS(machine);
  177. const CPUArchIdList *id_list;
  178. int i;
  179. assert(mc->possible_cpu_arch_ids);
  180. id_list = mc->possible_cpu_arch_ids(machine);
  181. state->dev_count = id_list->len;
  182. state->devs = g_new0(typeof(*state->devs), state->dev_count);
  183. for (i = 0; i < id_list->len; i++) {
  184. state->devs[i].cpu = CPU(id_list->cpus[i].cpu);
  185. state->devs[i].arch_id = id_list->cpus[i].arch_id;
  186. }
  187. memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
  188. "acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
  189. memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
  190. }
  191. static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
  192. {
  193. CPUClass *k = CPU_GET_CLASS(dev);
  194. uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
  195. int i;
  196. for (i = 0; i < cpu_st->dev_count; i++) {
  197. if (cpu_arch_id == cpu_st->devs[i].arch_id) {
  198. return &cpu_st->devs[i];
  199. }
  200. }
  201. return NULL;
  202. }
  203. void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
  204. CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
  205. {
  206. AcpiCpuStatus *cdev;
  207. cdev = get_cpu_status(cpu_st, dev);
  208. if (!cdev) {
  209. return;
  210. }
  211. cdev->cpu = CPU(dev);
  212. if (dev->hotplugged) {
  213. cdev->is_inserting = true;
  214. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  215. }
  216. }
  217. void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
  218. CPUHotplugState *cpu_st,
  219. DeviceState *dev, Error **errp)
  220. {
  221. AcpiCpuStatus *cdev;
  222. cdev = get_cpu_status(cpu_st, dev);
  223. if (!cdev) {
  224. return;
  225. }
  226. cdev->is_removing = true;
  227. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  228. }
  229. void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
  230. DeviceState *dev, Error **errp)
  231. {
  232. AcpiCpuStatus *cdev;
  233. cdev = get_cpu_status(cpu_st, dev);
  234. if (!cdev) {
  235. return;
  236. }
  237. cdev->cpu = NULL;
  238. }
  239. static const VMStateDescription vmstate_cpuhp_sts = {
  240. .name = "CPU hotplug device state",
  241. .version_id = 1,
  242. .minimum_version_id = 1,
  243. .minimum_version_id_old = 1,
  244. .fields = (VMStateField[]) {
  245. VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
  246. VMSTATE_BOOL(is_removing, AcpiCpuStatus),
  247. VMSTATE_UINT32(ost_event, AcpiCpuStatus),
  248. VMSTATE_UINT32(ost_status, AcpiCpuStatus),
  249. VMSTATE_END_OF_LIST()
  250. }
  251. };
  252. const VMStateDescription vmstate_cpu_hotplug = {
  253. .name = "CPU hotplug state",
  254. .version_id = 1,
  255. .minimum_version_id = 1,
  256. .minimum_version_id_old = 1,
  257. .fields = (VMStateField[]) {
  258. VMSTATE_UINT32(selector, CPUHotplugState),
  259. VMSTATE_UINT8(command, CPUHotplugState),
  260. VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
  261. vmstate_cpuhp_sts, AcpiCpuStatus),
  262. VMSTATE_END_OF_LIST()
  263. }
  264. };
  265. #define CPU_NAME_FMT "C%.03X"
  266. #define CPUHP_RES_DEVICE "PRES"
  267. #define CPU_LOCK "CPLK"
  268. #define CPU_STS_METHOD "CSTA"
  269. #define CPU_SCAN_METHOD "CSCN"
  270. #define CPU_NOTIFY_METHOD "CTFY"
  271. #define CPU_EJECT_METHOD "CEJ0"
  272. #define CPU_OST_METHOD "COST"
  273. #define CPU_ENABLED "CPEN"
  274. #define CPU_SELECTOR "CSEL"
  275. #define CPU_COMMAND "CCMD"
  276. #define CPU_DATA "CDAT"
  277. #define CPU_INSERT_EVENT "CINS"
  278. #define CPU_REMOVE_EVENT "CRMV"
  279. #define CPU_EJECT_EVENT "CEJ0"
  280. void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
  281. hwaddr io_base,
  282. const char *res_root,
  283. const char *event_handler_method)
  284. {
  285. Aml *ifctx;
  286. Aml *field;
  287. Aml *method;
  288. Aml *cpu_ctrl_dev;
  289. Aml *cpus_dev;
  290. Aml *zero = aml_int(0);
  291. Aml *one = aml_int(1);
  292. Aml *sb_scope = aml_scope("_SB");
  293. MachineClass *mc = MACHINE_GET_CLASS(machine);
  294. const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
  295. char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
  296. Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
  297. AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
  298. AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);
  299. cpu_ctrl_dev = aml_device("%s", cphp_res_path);
  300. {
  301. Aml *crs;
  302. aml_append(cpu_ctrl_dev,
  303. aml_name_decl("_HID", aml_eisaid("PNP0A06")));
  304. aml_append(cpu_ctrl_dev,
  305. aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
  306. aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
  307. crs = aml_resource_template();
  308. aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
  309. ACPI_CPU_HOTPLUG_REG_LEN));
  310. aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
  311. /* declare CPU hotplug MMIO region with related access fields */
  312. aml_append(cpu_ctrl_dev,
  313. aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
  314. ACPI_CPU_HOTPLUG_REG_LEN));
  315. field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
  316. AML_WRITE_AS_ZEROS);
  317. aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
  318. /* 1 if enabled, read only */
  319. aml_append(field, aml_named_field(CPU_ENABLED, 1));
  320. /* (read) 1 if has a insert event. (write) 1 to clear event */
  321. aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
  322. /* (read) 1 if has a remove event. (write) 1 to clear event */
  323. aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
  324. /* initiates device eject, write only */
  325. aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
  326. aml_append(field, aml_reserved_field(4));
  327. aml_append(field, aml_named_field(CPU_COMMAND, 8));
  328. aml_append(cpu_ctrl_dev, field);
  329. field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
  330. /* CPU selector, write only */
  331. aml_append(field, aml_named_field(CPU_SELECTOR, 32));
  332. /* flags + cmd + 2byte align */
  333. aml_append(field, aml_reserved_field(4 * 8));
  334. aml_append(field, aml_named_field(CPU_DATA, 32));
  335. aml_append(cpu_ctrl_dev, field);
  336. if (opts.has_legacy_cphp) {
  337. method = aml_method("_INI", 0, AML_SERIALIZED);
  338. /* switch off legacy CPU hotplug HW and use new one,
  339. * on reboot system is in new mode and writing 0
  340. * in CPU_SELECTOR selects BSP, which is NOP at
  341. * the time _INI is called */
  342. aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR)));
  343. aml_append(cpu_ctrl_dev, method);
  344. }
  345. }
  346. aml_append(sb_scope, cpu_ctrl_dev);
  347. cpus_dev = aml_device("\\_SB.CPUS");
  348. {
  349. int i;
  350. Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
  351. Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
  352. Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
  353. Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
  354. Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
  355. Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
  356. Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
  357. Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);
  358. aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
  359. aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
  360. method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
  361. for (i = 0; i < arch_ids->len; i++) {
  362. Aml *cpu = aml_name(CPU_NAME_FMT, i);
  363. Aml *uid = aml_arg(0);
  364. Aml *event = aml_arg(1);
  365. ifctx = aml_if(aml_equal(uid, aml_int(i)));
  366. {
  367. aml_append(ifctx, aml_notify(cpu, event));
  368. }
  369. aml_append(method, ifctx);
  370. }
  371. aml_append(cpus_dev, method);
  372. method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
  373. {
  374. Aml *idx = aml_arg(0);
  375. Aml *sta = aml_local(0);
  376. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  377. aml_append(method, aml_store(idx, cpu_selector));
  378. aml_append(method, aml_store(zero, sta));
  379. ifctx = aml_if(aml_equal(is_enabled, one));
  380. {
  381. aml_append(ifctx, aml_store(aml_int(0xF), sta));
  382. }
  383. aml_append(method, ifctx);
  384. aml_append(method, aml_release(ctrl_lock));
  385. aml_append(method, aml_return(sta));
  386. }
  387. aml_append(cpus_dev, method);
  388. method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
  389. {
  390. Aml *idx = aml_arg(0);
  391. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  392. aml_append(method, aml_store(idx, cpu_selector));
  393. aml_append(method, aml_store(one, ej_evt));
  394. aml_append(method, aml_release(ctrl_lock));
  395. }
  396. aml_append(cpus_dev, method);
  397. method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
  398. {
  399. Aml *else_ctx;
  400. Aml *while_ctx;
  401. Aml *has_event = aml_local(0);
  402. Aml *dev_chk = aml_int(1);
  403. Aml *eject_req = aml_int(3);
  404. Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
  405. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  406. aml_append(method, aml_store(one, has_event));
  407. while_ctx = aml_while(aml_equal(has_event, one));
  408. {
  409. /* clear loop exit condition, ins_evt/rm_evt checks
  410. * will set it to 1 while next_cpu_cmd returns a CPU
  411. * with events */
  412. aml_append(while_ctx, aml_store(zero, has_event));
  413. aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
  414. ifctx = aml_if(aml_equal(ins_evt, one));
  415. {
  416. aml_append(ifctx,
  417. aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk));
  418. aml_append(ifctx, aml_store(one, ins_evt));
  419. aml_append(ifctx, aml_store(one, has_event));
  420. }
  421. aml_append(while_ctx, ifctx);
  422. else_ctx = aml_else();
  423. ifctx = aml_if(aml_equal(rm_evt, one));
  424. {
  425. aml_append(ifctx,
  426. aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req));
  427. aml_append(ifctx, aml_store(one, rm_evt));
  428. aml_append(ifctx, aml_store(one, has_event));
  429. }
  430. aml_append(else_ctx, ifctx);
  431. aml_append(while_ctx, else_ctx);
  432. }
  433. aml_append(method, while_ctx);
  434. aml_append(method, aml_release(ctrl_lock));
  435. }
  436. aml_append(cpus_dev, method);
  437. method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
  438. {
  439. Aml *uid = aml_arg(0);
  440. Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
  441. Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
  442. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  443. aml_append(method, aml_store(uid, cpu_selector));
  444. aml_append(method, aml_store(ev_cmd, cpu_cmd));
  445. aml_append(method, aml_store(aml_arg(1), cpu_data));
  446. aml_append(method, aml_store(st_cmd, cpu_cmd));
  447. aml_append(method, aml_store(aml_arg(2), cpu_data));
  448. aml_append(method, aml_release(ctrl_lock));
  449. }
  450. aml_append(cpus_dev, method);
  451. /* build Processor object for each processor */
  452. for (i = 0; i < arch_ids->len; i++) {
  453. Aml *dev;
  454. Aml *uid = aml_int(i);
  455. GArray *madt_buf = g_array_new(0, 1, 1);
  456. int arch_id = arch_ids->cpus[i].arch_id;
  457. if (opts.acpi_1_compatible && arch_id < 255) {
  458. dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
  459. } else {
  460. dev = aml_device(CPU_NAME_FMT, i);
  461. aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
  462. aml_append(dev, aml_name_decl("_UID", uid));
  463. }
  464. method = aml_method("_STA", 0, AML_SERIALIZED);
  465. aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
  466. aml_append(dev, method);
  467. /* build _MAT object */
  468. assert(adevc && adevc->madt_cpu);
  469. adevc->madt_cpu(adev, i, arch_ids, madt_buf);
  470. switch (madt_buf->data[0]) {
  471. case ACPI_APIC_PROCESSOR: {
  472. AcpiMadtProcessorApic *apic = (void *)madt_buf->data;
  473. apic->flags = cpu_to_le32(1);
  474. break;
  475. }
  476. case ACPI_APIC_LOCAL_X2APIC: {
  477. AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data;
  478. apic->flags = cpu_to_le32(1);
  479. break;
  480. }
  481. default:
  482. assert(0);
  483. }
  484. aml_append(dev, aml_name_decl("_MAT",
  485. aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
  486. g_array_free(madt_buf, true);
  487. if (CPU(arch_ids->cpus[i].cpu) != first_cpu) {
  488. method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
  489. aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
  490. aml_append(dev, method);
  491. }
  492. method = aml_method("_OST", 3, AML_SERIALIZED);
  493. aml_append(method,
  494. aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
  495. aml_arg(1), aml_arg(2))
  496. );
  497. aml_append(dev, method);
  498. /* Linux guests discard SRAT info for non-present CPUs
  499. * as a result _PXM is required for all CPUs which might
  500. * be hot-plugged. For simplicity, add it for all CPUs.
  501. */
  502. if (arch_ids->cpus[i].props.has_node_id) {
  503. aml_append(dev, aml_name_decl("_PXM",
  504. aml_int(arch_ids->cpus[i].props.node_id)));
  505. }
  506. aml_append(cpus_dev, dev);
  507. }
  508. }
  509. aml_append(sb_scope, cpus_dev);
  510. aml_append(table, sb_scope);
  511. method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
  512. aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
  513. aml_append(table, method);
  514. g_free(cphp_res_path);
  515. }