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arm-cpu-features.rst 15 KB

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  1. ================
  2. ARM CPU Features
  3. ================
  4. Examples of probing and using ARM CPU features
  5. Introduction
  6. ============
  7. CPU features are optional features that a CPU of supporting type may
  8. choose to implement or not. In QEMU, optional CPU features have
  9. corresponding boolean CPU proprieties that, when enabled, indicate
  10. that the feature is implemented, and, conversely, when disabled,
  11. indicate that it is not implemented. An example of an ARM CPU feature
  12. is the Performance Monitoring Unit (PMU). CPU types such as the
  13. Cortex-A15 and the Cortex-A57, which respectively implement ARM
  14. architecture reference manuals ARMv7-A and ARMv8-A, may both optionally
  15. implement PMUs. For example, if a user wants to use a Cortex-A15 without
  16. a PMU, then the `-cpu` parameter should contain `pmu=off` on the QEMU
  17. command line, i.e. `-cpu cortex-a15,pmu=off`.
  18. As not all CPU types support all optional CPU features, then whether or
  19. not a CPU property exists depends on the CPU type. For example, CPUs
  20. that implement the ARMv8-A architecture reference manual may optionally
  21. support the AArch32 CPU feature, which may be enabled by disabling the
  22. `aarch64` CPU property. A CPU type such as the Cortex-A15, which does
  23. not implement ARMv8-A, will not have the `aarch64` CPU property.
  24. QEMU's support may be limited for some CPU features, only partially
  25. supporting the feature or only supporting the feature under certain
  26. configurations. For example, the `aarch64` CPU feature, which, when
  27. disabled, enables the optional AArch32 CPU feature, is only supported
  28. when using the KVM accelerator and when running on a host CPU type that
  29. supports the feature.
  30. CPU Feature Probing
  31. ===================
  32. Determining which CPU features are available and functional for a given
  33. CPU type is possible with the `query-cpu-model-expansion` QMP command.
  34. Below are some examples where `scripts/qmp/qmp-shell` (see the top comment
  35. block in the script for usage) is used to issue the QMP commands.
  36. (1) Determine which CPU features are available for the `max` CPU type
  37. (Note, we started QEMU with qemu-system-aarch64, so `max` is
  38. implementing the ARMv8-A reference manual in this case)::
  39. (QEMU) query-cpu-model-expansion type=full model={"name":"max"}
  40. { "return": {
  41. "model": { "name": "max", "props": {
  42. "sve1664": true, "pmu": true, "sve1792": true, "sve1920": true,
  43. "sve128": true, "aarch64": true, "sve1024": true, "sve": true,
  44. "sve640": true, "sve768": true, "sve1408": true, "sve256": true,
  45. "sve1152": true, "sve512": true, "sve384": true, "sve1536": true,
  46. "sve896": true, "sve1280": true, "sve2048": true
  47. }}}}
  48. We see that the `max` CPU type has the `pmu`, `aarch64`, `sve`, and many
  49. `sve<N>` CPU features. We also see that all the CPU features are
  50. enabled, as they are all `true`. (The `sve<N>` CPU features are all
  51. optional SVE vector lengths (see "SVE CPU Properties"). While with TCG
  52. all SVE vector lengths can be supported, when KVM is in use it's more
  53. likely that only a few lengths will be supported, if SVE is supported at
  54. all.)
  55. (2) Let's try to disable the PMU::
  56. (QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"pmu":false}}
  57. { "return": {
  58. "model": { "name": "max", "props": {
  59. "sve1664": true, "pmu": false, "sve1792": true, "sve1920": true,
  60. "sve128": true, "aarch64": true, "sve1024": true, "sve": true,
  61. "sve640": true, "sve768": true, "sve1408": true, "sve256": true,
  62. "sve1152": true, "sve512": true, "sve384": true, "sve1536": true,
  63. "sve896": true, "sve1280": true, "sve2048": true
  64. }}}}
  65. We see it worked, as `pmu` is now `false`.
  66. (3) Let's try to disable `aarch64`, which enables the AArch32 CPU feature::
  67. (QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"aarch64":false}}
  68. {"error": {
  69. "class": "GenericError", "desc":
  70. "'aarch64' feature cannot be disabled unless KVM is enabled and 32-bit EL1 is supported"
  71. }}
  72. It looks like this feature is limited to a configuration we do not
  73. currently have.
  74. (4) Let's disable `sve` and see what happens to all the optional SVE
  75. vector lengths::
  76. (QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"sve":false}}
  77. { "return": {
  78. "model": { "name": "max", "props": {
  79. "sve1664": false, "pmu": true, "sve1792": false, "sve1920": false,
  80. "sve128": false, "aarch64": true, "sve1024": false, "sve": false,
  81. "sve640": false, "sve768": false, "sve1408": false, "sve256": false,
  82. "sve1152": false, "sve512": false, "sve384": false, "sve1536": false,
  83. "sve896": false, "sve1280": false, "sve2048": false
  84. }}}}
  85. As expected they are now all `false`.
  86. (5) Let's try probing CPU features for the Cortex-A15 CPU type::
  87. (QEMU) query-cpu-model-expansion type=full model={"name":"cortex-a15"}
  88. {"return": {"model": {"name": "cortex-a15", "props": {"pmu": true}}}}
  89. Only the `pmu` CPU feature is available.
  90. A note about CPU feature dependencies
  91. -------------------------------------
  92. It's possible for features to have dependencies on other features. I.e.
  93. it may be possible to change one feature at a time without error, but
  94. when attempting to change all features at once an error could occur
  95. depending on the order they are processed. It's also possible changing
  96. all at once doesn't generate an error, because a feature's dependencies
  97. are satisfied with other features, but the same feature cannot be changed
  98. independently without error. For these reasons callers should always
  99. attempt to make their desired changes all at once in order to ensure the
  100. collection is valid.
  101. A note about CPU models and KVM
  102. -------------------------------
  103. Named CPU models generally do not work with KVM. There are a few cases
  104. that do work, e.g. using the named CPU model `cortex-a57` with KVM on a
  105. seattle host, but mostly if KVM is enabled the `host` CPU type must be
  106. used. This means the guest is provided all the same CPU features as the
  107. host CPU type has. And, for this reason, the `host` CPU type should
  108. enable all CPU features that the host has by default. Indeed it's even
  109. a bit strange to allow disabling CPU features that the host has when using
  110. the `host` CPU type, but in the absence of CPU models it's the best we can
  111. do if we want to launch guests without all the host's CPU features enabled.
  112. Enabling KVM also affects the `query-cpu-model-expansion` QMP command. The
  113. affect is not only limited to specific features, as pointed out in example
  114. (3) of "CPU Feature Probing", but also to which CPU types may be expanded.
  115. When KVM is enabled, only the `max`, `host`, and current CPU type may be
  116. expanded. This restriction is necessary as it's not possible to know all
  117. CPU types that may work with KVM, but it does impose a small risk of users
  118. experiencing unexpected errors. For example on a seattle, as mentioned
  119. above, the `cortex-a57` CPU type is also valid when KVM is enabled.
  120. Therefore a user could use the `host` CPU type for the current type, but
  121. then attempt to query `cortex-a57`, however that query will fail with our
  122. restrictions. This shouldn't be an issue though as management layers and
  123. users have been preferring the `host` CPU type for use with KVM for quite
  124. some time. Additionally, if the KVM-enabled QEMU instance running on a
  125. seattle host is using the `cortex-a57` CPU type, then querying `cortex-a57`
  126. will work.
  127. Using CPU Features
  128. ==================
  129. After determining which CPU features are available and supported for a
  130. given CPU type, then they may be selectively enabled or disabled on the
  131. QEMU command line with that CPU type::
  132. $ qemu-system-aarch64 -M virt -cpu max,pmu=off,sve=on,sve128=on,sve256=on
  133. The example above disables the PMU and enables the first two SVE vector
  134. lengths for the `max` CPU type. Note, the `sve=on` isn't actually
  135. necessary, because, as we observed above with our probe of the `max` CPU
  136. type, `sve` is already on by default. Also, based on our probe of
  137. defaults, it would seem we need to disable many SVE vector lengths, rather
  138. than only enabling the two we want. This isn't the case, because, as
  139. disabling many SVE vector lengths would be quite verbose, the `sve<N>` CPU
  140. properties have special semantics (see "SVE CPU Property Parsing
  141. Semantics").
  142. SVE CPU Properties
  143. ==================
  144. There are two types of SVE CPU properties: `sve` and `sve<N>`. The first
  145. is used to enable or disable the entire SVE feature, just as the `pmu`
  146. CPU property completely enables or disables the PMU. The second type
  147. is used to enable or disable specific vector lengths, where `N` is the
  148. number of bits of the length. The `sve<N>` CPU properties have special
  149. dependencies and constraints, see "SVE CPU Property Dependencies and
  150. Constraints" below. Additionally, as we want all supported vector lengths
  151. to be enabled by default, then, in order to avoid overly verbose command
  152. lines (command lines full of `sve<N>=off`, for all `N` not wanted), we
  153. provide the parsing semantics listed in "SVE CPU Property Parsing
  154. Semantics".
  155. SVE CPU Property Dependencies and Constraints
  156. ---------------------------------------------
  157. 1) At least one vector length must be enabled when `sve` is enabled.
  158. 2) If a vector length `N` is enabled, then, when KVM is enabled, all
  159. smaller, host supported vector lengths must also be enabled. If
  160. KVM is not enabled, then only all the smaller, power-of-two vector
  161. lengths must be enabled. E.g. with KVM if the host supports all
  162. vector lengths up to 512-bits (128, 256, 384, 512), then if `sve512`
  163. is enabled, the 128-bit vector length, 256-bit vector length, and
  164. 384-bit vector length must also be enabled. Without KVM, the 384-bit
  165. vector length would not be required.
  166. 3) If KVM is enabled then only vector lengths that the host CPU type
  167. support may be enabled. If SVE is not supported by the host, then
  168. no `sve*` properties may be enabled.
  169. SVE CPU Property Parsing Semantics
  170. ----------------------------------
  171. 1) If SVE is disabled (`sve=off`), then which SVE vector lengths
  172. are enabled or disabled is irrelevant to the guest, as the entire
  173. SVE feature is disabled and that disables all vector lengths for
  174. the guest. However QEMU will still track any `sve<N>` CPU
  175. properties provided by the user. If later an `sve=on` is provided,
  176. then the guest will get only the enabled lengths. If no `sve=on`
  177. is provided and there are explicitly enabled vector lengths, then
  178. an error is generated.
  179. 2) If SVE is enabled (`sve=on`), but no `sve<N>` CPU properties are
  180. provided, then all supported vector lengths are enabled, which when
  181. KVM is not in use means including the non-power-of-two lengths, and,
  182. when KVM is in use, it means all vector lengths supported by the host
  183. processor.
  184. 3) If SVE is enabled, then an error is generated when attempting to
  185. disable the last enabled vector length (see constraint (1) of "SVE
  186. CPU Property Dependencies and Constraints").
  187. 4) If one or more vector lengths have been explicitly enabled and at
  188. at least one of the dependency lengths of the maximum enabled length
  189. has been explicitly disabled, then an error is generated (see
  190. constraint (2) of "SVE CPU Property Dependencies and Constraints").
  191. 5) When KVM is enabled, if the host does not support SVE, then an error
  192. is generated when attempting to enable any `sve*` properties (see
  193. constraint (3) of "SVE CPU Property Dependencies and Constraints").
  194. 6) When KVM is enabled, if the host does support SVE, then an error is
  195. generated when attempting to enable any vector lengths not supported
  196. by the host (see constraint (3) of "SVE CPU Property Dependencies and
  197. Constraints").
  198. 7) If one or more `sve<N>` CPU properties are set `off`, but no `sve<N>`,
  199. CPU properties are set `on`, then the specified vector lengths are
  200. disabled but the default for any unspecified lengths remains enabled.
  201. When KVM is not enabled, disabling a power-of-two vector length also
  202. disables all vector lengths larger than the power-of-two length.
  203. When KVM is enabled, then disabling any supported vector length also
  204. disables all larger vector lengths (see constraint (2) of "SVE CPU
  205. Property Dependencies and Constraints").
  206. 8) If one or more `sve<N>` CPU properties are set to `on`, then they
  207. are enabled and all unspecified lengths default to disabled, except
  208. for the required lengths per constraint (2) of "SVE CPU Property
  209. Dependencies and Constraints", which will even be auto-enabled if
  210. they were not explicitly enabled.
  211. 9) If SVE was disabled (`sve=off`), allowing all vector lengths to be
  212. explicitly disabled (i.e. avoiding the error specified in (3) of
  213. "SVE CPU Property Parsing Semantics"), then if later an `sve=on` is
  214. provided an error will be generated. To avoid this error, one must
  215. enable at least one vector length prior to enabling SVE.
  216. SVE CPU Property Examples
  217. -------------------------
  218. 1) Disable SVE::
  219. $ qemu-system-aarch64 -M virt -cpu max,sve=off
  220. 2) Implicitly enable all vector lengths for the `max` CPU type::
  221. $ qemu-system-aarch64 -M virt -cpu max
  222. 3) When KVM is enabled, implicitly enable all host CPU supported vector
  223. lengths with the `host` CPU type::
  224. $ qemu-system-aarch64 -M virt,accel=kvm -cpu host
  225. 4) Only enable the 128-bit vector length::
  226. $ qemu-system-aarch64 -M virt -cpu max,sve128=on
  227. 5) Disable the 512-bit vector length and all larger vector lengths,
  228. since 512 is a power-of-two. This results in all the smaller,
  229. uninitialized lengths (128, 256, and 384) defaulting to enabled::
  230. $ qemu-system-aarch64 -M virt -cpu max,sve512=off
  231. 6) Enable the 128-bit, 256-bit, and 512-bit vector lengths::
  232. $ qemu-system-aarch64 -M virt -cpu max,sve128=on,sve256=on,sve512=on
  233. 7) The same as (6), but since the 128-bit and 256-bit vector
  234. lengths are required for the 512-bit vector length to be enabled,
  235. then allow them to be auto-enabled::
  236. $ qemu-system-aarch64 -M virt -cpu max,sve512=on
  237. 8) Do the same as (7), but by first disabling SVE and then re-enabling it::
  238. $ qemu-system-aarch64 -M virt -cpu max,sve=off,sve512=on,sve=on
  239. 9) Force errors regarding the last vector length::
  240. $ qemu-system-aarch64 -M virt -cpu max,sve128=off
  241. $ qemu-system-aarch64 -M virt -cpu max,sve=off,sve128=off,sve=on
  242. SVE CPU Property Recommendations
  243. --------------------------------
  244. The examples in "SVE CPU Property Examples" exhibit many ways to select
  245. vector lengths which developers may find useful in order to avoid overly
  246. verbose command lines. However, the recommended way to select vector
  247. lengths is to explicitly enable each desired length. Therefore only
  248. example's (1), (4), and (6) exhibit recommended uses of the properties.