hcd-ohci.h 3.0 KB

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  1. /*
  2. * QEMU USB OHCI Emulation
  3. * Copyright (c) 2004 Gianni Tedesco
  4. * Copyright (c) 2006 CodeSourcery
  5. * Copyright (c) 2006 Openedhand Ltd.
  6. *
  7. * This library is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU Lesser General Public
  9. * License as published by the Free Software Foundation; either
  10. * version 2.1 of the License, or (at your option) any later version.
  11. *
  12. * This library is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * Lesser General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU Lesser General Public
  18. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #ifndef HCD_OHCI_H
  21. #define HCD_OHCI_H
  22. #include "sysemu/dma.h"
  23. #include "hw/usb.h"
  24. #include "qom/object.h"
  25. /* Number of Downstream Ports on the root hub: */
  26. #define OHCI_MAX_PORTS 15
  27. typedef struct OHCIPort {
  28. USBPort port;
  29. uint32_t ctrl;
  30. } OHCIPort;
  31. typedef struct OHCIState {
  32. USBBus bus;
  33. qemu_irq irq;
  34. MemoryRegion mem;
  35. AddressSpace *as;
  36. uint32_t num_ports;
  37. const char *name;
  38. QEMUTimer *eof_timer;
  39. int64_t sof_time;
  40. /* OHCI state */
  41. /* Control partition */
  42. uint32_t ctl, status;
  43. uint32_t intr_status;
  44. uint32_t intr;
  45. /* memory pointer partition */
  46. uint32_t hcca;
  47. uint32_t ctrl_head, ctrl_cur;
  48. uint32_t bulk_head, bulk_cur;
  49. uint32_t per_cur;
  50. uint32_t done;
  51. int32_t done_count;
  52. /* Frame counter partition */
  53. uint16_t fsmps;
  54. uint8_t fit;
  55. uint16_t fi;
  56. uint8_t frt;
  57. uint16_t frame_number;
  58. uint16_t padding;
  59. uint32_t pstart;
  60. uint32_t lst;
  61. /* Root Hub partition */
  62. uint32_t rhdesc_a, rhdesc_b;
  63. uint32_t rhstatus;
  64. OHCIPort rhport[OHCI_MAX_PORTS];
  65. /* PXA27x Non-OHCI events */
  66. uint32_t hstatus;
  67. uint32_t hmask;
  68. uint32_t hreset;
  69. uint32_t htest;
  70. /* SM501 local memory offset */
  71. dma_addr_t localmem_base;
  72. /* Active packets. */
  73. uint32_t old_ctl;
  74. USBPacket usb_packet;
  75. uint8_t usb_buf[8192];
  76. uint32_t async_td;
  77. bool async_complete;
  78. void (*ohci_die)(struct OHCIState *ohci);
  79. } OHCIState;
  80. #define TYPE_SYSBUS_OHCI "sysbus-ohci"
  81. OBJECT_DECLARE_SIMPLE_TYPE(OHCISysBusState, SYSBUS_OHCI)
  82. struct OHCISysBusState {
  83. /*< private >*/
  84. SysBusDevice parent_obj;
  85. /*< public >*/
  86. OHCIState ohci;
  87. char *masterbus;
  88. uint32_t num_ports;
  89. uint32_t firstport;
  90. dma_addr_t dma_offset;
  91. };
  92. extern const VMStateDescription vmstate_ohci_state;
  93. void usb_ohci_init(OHCIState *ohci, DeviceState *dev, uint32_t num_ports,
  94. dma_addr_t localmem_base, char *masterbus,
  95. uint32_t firstport, AddressSpace *as,
  96. void (*ohci_die_fn)(struct OHCIState *), Error **errp);
  97. void ohci_bus_stop(OHCIState *ohci);
  98. void ohci_stop_endpoints(OHCIState *ohci);
  99. void ohci_hard_reset(OHCIState *ohci);
  100. void ohci_sysbus_die(struct OHCIState *ohci);
  101. #endif