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omap_synctimer.c 3.1 KB

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  1. /*
  2. * TI OMAP2 32kHz sync timer emulation.
  3. *
  4. * Copyright (C) 2007-2008 Nokia Corporation
  5. * Written by Andrzej Zaborowski <andrew@openedhand.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 or
  10. * (at your option) any later version of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "qemu/osdep.h"
  21. #include "qemu/timer.h"
  22. #include "hw/arm/omap.h"
  23. struct omap_synctimer_s {
  24. MemoryRegion iomem;
  25. uint32_t val;
  26. uint16_t readh;
  27. };
  28. /* 32-kHz Sync Timer of the OMAP2 */
  29. static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) {
  30. return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 0x8000,
  31. NANOSECONDS_PER_SECOND);
  32. }
  33. void omap_synctimer_reset(struct omap_synctimer_s *s)
  34. {
  35. s->val = omap_synctimer_read(s);
  36. }
  37. static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
  38. {
  39. struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
  40. switch (addr) {
  41. case 0x00: /* 32KSYNCNT_REV */
  42. return 0x21;
  43. case 0x10: /* CR */
  44. return omap_synctimer_read(s) - s->val;
  45. }
  46. OMAP_BAD_REG(addr);
  47. return 0;
  48. }
  49. static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
  50. {
  51. struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
  52. uint32_t ret;
  53. if (addr & 2)
  54. return s->readh;
  55. else {
  56. ret = omap_synctimer_readw(opaque, addr);
  57. s->readh = ret >> 16;
  58. return ret & 0xffff;
  59. }
  60. }
  61. static uint64_t omap_synctimer_readfn(void *opaque, hwaddr addr,
  62. unsigned size)
  63. {
  64. switch (size) {
  65. case 1:
  66. return omap_badwidth_read32(opaque, addr);
  67. case 2:
  68. return omap_synctimer_readh(opaque, addr);
  69. case 4:
  70. return omap_synctimer_readw(opaque, addr);
  71. default:
  72. g_assert_not_reached();
  73. }
  74. }
  75. static void omap_synctimer_writefn(void *opaque, hwaddr addr,
  76. uint64_t value, unsigned size)
  77. {
  78. OMAP_BAD_REG(addr);
  79. }
  80. static const MemoryRegionOps omap_synctimer_ops = {
  81. .read = omap_synctimer_readfn,
  82. .write = omap_synctimer_writefn,
  83. .valid.min_access_size = 1,
  84. .valid.max_access_size = 4,
  85. .endianness = DEVICE_NATIVE_ENDIAN,
  86. };
  87. struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
  88. struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk)
  89. {
  90. struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
  91. omap_synctimer_reset(s);
  92. memory_region_init_io(&s->iomem, NULL, &omap_synctimer_ops, s, "omap.synctimer",
  93. omap_l4_region_size(ta, 0));
  94. omap_l4_attach(ta, 0, &s->iomem);
  95. return s;
  96. }