sd.c 63 KB

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  1. /*
  2. * SD Memory Card emulation as defined in the "SD Memory Card Physical
  3. * layer specification, Version 2.00."
  4. *
  5. * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
  6. * Copyright (c) 2007 CodeSourcery
  7. * Copyright (c) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
  8. *
  9. * Redistribution and use in source and binary forms, with or without
  10. * modification, are permitted provided that the following conditions
  11. * are met:
  12. *
  13. * 1. Redistributions of source code must retain the above copyright
  14. * notice, this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright
  16. * notice, this list of conditions and the following disclaimer in
  17. * the documentation and/or other materials provided with the
  18. * distribution.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  21. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  22. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  23. * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR
  24. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  25. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  26. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  27. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  28. * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. */
  32. #include "qemu/osdep.h"
  33. #include "qemu/units.h"
  34. #include "qemu/cutils.h"
  35. #include "hw/irq.h"
  36. #include "hw/registerfields.h"
  37. #include "sysemu/block-backend.h"
  38. #include "hw/sd/sd.h"
  39. #include "hw/sd/sdcard_legacy.h"
  40. #include "migration/vmstate.h"
  41. #include "qapi/error.h"
  42. #include "qemu/bitmap.h"
  43. #include "hw/qdev-properties.h"
  44. #include "qemu/error-report.h"
  45. #include "qemu/timer.h"
  46. #include "qemu/log.h"
  47. #include "qemu/module.h"
  48. #include "sdmmc-internal.h"
  49. #include "trace.h"
  50. //#define DEBUG_SD 1
  51. #define SDSC_MAX_CAPACITY (2 * GiB)
  52. typedef enum {
  53. sd_r0 = 0, /* no response */
  54. sd_r1, /* normal response command */
  55. sd_r2_i, /* CID register */
  56. sd_r2_s, /* CSD register */
  57. sd_r3, /* OCR register */
  58. sd_r6 = 6, /* Published RCA response */
  59. sd_r7, /* Operating voltage */
  60. sd_r1b = -1,
  61. sd_illegal = -2,
  62. } sd_rsp_type_t;
  63. enum SDCardModes {
  64. sd_inactive,
  65. sd_card_identification_mode,
  66. sd_data_transfer_mode,
  67. };
  68. enum SDCardStates {
  69. sd_inactive_state = -1,
  70. sd_idle_state = 0,
  71. sd_ready_state,
  72. sd_identification_state,
  73. sd_standby_state,
  74. sd_transfer_state,
  75. sd_sendingdata_state,
  76. sd_receivingdata_state,
  77. sd_programming_state,
  78. sd_disconnect_state,
  79. };
  80. struct SDState {
  81. DeviceState parent_obj;
  82. /* If true, created by sd_init() for a non-qdevified caller */
  83. /* TODO purge them with fire */
  84. bool me_no_qdev_me_kill_mammoth_with_rocks;
  85. /* SD Memory Card Registers */
  86. uint32_t ocr;
  87. uint8_t scr[8];
  88. uint8_t cid[16];
  89. uint8_t csd[16];
  90. uint16_t rca;
  91. uint32_t card_status;
  92. uint8_t sd_status[64];
  93. /* Configurable properties */
  94. uint8_t spec_version;
  95. BlockBackend *blk;
  96. bool spi;
  97. uint32_t mode; /* current card mode, one of SDCardModes */
  98. int32_t state; /* current card state, one of SDCardStates */
  99. uint32_t vhs;
  100. bool wp_switch;
  101. unsigned long *wp_groups;
  102. int32_t wpgrps_size;
  103. uint64_t size;
  104. uint32_t blk_len;
  105. uint32_t multi_blk_cnt;
  106. uint32_t erase_start;
  107. uint32_t erase_end;
  108. uint8_t pwd[16];
  109. uint32_t pwd_len;
  110. uint8_t function_group[6];
  111. uint8_t current_cmd;
  112. /* True if we will handle the next command as an ACMD. Note that this does
  113. * *not* track the APP_CMD status bit!
  114. */
  115. bool expecting_acmd;
  116. uint32_t blk_written;
  117. uint64_t data_start;
  118. uint32_t data_offset;
  119. uint8_t data[512];
  120. qemu_irq readonly_cb;
  121. qemu_irq inserted_cb;
  122. QEMUTimer *ocr_power_timer;
  123. const char *proto_name;
  124. bool enable;
  125. uint8_t dat_lines;
  126. bool cmd_line;
  127. };
  128. static void sd_realize(DeviceState *dev, Error **errp);
  129. static const char *sd_state_name(enum SDCardStates state)
  130. {
  131. static const char *state_name[] = {
  132. [sd_idle_state] = "idle",
  133. [sd_ready_state] = "ready",
  134. [sd_identification_state] = "identification",
  135. [sd_standby_state] = "standby",
  136. [sd_transfer_state] = "transfer",
  137. [sd_sendingdata_state] = "sendingdata",
  138. [sd_receivingdata_state] = "receivingdata",
  139. [sd_programming_state] = "programming",
  140. [sd_disconnect_state] = "disconnect",
  141. };
  142. if (state == sd_inactive_state) {
  143. return "inactive";
  144. }
  145. assert(state < ARRAY_SIZE(state_name));
  146. return state_name[state];
  147. }
  148. static const char *sd_response_name(sd_rsp_type_t rsp)
  149. {
  150. static const char *response_name[] = {
  151. [sd_r0] = "RESP#0 (no response)",
  152. [sd_r1] = "RESP#1 (normal cmd)",
  153. [sd_r2_i] = "RESP#2 (CID reg)",
  154. [sd_r2_s] = "RESP#2 (CSD reg)",
  155. [sd_r3] = "RESP#3 (OCR reg)",
  156. [sd_r6] = "RESP#6 (RCA)",
  157. [sd_r7] = "RESP#7 (operating voltage)",
  158. };
  159. if (rsp == sd_illegal) {
  160. return "ILLEGAL RESP";
  161. }
  162. if (rsp == sd_r1b) {
  163. rsp = sd_r1;
  164. }
  165. assert(rsp < ARRAY_SIZE(response_name));
  166. return response_name[rsp];
  167. }
  168. static uint8_t sd_get_dat_lines(SDState *sd)
  169. {
  170. return sd->enable ? sd->dat_lines : 0;
  171. }
  172. static bool sd_get_cmd_line(SDState *sd)
  173. {
  174. return sd->enable ? sd->cmd_line : false;
  175. }
  176. static void sd_set_voltage(SDState *sd, uint16_t millivolts)
  177. {
  178. trace_sdcard_set_voltage(millivolts);
  179. switch (millivolts) {
  180. case 3001 ... 3600: /* SD_VOLTAGE_3_3V */
  181. case 2001 ... 3000: /* SD_VOLTAGE_3_0V */
  182. break;
  183. default:
  184. qemu_log_mask(LOG_GUEST_ERROR, "SD card voltage not supported: %.3fV",
  185. millivolts / 1000.f);
  186. }
  187. }
  188. static void sd_set_mode(SDState *sd)
  189. {
  190. switch (sd->state) {
  191. case sd_inactive_state:
  192. sd->mode = sd_inactive;
  193. break;
  194. case sd_idle_state:
  195. case sd_ready_state:
  196. case sd_identification_state:
  197. sd->mode = sd_card_identification_mode;
  198. break;
  199. case sd_standby_state:
  200. case sd_transfer_state:
  201. case sd_sendingdata_state:
  202. case sd_receivingdata_state:
  203. case sd_programming_state:
  204. case sd_disconnect_state:
  205. sd->mode = sd_data_transfer_mode;
  206. break;
  207. }
  208. }
  209. static const sd_cmd_type_t sd_cmd_type[SDMMC_CMD_MAX] = {
  210. sd_bc, sd_none, sd_bcr, sd_bcr, sd_none, sd_none, sd_none, sd_ac,
  211. sd_bcr, sd_ac, sd_ac, sd_adtc, sd_ac, sd_ac, sd_none, sd_ac,
  212. /* 16 */
  213. sd_ac, sd_adtc, sd_adtc, sd_none, sd_none, sd_none, sd_none, sd_none,
  214. sd_adtc, sd_adtc, sd_adtc, sd_adtc, sd_ac, sd_ac, sd_adtc, sd_none,
  215. /* 32 */
  216. sd_ac, sd_ac, sd_none, sd_none, sd_none, sd_none, sd_ac, sd_none,
  217. sd_none, sd_none, sd_bc, sd_none, sd_none, sd_none, sd_none, sd_none,
  218. /* 48 */
  219. sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_ac,
  220. sd_adtc, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none,
  221. };
  222. static const int sd_cmd_class[SDMMC_CMD_MAX] = {
  223. 0, 0, 0, 0, 0, 9, 10, 0, 0, 0, 0, 1, 0, 0, 0, 0,
  224. 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6,
  225. 5, 5, 10, 10, 10, 10, 5, 9, 9, 9, 7, 7, 7, 7, 7, 7,
  226. 7, 7, 10, 7, 9, 9, 9, 8, 8, 10, 8, 8, 8, 8, 8, 8,
  227. };
  228. static uint8_t sd_crc7(void *message, size_t width)
  229. {
  230. int i, bit;
  231. uint8_t shift_reg = 0x00;
  232. uint8_t *msg = (uint8_t *) message;
  233. for (i = 0; i < width; i ++, msg ++)
  234. for (bit = 7; bit >= 0; bit --) {
  235. shift_reg <<= 1;
  236. if ((shift_reg >> 7) ^ ((*msg >> bit) & 1))
  237. shift_reg ^= 0x89;
  238. }
  239. return shift_reg;
  240. }
  241. static uint16_t sd_crc16(void *message, size_t width)
  242. {
  243. int i, bit;
  244. uint16_t shift_reg = 0x0000;
  245. uint16_t *msg = (uint16_t *) message;
  246. width <<= 1;
  247. for (i = 0; i < width; i ++, msg ++)
  248. for (bit = 15; bit >= 0; bit --) {
  249. shift_reg <<= 1;
  250. if ((shift_reg >> 15) ^ ((*msg >> bit) & 1))
  251. shift_reg ^= 0x1011;
  252. }
  253. return shift_reg;
  254. }
  255. #define OCR_POWER_DELAY_NS 500000 /* 0.5ms */
  256. FIELD(OCR, VDD_VOLTAGE_WINDOW, 0, 24)
  257. FIELD(OCR, VDD_VOLTAGE_WIN_LO, 0, 8)
  258. FIELD(OCR, DUAL_VOLTAGE_CARD, 7, 1)
  259. FIELD(OCR, VDD_VOLTAGE_WIN_HI, 8, 16)
  260. FIELD(OCR, ACCEPT_SWITCH_1V8, 24, 1) /* Only UHS-I */
  261. FIELD(OCR, UHS_II_CARD, 29, 1) /* Only UHS-II */
  262. FIELD(OCR, CARD_CAPACITY, 30, 1) /* 0:SDSC, 1:SDHC/SDXC */
  263. FIELD(OCR, CARD_POWER_UP, 31, 1)
  264. #define ACMD41_ENQUIRY_MASK 0x00ffffff
  265. #define ACMD41_R3_MASK (R_OCR_VDD_VOLTAGE_WIN_HI_MASK \
  266. | R_OCR_ACCEPT_SWITCH_1V8_MASK \
  267. | R_OCR_UHS_II_CARD_MASK \
  268. | R_OCR_CARD_CAPACITY_MASK \
  269. | R_OCR_CARD_POWER_UP_MASK)
  270. static void sd_set_ocr(SDState *sd)
  271. {
  272. /* All voltages OK */
  273. sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
  274. }
  275. static void sd_ocr_powerup(void *opaque)
  276. {
  277. SDState *sd = opaque;
  278. trace_sdcard_powerup();
  279. assert(!FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP));
  280. /* card power-up OK */
  281. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
  282. if (sd->size > SDSC_MAX_CAPACITY) {
  283. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
  284. }
  285. }
  286. static void sd_set_scr(SDState *sd)
  287. {
  288. sd->scr[0] = 0 << 4; /* SCR structure version 1.0 */
  289. if (sd->spec_version == SD_PHY_SPECv1_10_VERS) {
  290. sd->scr[0] |= 1; /* Spec Version 1.10 */
  291. } else {
  292. sd->scr[0] |= 2; /* Spec Version 2.00 or Version 3.0X */
  293. }
  294. sd->scr[1] = (2 << 4) /* SDSC Card (Security Version 1.01) */
  295. | 0b0101; /* 1-bit or 4-bit width bus modes */
  296. sd->scr[2] = 0x00; /* Extended Security is not supported. */
  297. if (sd->spec_version >= SD_PHY_SPECv3_01_VERS) {
  298. sd->scr[2] |= 1 << 7; /* Spec Version 3.0X */
  299. }
  300. sd->scr[3] = 0x00;
  301. /* reserved for manufacturer usage */
  302. sd->scr[4] = 0x00;
  303. sd->scr[5] = 0x00;
  304. sd->scr[6] = 0x00;
  305. sd->scr[7] = 0x00;
  306. }
  307. #define MID 0xaa
  308. #define OID "XY"
  309. #define PNM "QEMU!"
  310. #define PRV 0x01
  311. #define MDT_YR 2006
  312. #define MDT_MON 2
  313. static void sd_set_cid(SDState *sd)
  314. {
  315. sd->cid[0] = MID; /* Fake card manufacturer ID (MID) */
  316. sd->cid[1] = OID[0]; /* OEM/Application ID (OID) */
  317. sd->cid[2] = OID[1];
  318. sd->cid[3] = PNM[0]; /* Fake product name (PNM) */
  319. sd->cid[4] = PNM[1];
  320. sd->cid[5] = PNM[2];
  321. sd->cid[6] = PNM[3];
  322. sd->cid[7] = PNM[4];
  323. sd->cid[8] = PRV; /* Fake product revision (PRV) */
  324. sd->cid[9] = 0xde; /* Fake serial number (PSN) */
  325. sd->cid[10] = 0xad;
  326. sd->cid[11] = 0xbe;
  327. sd->cid[12] = 0xef;
  328. sd->cid[13] = 0x00 | /* Manufacture date (MDT) */
  329. ((MDT_YR - 2000) / 10);
  330. sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
  331. sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
  332. }
  333. #define HWBLOCK_SHIFT 9 /* 512 bytes */
  334. #define SECTOR_SHIFT 5 /* 16 kilobytes */
  335. #define WPGROUP_SHIFT 7 /* 2 megs */
  336. #define CMULT_SHIFT 9 /* 512 times HWBLOCK_SIZE */
  337. #define WPGROUP_SIZE (1 << (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT))
  338. static const uint8_t sd_csd_rw_mask[16] = {
  339. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  340. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe,
  341. };
  342. static void sd_set_csd(SDState *sd, uint64_t size)
  343. {
  344. uint32_t csize = (size >> (CMULT_SHIFT + HWBLOCK_SHIFT)) - 1;
  345. uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1;
  346. uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1;
  347. if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */
  348. sd->csd[0] = 0x00; /* CSD structure */
  349. sd->csd[1] = 0x26; /* Data read access-time-1 */
  350. sd->csd[2] = 0x00; /* Data read access-time-2 */
  351. sd->csd[3] = 0x32; /* Max. data transfer rate: 25 MHz */
  352. sd->csd[4] = 0x5f; /* Card Command Classes */
  353. sd->csd[5] = 0x50 | /* Max. read data block length */
  354. HWBLOCK_SHIFT;
  355. sd->csd[6] = 0xe0 | /* Partial block for read allowed */
  356. ((csize >> 10) & 0x03);
  357. sd->csd[7] = 0x00 | /* Device size */
  358. ((csize >> 2) & 0xff);
  359. sd->csd[8] = 0x3f | /* Max. read current */
  360. ((csize << 6) & 0xc0);
  361. sd->csd[9] = 0xfc | /* Max. write current */
  362. ((CMULT_SHIFT - 2) >> 1);
  363. sd->csd[10] = 0x40 | /* Erase sector size */
  364. (((CMULT_SHIFT - 2) << 7) & 0x80) | (sectsize >> 1);
  365. sd->csd[11] = 0x00 | /* Write protect group size */
  366. ((sectsize << 7) & 0x80) | wpsize;
  367. sd->csd[12] = 0x90 | /* Write speed factor */
  368. (HWBLOCK_SHIFT >> 2);
  369. sd->csd[13] = 0x20 | /* Max. write data block length */
  370. ((HWBLOCK_SHIFT << 6) & 0xc0);
  371. sd->csd[14] = 0x00; /* File format group */
  372. } else { /* SDHC */
  373. size /= 512 * KiB;
  374. size -= 1;
  375. sd->csd[0] = 0x40;
  376. sd->csd[1] = 0x0e;
  377. sd->csd[2] = 0x00;
  378. sd->csd[3] = 0x32;
  379. sd->csd[4] = 0x5b;
  380. sd->csd[5] = 0x59;
  381. sd->csd[6] = 0x00;
  382. sd->csd[7] = (size >> 16) & 0xff;
  383. sd->csd[8] = (size >> 8) & 0xff;
  384. sd->csd[9] = (size & 0xff);
  385. sd->csd[10] = 0x7f;
  386. sd->csd[11] = 0x80;
  387. sd->csd[12] = 0x0a;
  388. sd->csd[13] = 0x40;
  389. sd->csd[14] = 0x00;
  390. }
  391. sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
  392. }
  393. static void sd_set_rca(SDState *sd)
  394. {
  395. sd->rca += 0x4567;
  396. }
  397. FIELD(CSR, AKE_SEQ_ERROR, 3, 1)
  398. FIELD(CSR, APP_CMD, 5, 1)
  399. FIELD(CSR, FX_EVENT, 6, 1)
  400. FIELD(CSR, READY_FOR_DATA, 8, 1)
  401. FIELD(CSR, CURRENT_STATE, 9, 4)
  402. FIELD(CSR, ERASE_RESET, 13, 1)
  403. FIELD(CSR, CARD_ECC_DISABLED, 14, 1)
  404. FIELD(CSR, WP_ERASE_SKIP, 15, 1)
  405. FIELD(CSR, CSD_OVERWRITE, 16, 1)
  406. FIELD(CSR, DEFERRED_RESPONSE, 17, 1)
  407. FIELD(CSR, ERROR, 19, 1)
  408. FIELD(CSR, CC_ERROR, 20, 1)
  409. FIELD(CSR, CARD_ECC_FAILED, 21, 1)
  410. FIELD(CSR, ILLEGAL_COMMAND, 22, 1)
  411. FIELD(CSR, COM_CRC_ERROR, 23, 1)
  412. FIELD(CSR, LOCK_UNLOCK_FAILED, 24, 1)
  413. FIELD(CSR, CARD_IS_LOCKED, 25, 1)
  414. FIELD(CSR, WP_VIOLATION, 26, 1)
  415. FIELD(CSR, ERASE_PARAM, 27, 1)
  416. FIELD(CSR, ERASE_SEQ_ERROR, 28, 1)
  417. FIELD(CSR, BLOCK_LEN_ERROR, 29, 1)
  418. FIELD(CSR, ADDRESS_ERROR, 30, 1)
  419. FIELD(CSR, OUT_OF_RANGE, 31, 1)
  420. /* Card status bits, split by clear condition:
  421. * A : According to the card current state
  422. * B : Always related to the previous command
  423. * C : Cleared by read
  424. */
  425. #define CARD_STATUS_A (R_CSR_READY_FOR_DATA_MASK \
  426. | R_CSR_CARD_ECC_DISABLED_MASK \
  427. | R_CSR_CARD_IS_LOCKED_MASK)
  428. #define CARD_STATUS_B (R_CSR_CURRENT_STATE_MASK \
  429. | R_CSR_ILLEGAL_COMMAND_MASK \
  430. | R_CSR_COM_CRC_ERROR_MASK)
  431. #define CARD_STATUS_C (R_CSR_AKE_SEQ_ERROR_MASK \
  432. | R_CSR_APP_CMD_MASK \
  433. | R_CSR_ERASE_RESET_MASK \
  434. | R_CSR_WP_ERASE_SKIP_MASK \
  435. | R_CSR_CSD_OVERWRITE_MASK \
  436. | R_CSR_ERROR_MASK \
  437. | R_CSR_CC_ERROR_MASK \
  438. | R_CSR_CARD_ECC_FAILED_MASK \
  439. | R_CSR_LOCK_UNLOCK_FAILED_MASK \
  440. | R_CSR_WP_VIOLATION_MASK \
  441. | R_CSR_ERASE_PARAM_MASK \
  442. | R_CSR_ERASE_SEQ_ERROR_MASK \
  443. | R_CSR_BLOCK_LEN_ERROR_MASK \
  444. | R_CSR_ADDRESS_ERROR_MASK \
  445. | R_CSR_OUT_OF_RANGE_MASK)
  446. static void sd_set_cardstatus(SDState *sd)
  447. {
  448. sd->card_status = 0x00000100;
  449. }
  450. static void sd_set_sdstatus(SDState *sd)
  451. {
  452. memset(sd->sd_status, 0, 64);
  453. }
  454. static int sd_req_crc_validate(SDRequest *req)
  455. {
  456. uint8_t buffer[5];
  457. buffer[0] = 0x40 | req->cmd;
  458. stl_be_p(&buffer[1], req->arg);
  459. return 0;
  460. return sd_crc7(buffer, 5) != req->crc; /* TODO */
  461. }
  462. static void sd_response_r1_make(SDState *sd, uint8_t *response)
  463. {
  464. stl_be_p(response, sd->card_status);
  465. /* Clear the "clear on read" status bits */
  466. sd->card_status &= ~CARD_STATUS_C;
  467. }
  468. static void sd_response_r3_make(SDState *sd, uint8_t *response)
  469. {
  470. stl_be_p(response, sd->ocr & ACMD41_R3_MASK);
  471. }
  472. static void sd_response_r6_make(SDState *sd, uint8_t *response)
  473. {
  474. uint16_t status;
  475. status = ((sd->card_status >> 8) & 0xc000) |
  476. ((sd->card_status >> 6) & 0x2000) |
  477. (sd->card_status & 0x1fff);
  478. sd->card_status &= ~(CARD_STATUS_C & 0xc81fff);
  479. stw_be_p(response + 0, sd->rca);
  480. stw_be_p(response + 2, status);
  481. }
  482. static void sd_response_r7_make(SDState *sd, uint8_t *response)
  483. {
  484. stl_be_p(response, sd->vhs);
  485. }
  486. static inline uint64_t sd_addr_to_wpnum(uint64_t addr)
  487. {
  488. return addr >> (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT);
  489. }
  490. static void sd_reset(DeviceState *dev)
  491. {
  492. SDState *sd = SD_CARD(dev);
  493. uint64_t size;
  494. uint64_t sect;
  495. trace_sdcard_reset();
  496. if (sd->blk) {
  497. blk_get_geometry(sd->blk, &sect);
  498. } else {
  499. sect = 0;
  500. }
  501. size = sect << 9;
  502. sect = sd_addr_to_wpnum(size) + 1;
  503. sd->state = sd_idle_state;
  504. sd->rca = 0x0000;
  505. sd_set_ocr(sd);
  506. sd_set_scr(sd);
  507. sd_set_cid(sd);
  508. sd_set_csd(sd, size);
  509. sd_set_cardstatus(sd);
  510. sd_set_sdstatus(sd);
  511. g_free(sd->wp_groups);
  512. sd->wp_switch = sd->blk ? blk_is_read_only(sd->blk) : false;
  513. sd->wpgrps_size = sect;
  514. sd->wp_groups = bitmap_new(sd->wpgrps_size);
  515. memset(sd->function_group, 0, sizeof(sd->function_group));
  516. sd->erase_start = 0;
  517. sd->erase_end = 0;
  518. sd->size = size;
  519. sd->blk_len = 0x200;
  520. sd->pwd_len = 0;
  521. sd->expecting_acmd = false;
  522. sd->dat_lines = 0xf;
  523. sd->cmd_line = true;
  524. sd->multi_blk_cnt = 0;
  525. }
  526. static bool sd_get_inserted(SDState *sd)
  527. {
  528. return sd->blk && blk_is_inserted(sd->blk);
  529. }
  530. static bool sd_get_readonly(SDState *sd)
  531. {
  532. return sd->wp_switch;
  533. }
  534. static void sd_cardchange(void *opaque, bool load, Error **errp)
  535. {
  536. SDState *sd = opaque;
  537. DeviceState *dev = DEVICE(sd);
  538. SDBus *sdbus;
  539. bool inserted = sd_get_inserted(sd);
  540. bool readonly = sd_get_readonly(sd);
  541. if (inserted) {
  542. trace_sdcard_inserted(readonly);
  543. sd_reset(dev);
  544. } else {
  545. trace_sdcard_ejected();
  546. }
  547. if (sd->me_no_qdev_me_kill_mammoth_with_rocks) {
  548. qemu_set_irq(sd->inserted_cb, inserted);
  549. if (inserted) {
  550. qemu_set_irq(sd->readonly_cb, readonly);
  551. }
  552. } else {
  553. sdbus = SD_BUS(qdev_get_parent_bus(dev));
  554. sdbus_set_inserted(sdbus, inserted);
  555. if (inserted) {
  556. sdbus_set_readonly(sdbus, readonly);
  557. }
  558. }
  559. }
  560. static const BlockDevOps sd_block_ops = {
  561. .change_media_cb = sd_cardchange,
  562. };
  563. static bool sd_ocr_vmstate_needed(void *opaque)
  564. {
  565. SDState *sd = opaque;
  566. /* Include the OCR state (and timer) if it is not yet powered up */
  567. return !FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP);
  568. }
  569. static const VMStateDescription sd_ocr_vmstate = {
  570. .name = "sd-card/ocr-state",
  571. .version_id = 1,
  572. .minimum_version_id = 1,
  573. .needed = sd_ocr_vmstate_needed,
  574. .fields = (VMStateField[]) {
  575. VMSTATE_UINT32(ocr, SDState),
  576. VMSTATE_TIMER_PTR(ocr_power_timer, SDState),
  577. VMSTATE_END_OF_LIST()
  578. },
  579. };
  580. static int sd_vmstate_pre_load(void *opaque)
  581. {
  582. SDState *sd = opaque;
  583. /* If the OCR state is not included (prior versions, or not
  584. * needed), then the OCR must be set as powered up. If the OCR state
  585. * is included, this will be replaced by the state restore.
  586. */
  587. sd_ocr_powerup(sd);
  588. return 0;
  589. }
  590. static const VMStateDescription sd_vmstate = {
  591. .name = "sd-card",
  592. .version_id = 1,
  593. .minimum_version_id = 1,
  594. .pre_load = sd_vmstate_pre_load,
  595. .fields = (VMStateField[]) {
  596. VMSTATE_UINT32(mode, SDState),
  597. VMSTATE_INT32(state, SDState),
  598. VMSTATE_UINT8_ARRAY(cid, SDState, 16),
  599. VMSTATE_UINT8_ARRAY(csd, SDState, 16),
  600. VMSTATE_UINT16(rca, SDState),
  601. VMSTATE_UINT32(card_status, SDState),
  602. VMSTATE_PARTIAL_BUFFER(sd_status, SDState, 1),
  603. VMSTATE_UINT32(vhs, SDState),
  604. VMSTATE_BITMAP(wp_groups, SDState, 0, wpgrps_size),
  605. VMSTATE_UINT32(blk_len, SDState),
  606. VMSTATE_UINT32(multi_blk_cnt, SDState),
  607. VMSTATE_UINT32(erase_start, SDState),
  608. VMSTATE_UINT32(erase_end, SDState),
  609. VMSTATE_UINT8_ARRAY(pwd, SDState, 16),
  610. VMSTATE_UINT32(pwd_len, SDState),
  611. VMSTATE_UINT8_ARRAY(function_group, SDState, 6),
  612. VMSTATE_UINT8(current_cmd, SDState),
  613. VMSTATE_BOOL(expecting_acmd, SDState),
  614. VMSTATE_UINT32(blk_written, SDState),
  615. VMSTATE_UINT64(data_start, SDState),
  616. VMSTATE_UINT32(data_offset, SDState),
  617. VMSTATE_UINT8_ARRAY(data, SDState, 512),
  618. VMSTATE_UNUSED_V(1, 512),
  619. VMSTATE_BOOL(enable, SDState),
  620. VMSTATE_END_OF_LIST()
  621. },
  622. .subsections = (const VMStateDescription*[]) {
  623. &sd_ocr_vmstate,
  624. NULL
  625. },
  626. };
  627. /* Legacy initialization function for use by non-qdevified callers */
  628. SDState *sd_init(BlockBackend *blk, bool is_spi)
  629. {
  630. Object *obj;
  631. DeviceState *dev;
  632. SDState *sd;
  633. Error *err = NULL;
  634. obj = object_new(TYPE_SD_CARD);
  635. dev = DEVICE(obj);
  636. if (!qdev_prop_set_drive_err(dev, "drive", blk, &err)) {
  637. error_reportf_err(err, "sd_init failed: ");
  638. return NULL;
  639. }
  640. qdev_prop_set_bit(dev, "spi", is_spi);
  641. /*
  642. * Realizing the device properly would put it into the QOM
  643. * composition tree even though it is not plugged into an
  644. * appropriate bus. That's a no-no. Hide the device from
  645. * QOM/qdev, and call its qdev realize callback directly.
  646. */
  647. object_ref(obj);
  648. object_unparent(obj);
  649. sd_realize(dev, &err);
  650. if (err) {
  651. error_reportf_err(err, "sd_init failed: ");
  652. return NULL;
  653. }
  654. sd = SD_CARD(dev);
  655. sd->me_no_qdev_me_kill_mammoth_with_rocks = true;
  656. return sd;
  657. }
  658. void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert)
  659. {
  660. sd->readonly_cb = readonly;
  661. sd->inserted_cb = insert;
  662. qemu_set_irq(readonly, sd->blk ? blk_is_read_only(sd->blk) : 0);
  663. qemu_set_irq(insert, sd->blk ? blk_is_inserted(sd->blk) : 0);
  664. }
  665. static void sd_erase(SDState *sd)
  666. {
  667. int i;
  668. uint64_t erase_start = sd->erase_start;
  669. uint64_t erase_end = sd->erase_end;
  670. trace_sdcard_erase();
  671. if (!sd->erase_start || !sd->erase_end) {
  672. sd->card_status |= ERASE_SEQ_ERROR;
  673. return;
  674. }
  675. if (FIELD_EX32(sd->ocr, OCR, CARD_CAPACITY)) {
  676. /* High capacity memory card: erase units are 512 byte blocks */
  677. erase_start *= 512;
  678. erase_end *= 512;
  679. }
  680. erase_start = sd_addr_to_wpnum(erase_start);
  681. erase_end = sd_addr_to_wpnum(erase_end);
  682. sd->erase_start = 0;
  683. sd->erase_end = 0;
  684. sd->csd[14] |= 0x40;
  685. for (i = erase_start; i <= erase_end; i++) {
  686. if (test_bit(i, sd->wp_groups)) {
  687. sd->card_status |= WP_ERASE_SKIP;
  688. }
  689. }
  690. }
  691. static uint32_t sd_wpbits(SDState *sd, uint64_t addr)
  692. {
  693. uint32_t i, wpnum;
  694. uint32_t ret = 0;
  695. wpnum = sd_addr_to_wpnum(addr);
  696. for (i = 0; i < 32; i++, wpnum++, addr += WPGROUP_SIZE) {
  697. if (addr < sd->size && test_bit(wpnum, sd->wp_groups)) {
  698. ret |= (1 << i);
  699. }
  700. }
  701. return ret;
  702. }
  703. static void sd_function_switch(SDState *sd, uint32_t arg)
  704. {
  705. int i, mode, new_func;
  706. mode = !!(arg & 0x80000000);
  707. sd->data[0] = 0x00; /* Maximum current consumption */
  708. sd->data[1] = 0x01;
  709. sd->data[2] = 0x80; /* Supported group 6 functions */
  710. sd->data[3] = 0x01;
  711. sd->data[4] = 0x80; /* Supported group 5 functions */
  712. sd->data[5] = 0x01;
  713. sd->data[6] = 0x80; /* Supported group 4 functions */
  714. sd->data[7] = 0x01;
  715. sd->data[8] = 0x80; /* Supported group 3 functions */
  716. sd->data[9] = 0x01;
  717. sd->data[10] = 0x80; /* Supported group 2 functions */
  718. sd->data[11] = 0x43;
  719. sd->data[12] = 0x80; /* Supported group 1 functions */
  720. sd->data[13] = 0x03;
  721. for (i = 0; i < 6; i ++) {
  722. new_func = (arg >> (i * 4)) & 0x0f;
  723. if (mode && new_func != 0x0f)
  724. sd->function_group[i] = new_func;
  725. sd->data[16 - (i >> 1)] |= new_func << ((i % 2) * 4);
  726. }
  727. memset(&sd->data[17], 0, 47);
  728. stw_be_p(sd->data + 64, sd_crc16(sd->data, 64));
  729. }
  730. static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
  731. {
  732. return test_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
  733. }
  734. static void sd_lock_command(SDState *sd)
  735. {
  736. int erase, lock, clr_pwd, set_pwd, pwd_len;
  737. erase = !!(sd->data[0] & 0x08);
  738. lock = sd->data[0] & 0x04;
  739. clr_pwd = sd->data[0] & 0x02;
  740. set_pwd = sd->data[0] & 0x01;
  741. if (sd->blk_len > 1)
  742. pwd_len = sd->data[1];
  743. else
  744. pwd_len = 0;
  745. if (lock) {
  746. trace_sdcard_lock();
  747. } else {
  748. trace_sdcard_unlock();
  749. }
  750. if (erase) {
  751. if (!(sd->card_status & CARD_IS_LOCKED) || sd->blk_len > 1 ||
  752. set_pwd || clr_pwd || lock || sd->wp_switch ||
  753. (sd->csd[14] & 0x20)) {
  754. sd->card_status |= LOCK_UNLOCK_FAILED;
  755. return;
  756. }
  757. bitmap_zero(sd->wp_groups, sd->wpgrps_size);
  758. sd->csd[14] &= ~0x10;
  759. sd->card_status &= ~CARD_IS_LOCKED;
  760. sd->pwd_len = 0;
  761. /* Erasing the entire card here! */
  762. fprintf(stderr, "SD: Card force-erased by CMD42\n");
  763. return;
  764. }
  765. if (sd->blk_len < 2 + pwd_len ||
  766. pwd_len <= sd->pwd_len ||
  767. pwd_len > sd->pwd_len + 16) {
  768. sd->card_status |= LOCK_UNLOCK_FAILED;
  769. return;
  770. }
  771. if (sd->pwd_len && memcmp(sd->pwd, sd->data + 2, sd->pwd_len)) {
  772. sd->card_status |= LOCK_UNLOCK_FAILED;
  773. return;
  774. }
  775. pwd_len -= sd->pwd_len;
  776. if ((pwd_len && !set_pwd) ||
  777. (clr_pwd && (set_pwd || lock)) ||
  778. (lock && !sd->pwd_len && !set_pwd) ||
  779. (!set_pwd && !clr_pwd &&
  780. (((sd->card_status & CARD_IS_LOCKED) && lock) ||
  781. (!(sd->card_status & CARD_IS_LOCKED) && !lock)))) {
  782. sd->card_status |= LOCK_UNLOCK_FAILED;
  783. return;
  784. }
  785. if (set_pwd) {
  786. memcpy(sd->pwd, sd->data + 2 + sd->pwd_len, pwd_len);
  787. sd->pwd_len = pwd_len;
  788. }
  789. if (clr_pwd) {
  790. sd->pwd_len = 0;
  791. }
  792. if (lock)
  793. sd->card_status |= CARD_IS_LOCKED;
  794. else
  795. sd->card_status &= ~CARD_IS_LOCKED;
  796. }
  797. static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
  798. {
  799. uint32_t rca = 0x0000;
  800. uint64_t addr = (sd->ocr & (1 << 30)) ? (uint64_t) req.arg << 9 : req.arg;
  801. /* CMD55 precedes an ACMD, so we are not interested in tracing it.
  802. * However there is no ACMD55, so we want to trace this particular case.
  803. */
  804. if (req.cmd != 55 || sd->expecting_acmd) {
  805. trace_sdcard_normal_command(sd->proto_name,
  806. sd_cmd_name(req.cmd), req.cmd,
  807. req.arg, sd_state_name(sd->state));
  808. }
  809. /* Not interpreting this as an app command */
  810. sd->card_status &= ~APP_CMD;
  811. if (sd_cmd_type[req.cmd] == sd_ac
  812. || sd_cmd_type[req.cmd] == sd_adtc) {
  813. rca = req.arg >> 16;
  814. }
  815. /* CMD23 (set block count) must be immediately followed by CMD18 or CMD25
  816. * if not, its effects are cancelled */
  817. if (sd->multi_blk_cnt != 0 && !(req.cmd == 18 || req.cmd == 25)) {
  818. sd->multi_blk_cnt = 0;
  819. }
  820. if (sd_cmd_class[req.cmd] == 6 && FIELD_EX32(sd->ocr, OCR, CARD_CAPACITY)) {
  821. /* Only Standard Capacity cards support class 6 commands */
  822. return sd_illegal;
  823. }
  824. switch (req.cmd) {
  825. /* Basic commands (Class 0 and Class 1) */
  826. case 0: /* CMD0: GO_IDLE_STATE */
  827. switch (sd->state) {
  828. case sd_inactive_state:
  829. return sd->spi ? sd_r1 : sd_r0;
  830. default:
  831. sd->state = sd_idle_state;
  832. sd_reset(DEVICE(sd));
  833. return sd->spi ? sd_r1 : sd_r0;
  834. }
  835. break;
  836. case 1: /* CMD1: SEND_OP_CMD */
  837. if (!sd->spi)
  838. goto bad_cmd;
  839. sd->state = sd_transfer_state;
  840. return sd_r1;
  841. case 2: /* CMD2: ALL_SEND_CID */
  842. if (sd->spi)
  843. goto bad_cmd;
  844. switch (sd->state) {
  845. case sd_ready_state:
  846. sd->state = sd_identification_state;
  847. return sd_r2_i;
  848. default:
  849. break;
  850. }
  851. break;
  852. case 3: /* CMD3: SEND_RELATIVE_ADDR */
  853. if (sd->spi)
  854. goto bad_cmd;
  855. switch (sd->state) {
  856. case sd_identification_state:
  857. case sd_standby_state:
  858. sd->state = sd_standby_state;
  859. sd_set_rca(sd);
  860. return sd_r6;
  861. default:
  862. break;
  863. }
  864. break;
  865. case 4: /* CMD4: SEND_DSR */
  866. if (sd->spi)
  867. goto bad_cmd;
  868. switch (sd->state) {
  869. case sd_standby_state:
  870. break;
  871. default:
  872. break;
  873. }
  874. break;
  875. case 5: /* CMD5: reserved for SDIO cards */
  876. return sd_illegal;
  877. case 6: /* CMD6: SWITCH_FUNCTION */
  878. switch (sd->mode) {
  879. case sd_data_transfer_mode:
  880. sd_function_switch(sd, req.arg);
  881. sd->state = sd_sendingdata_state;
  882. sd->data_start = 0;
  883. sd->data_offset = 0;
  884. return sd_r1;
  885. default:
  886. break;
  887. }
  888. break;
  889. case 7: /* CMD7: SELECT/DESELECT_CARD */
  890. if (sd->spi)
  891. goto bad_cmd;
  892. switch (sd->state) {
  893. case sd_standby_state:
  894. if (sd->rca != rca)
  895. return sd_r0;
  896. sd->state = sd_transfer_state;
  897. return sd_r1b;
  898. case sd_transfer_state:
  899. case sd_sendingdata_state:
  900. if (sd->rca == rca)
  901. break;
  902. sd->state = sd_standby_state;
  903. return sd_r1b;
  904. case sd_disconnect_state:
  905. if (sd->rca != rca)
  906. return sd_r0;
  907. sd->state = sd_programming_state;
  908. return sd_r1b;
  909. case sd_programming_state:
  910. if (sd->rca == rca)
  911. break;
  912. sd->state = sd_disconnect_state;
  913. return sd_r1b;
  914. default:
  915. break;
  916. }
  917. break;
  918. case 8: /* CMD8: SEND_IF_COND */
  919. if (sd->spec_version < SD_PHY_SPECv2_00_VERS) {
  920. break;
  921. }
  922. if (sd->state != sd_idle_state) {
  923. break;
  924. }
  925. sd->vhs = 0;
  926. /* No response if not exactly one VHS bit is set. */
  927. if (!(req.arg >> 8) || (req.arg >> (ctz32(req.arg & ~0xff) + 1))) {
  928. return sd->spi ? sd_r7 : sd_r0;
  929. }
  930. /* Accept. */
  931. sd->vhs = req.arg;
  932. return sd_r7;
  933. case 9: /* CMD9: SEND_CSD */
  934. switch (sd->state) {
  935. case sd_standby_state:
  936. if (sd->rca != rca)
  937. return sd_r0;
  938. return sd_r2_s;
  939. case sd_transfer_state:
  940. if (!sd->spi)
  941. break;
  942. sd->state = sd_sendingdata_state;
  943. memcpy(sd->data, sd->csd, 16);
  944. sd->data_start = addr;
  945. sd->data_offset = 0;
  946. return sd_r1;
  947. default:
  948. break;
  949. }
  950. break;
  951. case 10: /* CMD10: SEND_CID */
  952. switch (sd->state) {
  953. case sd_standby_state:
  954. if (sd->rca != rca)
  955. return sd_r0;
  956. return sd_r2_i;
  957. case sd_transfer_state:
  958. if (!sd->spi)
  959. break;
  960. sd->state = sd_sendingdata_state;
  961. memcpy(sd->data, sd->cid, 16);
  962. sd->data_start = addr;
  963. sd->data_offset = 0;
  964. return sd_r1;
  965. default:
  966. break;
  967. }
  968. break;
  969. case 12: /* CMD12: STOP_TRANSMISSION */
  970. switch (sd->state) {
  971. case sd_sendingdata_state:
  972. sd->state = sd_transfer_state;
  973. return sd_r1b;
  974. case sd_receivingdata_state:
  975. sd->state = sd_programming_state;
  976. /* Bzzzzzzztt .... Operation complete. */
  977. sd->state = sd_transfer_state;
  978. return sd_r1b;
  979. default:
  980. break;
  981. }
  982. break;
  983. case 13: /* CMD13: SEND_STATUS */
  984. switch (sd->mode) {
  985. case sd_data_transfer_mode:
  986. if (sd->rca != rca)
  987. return sd_r0;
  988. return sd_r1;
  989. default:
  990. break;
  991. }
  992. break;
  993. case 15: /* CMD15: GO_INACTIVE_STATE */
  994. if (sd->spi)
  995. goto bad_cmd;
  996. switch (sd->mode) {
  997. case sd_data_transfer_mode:
  998. if (sd->rca != rca)
  999. return sd_r0;
  1000. sd->state = sd_inactive_state;
  1001. return sd_r0;
  1002. default:
  1003. break;
  1004. }
  1005. break;
  1006. /* Block read commands (Classs 2) */
  1007. case 16: /* CMD16: SET_BLOCKLEN */
  1008. switch (sd->state) {
  1009. case sd_transfer_state:
  1010. if (req.arg > (1 << HWBLOCK_SHIFT)) {
  1011. sd->card_status |= BLOCK_LEN_ERROR;
  1012. } else {
  1013. trace_sdcard_set_blocklen(req.arg);
  1014. sd->blk_len = req.arg;
  1015. }
  1016. return sd_r1;
  1017. default:
  1018. break;
  1019. }
  1020. break;
  1021. case 17: /* CMD17: READ_SINGLE_BLOCK */
  1022. switch (sd->state) {
  1023. case sd_transfer_state:
  1024. if (addr + sd->blk_len > sd->size) {
  1025. sd->card_status |= ADDRESS_ERROR;
  1026. return sd_r1;
  1027. }
  1028. sd->state = sd_sendingdata_state;
  1029. sd->data_start = addr;
  1030. sd->data_offset = 0;
  1031. return sd_r1;
  1032. default:
  1033. break;
  1034. }
  1035. break;
  1036. case 18: /* CMD18: READ_MULTIPLE_BLOCK */
  1037. switch (sd->state) {
  1038. case sd_transfer_state:
  1039. if (addr + sd->blk_len > sd->size) {
  1040. sd->card_status |= ADDRESS_ERROR;
  1041. return sd_r1;
  1042. }
  1043. sd->state = sd_sendingdata_state;
  1044. sd->data_start = addr;
  1045. sd->data_offset = 0;
  1046. return sd_r1;
  1047. default:
  1048. break;
  1049. }
  1050. break;
  1051. case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
  1052. if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
  1053. break;
  1054. }
  1055. if (sd->state == sd_transfer_state) {
  1056. sd->state = sd_sendingdata_state;
  1057. sd->data_offset = 0;
  1058. return sd_r1;
  1059. }
  1060. break;
  1061. case 23: /* CMD23: SET_BLOCK_COUNT */
  1062. if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
  1063. break;
  1064. }
  1065. switch (sd->state) {
  1066. case sd_transfer_state:
  1067. sd->multi_blk_cnt = req.arg;
  1068. return sd_r1;
  1069. default:
  1070. break;
  1071. }
  1072. break;
  1073. /* Block write commands (Class 4) */
  1074. case 24: /* CMD24: WRITE_SINGLE_BLOCK */
  1075. switch (sd->state) {
  1076. case sd_transfer_state:
  1077. /* Writing in SPI mode not implemented. */
  1078. if (sd->spi)
  1079. break;
  1080. if (addr + sd->blk_len > sd->size) {
  1081. sd->card_status |= ADDRESS_ERROR;
  1082. return sd_r1;
  1083. }
  1084. sd->state = sd_receivingdata_state;
  1085. sd->data_start = addr;
  1086. sd->data_offset = 0;
  1087. sd->blk_written = 0;
  1088. if (sd_wp_addr(sd, sd->data_start)) {
  1089. sd->card_status |= WP_VIOLATION;
  1090. }
  1091. if (sd->csd[14] & 0x30) {
  1092. sd->card_status |= WP_VIOLATION;
  1093. }
  1094. return sd_r1;
  1095. default:
  1096. break;
  1097. }
  1098. break;
  1099. case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
  1100. switch (sd->state) {
  1101. case sd_transfer_state:
  1102. /* Writing in SPI mode not implemented. */
  1103. if (sd->spi)
  1104. break;
  1105. if (addr + sd->blk_len > sd->size) {
  1106. sd->card_status |= ADDRESS_ERROR;
  1107. return sd_r1;
  1108. }
  1109. sd->state = sd_receivingdata_state;
  1110. sd->data_start = addr;
  1111. sd->data_offset = 0;
  1112. sd->blk_written = 0;
  1113. if (sd_wp_addr(sd, sd->data_start)) {
  1114. sd->card_status |= WP_VIOLATION;
  1115. }
  1116. if (sd->csd[14] & 0x30) {
  1117. sd->card_status |= WP_VIOLATION;
  1118. }
  1119. return sd_r1;
  1120. default:
  1121. break;
  1122. }
  1123. break;
  1124. case 26: /* CMD26: PROGRAM_CID */
  1125. if (sd->spi)
  1126. goto bad_cmd;
  1127. switch (sd->state) {
  1128. case sd_transfer_state:
  1129. sd->state = sd_receivingdata_state;
  1130. sd->data_start = 0;
  1131. sd->data_offset = 0;
  1132. return sd_r1;
  1133. default:
  1134. break;
  1135. }
  1136. break;
  1137. case 27: /* CMD27: PROGRAM_CSD */
  1138. switch (sd->state) {
  1139. case sd_transfer_state:
  1140. sd->state = sd_receivingdata_state;
  1141. sd->data_start = 0;
  1142. sd->data_offset = 0;
  1143. return sd_r1;
  1144. default:
  1145. break;
  1146. }
  1147. break;
  1148. /* Write protection (Class 6) */
  1149. case 28: /* CMD28: SET_WRITE_PROT */
  1150. switch (sd->state) {
  1151. case sd_transfer_state:
  1152. if (addr >= sd->size) {
  1153. sd->card_status |= ADDRESS_ERROR;
  1154. return sd_r1b;
  1155. }
  1156. sd->state = sd_programming_state;
  1157. set_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
  1158. /* Bzzzzzzztt .... Operation complete. */
  1159. sd->state = sd_transfer_state;
  1160. return sd_r1b;
  1161. default:
  1162. break;
  1163. }
  1164. break;
  1165. case 29: /* CMD29: CLR_WRITE_PROT */
  1166. switch (sd->state) {
  1167. case sd_transfer_state:
  1168. if (addr >= sd->size) {
  1169. sd->card_status |= ADDRESS_ERROR;
  1170. return sd_r1b;
  1171. }
  1172. sd->state = sd_programming_state;
  1173. clear_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
  1174. /* Bzzzzzzztt .... Operation complete. */
  1175. sd->state = sd_transfer_state;
  1176. return sd_r1b;
  1177. default:
  1178. break;
  1179. }
  1180. break;
  1181. case 30: /* CMD30: SEND_WRITE_PROT */
  1182. switch (sd->state) {
  1183. case sd_transfer_state:
  1184. sd->state = sd_sendingdata_state;
  1185. *(uint32_t *) sd->data = sd_wpbits(sd, req.arg);
  1186. sd->data_start = addr;
  1187. sd->data_offset = 0;
  1188. return sd_r1b;
  1189. default:
  1190. break;
  1191. }
  1192. break;
  1193. /* Erase commands (Class 5) */
  1194. case 32: /* CMD32: ERASE_WR_BLK_START */
  1195. switch (sd->state) {
  1196. case sd_transfer_state:
  1197. sd->erase_start = req.arg;
  1198. return sd_r1;
  1199. default:
  1200. break;
  1201. }
  1202. break;
  1203. case 33: /* CMD33: ERASE_WR_BLK_END */
  1204. switch (sd->state) {
  1205. case sd_transfer_state:
  1206. sd->erase_end = req.arg;
  1207. return sd_r1;
  1208. default:
  1209. break;
  1210. }
  1211. break;
  1212. case 38: /* CMD38: ERASE */
  1213. switch (sd->state) {
  1214. case sd_transfer_state:
  1215. if (sd->csd[14] & 0x30) {
  1216. sd->card_status |= WP_VIOLATION;
  1217. return sd_r1b;
  1218. }
  1219. sd->state = sd_programming_state;
  1220. sd_erase(sd);
  1221. /* Bzzzzzzztt .... Operation complete. */
  1222. sd->state = sd_transfer_state;
  1223. return sd_r1b;
  1224. default:
  1225. break;
  1226. }
  1227. break;
  1228. /* Lock card commands (Class 7) */
  1229. case 42: /* CMD42: LOCK_UNLOCK */
  1230. switch (sd->state) {
  1231. case sd_transfer_state:
  1232. sd->state = sd_receivingdata_state;
  1233. sd->data_start = 0;
  1234. sd->data_offset = 0;
  1235. return sd_r1;
  1236. default:
  1237. break;
  1238. }
  1239. break;
  1240. case 52 ... 54:
  1241. /* CMD52, CMD53, CMD54: reserved for SDIO cards
  1242. * (see the SDIO Simplified Specification V2.0)
  1243. * Handle as illegal command but do not complain
  1244. * on stderr, as some OSes may use these in their
  1245. * probing for presence of an SDIO card.
  1246. */
  1247. return sd_illegal;
  1248. /* Application specific commands (Class 8) */
  1249. case 55: /* CMD55: APP_CMD */
  1250. switch (sd->state) {
  1251. case sd_ready_state:
  1252. case sd_identification_state:
  1253. case sd_inactive_state:
  1254. return sd_illegal;
  1255. case sd_idle_state:
  1256. if (rca) {
  1257. qemu_log_mask(LOG_GUEST_ERROR,
  1258. "SD: illegal RCA 0x%04x for APP_CMD\n", req.cmd);
  1259. }
  1260. default:
  1261. break;
  1262. }
  1263. if (!sd->spi) {
  1264. if (sd->rca != rca) {
  1265. return sd_r0;
  1266. }
  1267. }
  1268. sd->expecting_acmd = true;
  1269. sd->card_status |= APP_CMD;
  1270. return sd_r1;
  1271. case 56: /* CMD56: GEN_CMD */
  1272. switch (sd->state) {
  1273. case sd_transfer_state:
  1274. sd->data_offset = 0;
  1275. if (req.arg & 1)
  1276. sd->state = sd_sendingdata_state;
  1277. else
  1278. sd->state = sd_receivingdata_state;
  1279. return sd_r1;
  1280. default:
  1281. break;
  1282. }
  1283. break;
  1284. case 58: /* CMD58: READ_OCR (SPI) */
  1285. if (!sd->spi) {
  1286. goto bad_cmd;
  1287. }
  1288. return sd_r3;
  1289. case 59: /* CMD59: CRC_ON_OFF (SPI) */
  1290. if (!sd->spi) {
  1291. goto bad_cmd;
  1292. }
  1293. goto unimplemented_spi_cmd;
  1294. default:
  1295. bad_cmd:
  1296. qemu_log_mask(LOG_GUEST_ERROR, "SD: Unknown CMD%i\n", req.cmd);
  1297. return sd_illegal;
  1298. unimplemented_spi_cmd:
  1299. /* Commands that are recognised but not yet implemented in SPI mode. */
  1300. qemu_log_mask(LOG_UNIMP, "SD: CMD%i not implemented in SPI mode\n",
  1301. req.cmd);
  1302. return sd_illegal;
  1303. }
  1304. qemu_log_mask(LOG_GUEST_ERROR, "SD: CMD%i in a wrong state\n", req.cmd);
  1305. return sd_illegal;
  1306. }
  1307. static sd_rsp_type_t sd_app_command(SDState *sd,
  1308. SDRequest req)
  1309. {
  1310. trace_sdcard_app_command(sd->proto_name, sd_acmd_name(req.cmd),
  1311. req.cmd, req.arg, sd_state_name(sd->state));
  1312. sd->card_status |= APP_CMD;
  1313. switch (req.cmd) {
  1314. case 6: /* ACMD6: SET_BUS_WIDTH */
  1315. if (sd->spi) {
  1316. goto unimplemented_spi_cmd;
  1317. }
  1318. switch (sd->state) {
  1319. case sd_transfer_state:
  1320. sd->sd_status[0] &= 0x3f;
  1321. sd->sd_status[0] |= (req.arg & 0x03) << 6;
  1322. return sd_r1;
  1323. default:
  1324. break;
  1325. }
  1326. break;
  1327. case 13: /* ACMD13: SD_STATUS */
  1328. switch (sd->state) {
  1329. case sd_transfer_state:
  1330. sd->state = sd_sendingdata_state;
  1331. sd->data_start = 0;
  1332. sd->data_offset = 0;
  1333. return sd_r1;
  1334. default:
  1335. break;
  1336. }
  1337. break;
  1338. case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */
  1339. switch (sd->state) {
  1340. case sd_transfer_state:
  1341. *(uint32_t *) sd->data = sd->blk_written;
  1342. sd->state = sd_sendingdata_state;
  1343. sd->data_start = 0;
  1344. sd->data_offset = 0;
  1345. return sd_r1;
  1346. default:
  1347. break;
  1348. }
  1349. break;
  1350. case 23: /* ACMD23: SET_WR_BLK_ERASE_COUNT */
  1351. switch (sd->state) {
  1352. case sd_transfer_state:
  1353. return sd_r1;
  1354. default:
  1355. break;
  1356. }
  1357. break;
  1358. case 41: /* ACMD41: SD_APP_OP_COND */
  1359. if (sd->spi) {
  1360. /* SEND_OP_CMD */
  1361. sd->state = sd_transfer_state;
  1362. return sd_r1;
  1363. }
  1364. if (sd->state != sd_idle_state) {
  1365. break;
  1366. }
  1367. /* If it's the first ACMD41 since reset, we need to decide
  1368. * whether to power up. If this is not an enquiry ACMD41,
  1369. * we immediately report power on and proceed below to the
  1370. * ready state, but if it is, we set a timer to model a
  1371. * delay for power up. This works around a bug in EDK2
  1372. * UEFI, which sends an initial enquiry ACMD41, but
  1373. * assumes that the card is in ready state as soon as it
  1374. * sees the power up bit set. */
  1375. if (!FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP)) {
  1376. if ((req.arg & ACMD41_ENQUIRY_MASK) != 0) {
  1377. timer_del(sd->ocr_power_timer);
  1378. sd_ocr_powerup(sd);
  1379. } else {
  1380. trace_sdcard_inquiry_cmd41();
  1381. if (!timer_pending(sd->ocr_power_timer)) {
  1382. timer_mod_ns(sd->ocr_power_timer,
  1383. (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
  1384. + OCR_POWER_DELAY_NS));
  1385. }
  1386. }
  1387. }
  1388. if (FIELD_EX32(sd->ocr & req.arg, OCR, VDD_VOLTAGE_WINDOW)) {
  1389. /* We accept any voltage. 10000 V is nothing.
  1390. *
  1391. * Once we're powered up, we advance straight to ready state
  1392. * unless it's an enquiry ACMD41 (bits 23:0 == 0).
  1393. */
  1394. sd->state = sd_ready_state;
  1395. }
  1396. return sd_r3;
  1397. case 42: /* ACMD42: SET_CLR_CARD_DETECT */
  1398. switch (sd->state) {
  1399. case sd_transfer_state:
  1400. /* Bringing in the 50KOhm pull-up resistor... Done. */
  1401. return sd_r1;
  1402. default:
  1403. break;
  1404. }
  1405. break;
  1406. case 51: /* ACMD51: SEND_SCR */
  1407. switch (sd->state) {
  1408. case sd_transfer_state:
  1409. sd->state = sd_sendingdata_state;
  1410. sd->data_start = 0;
  1411. sd->data_offset = 0;
  1412. return sd_r1;
  1413. default:
  1414. break;
  1415. }
  1416. break;
  1417. case 18: /* Reserved for SD security applications */
  1418. case 25:
  1419. case 26:
  1420. case 38:
  1421. case 43 ... 49:
  1422. /* Refer to the "SD Specifications Part3 Security Specification" for
  1423. * information about the SD Security Features.
  1424. */
  1425. qemu_log_mask(LOG_UNIMP, "SD: CMD%i Security not implemented\n",
  1426. req.cmd);
  1427. return sd_illegal;
  1428. default:
  1429. /* Fall back to standard commands. */
  1430. return sd_normal_command(sd, req);
  1431. unimplemented_spi_cmd:
  1432. /* Commands that are recognised but not yet implemented in SPI mode. */
  1433. qemu_log_mask(LOG_UNIMP, "SD: CMD%i not implemented in SPI mode\n",
  1434. req.cmd);
  1435. return sd_illegal;
  1436. }
  1437. qemu_log_mask(LOG_GUEST_ERROR, "SD: ACMD%i in a wrong state\n", req.cmd);
  1438. return sd_illegal;
  1439. }
  1440. static int cmd_valid_while_locked(SDState *sd, SDRequest *req)
  1441. {
  1442. /* Valid commands in locked state:
  1443. * basic class (0)
  1444. * lock card class (7)
  1445. * CMD16
  1446. * implicitly, the ACMD prefix CMD55
  1447. * ACMD41 and ACMD42
  1448. * Anything else provokes an "illegal command" response.
  1449. */
  1450. if (sd->expecting_acmd) {
  1451. return req->cmd == 41 || req->cmd == 42;
  1452. }
  1453. if (req->cmd == 16 || req->cmd == 55) {
  1454. return 1;
  1455. }
  1456. return sd_cmd_class[req->cmd] == 0
  1457. || sd_cmd_class[req->cmd] == 7;
  1458. }
  1459. int sd_do_command(SDState *sd, SDRequest *req,
  1460. uint8_t *response) {
  1461. int last_state;
  1462. sd_rsp_type_t rtype;
  1463. int rsplen;
  1464. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable) {
  1465. return 0;
  1466. }
  1467. if (sd_req_crc_validate(req)) {
  1468. sd->card_status |= COM_CRC_ERROR;
  1469. rtype = sd_illegal;
  1470. goto send_response;
  1471. }
  1472. if (req->cmd >= SDMMC_CMD_MAX) {
  1473. qemu_log_mask(LOG_GUEST_ERROR, "SD: incorrect command 0x%02x\n",
  1474. req->cmd);
  1475. req->cmd &= 0x3f;
  1476. }
  1477. if (sd->card_status & CARD_IS_LOCKED) {
  1478. if (!cmd_valid_while_locked(sd, req)) {
  1479. sd->card_status |= ILLEGAL_COMMAND;
  1480. sd->expecting_acmd = false;
  1481. qemu_log_mask(LOG_GUEST_ERROR, "SD: Card is locked\n");
  1482. rtype = sd_illegal;
  1483. goto send_response;
  1484. }
  1485. }
  1486. last_state = sd->state;
  1487. sd_set_mode(sd);
  1488. if (sd->expecting_acmd) {
  1489. sd->expecting_acmd = false;
  1490. rtype = sd_app_command(sd, *req);
  1491. } else {
  1492. rtype = sd_normal_command(sd, *req);
  1493. }
  1494. if (rtype == sd_illegal) {
  1495. sd->card_status |= ILLEGAL_COMMAND;
  1496. } else {
  1497. /* Valid command, we can update the 'state before command' bits.
  1498. * (Do this now so they appear in r1 responses.)
  1499. */
  1500. sd->current_cmd = req->cmd;
  1501. sd->card_status &= ~CURRENT_STATE;
  1502. sd->card_status |= (last_state << 9);
  1503. }
  1504. send_response:
  1505. switch (rtype) {
  1506. case sd_r1:
  1507. case sd_r1b:
  1508. sd_response_r1_make(sd, response);
  1509. rsplen = 4;
  1510. break;
  1511. case sd_r2_i:
  1512. memcpy(response, sd->cid, sizeof(sd->cid));
  1513. rsplen = 16;
  1514. break;
  1515. case sd_r2_s:
  1516. memcpy(response, sd->csd, sizeof(sd->csd));
  1517. rsplen = 16;
  1518. break;
  1519. case sd_r3:
  1520. sd_response_r3_make(sd, response);
  1521. rsplen = 4;
  1522. break;
  1523. case sd_r6:
  1524. sd_response_r6_make(sd, response);
  1525. rsplen = 4;
  1526. break;
  1527. case sd_r7:
  1528. sd_response_r7_make(sd, response);
  1529. rsplen = 4;
  1530. break;
  1531. case sd_r0:
  1532. case sd_illegal:
  1533. rsplen = 0;
  1534. break;
  1535. default:
  1536. g_assert_not_reached();
  1537. }
  1538. trace_sdcard_response(sd_response_name(rtype), rsplen);
  1539. if (rtype != sd_illegal) {
  1540. /* Clear the "clear on valid command" status bits now we've
  1541. * sent any response
  1542. */
  1543. sd->card_status &= ~CARD_STATUS_B;
  1544. }
  1545. #ifdef DEBUG_SD
  1546. qemu_hexdump(stderr, "Response", response, rsplen);
  1547. #endif
  1548. return rsplen;
  1549. }
  1550. static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len)
  1551. {
  1552. trace_sdcard_read_block(addr, len);
  1553. if (!sd->blk || blk_pread(sd->blk, addr, sd->data, len) < 0) {
  1554. fprintf(stderr, "sd_blk_read: read error on host side\n");
  1555. }
  1556. }
  1557. static void sd_blk_write(SDState *sd, uint64_t addr, uint32_t len)
  1558. {
  1559. trace_sdcard_write_block(addr, len);
  1560. if (!sd->blk || blk_pwrite(sd->blk, addr, sd->data, len, 0) < 0) {
  1561. fprintf(stderr, "sd_blk_write: write error on host side\n");
  1562. }
  1563. }
  1564. #define BLK_READ_BLOCK(a, len) sd_blk_read(sd, a, len)
  1565. #define BLK_WRITE_BLOCK(a, len) sd_blk_write(sd, a, len)
  1566. #define APP_READ_BLOCK(a, len) memset(sd->data, 0xec, len)
  1567. #define APP_WRITE_BLOCK(a, len)
  1568. void sd_write_byte(SDState *sd, uint8_t value)
  1569. {
  1570. int i;
  1571. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable)
  1572. return;
  1573. if (sd->state != sd_receivingdata_state) {
  1574. qemu_log_mask(LOG_GUEST_ERROR,
  1575. "%s: not in Receiving-Data state\n", __func__);
  1576. return;
  1577. }
  1578. if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION))
  1579. return;
  1580. trace_sdcard_write_data(sd->proto_name,
  1581. sd_acmd_name(sd->current_cmd),
  1582. sd->current_cmd, value);
  1583. switch (sd->current_cmd) {
  1584. case 24: /* CMD24: WRITE_SINGLE_BLOCK */
  1585. sd->data[sd->data_offset ++] = value;
  1586. if (sd->data_offset >= sd->blk_len) {
  1587. /* TODO: Check CRC before committing */
  1588. sd->state = sd_programming_state;
  1589. BLK_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1590. sd->blk_written ++;
  1591. sd->csd[14] |= 0x40;
  1592. /* Bzzzzzzztt .... Operation complete. */
  1593. sd->state = sd_transfer_state;
  1594. }
  1595. break;
  1596. case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
  1597. if (sd->data_offset == 0) {
  1598. /* Start of the block - let's check the address is valid */
  1599. if (sd->data_start + sd->blk_len > sd->size) {
  1600. sd->card_status |= ADDRESS_ERROR;
  1601. break;
  1602. }
  1603. if (sd_wp_addr(sd, sd->data_start)) {
  1604. sd->card_status |= WP_VIOLATION;
  1605. break;
  1606. }
  1607. }
  1608. sd->data[sd->data_offset++] = value;
  1609. if (sd->data_offset >= sd->blk_len) {
  1610. /* TODO: Check CRC before committing */
  1611. sd->state = sd_programming_state;
  1612. BLK_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1613. sd->blk_written++;
  1614. sd->data_start += sd->blk_len;
  1615. sd->data_offset = 0;
  1616. sd->csd[14] |= 0x40;
  1617. /* Bzzzzzzztt .... Operation complete. */
  1618. if (sd->multi_blk_cnt != 0) {
  1619. if (--sd->multi_blk_cnt == 0) {
  1620. /* Stop! */
  1621. sd->state = sd_transfer_state;
  1622. break;
  1623. }
  1624. }
  1625. sd->state = sd_receivingdata_state;
  1626. }
  1627. break;
  1628. case 26: /* CMD26: PROGRAM_CID */
  1629. sd->data[sd->data_offset ++] = value;
  1630. if (sd->data_offset >= sizeof(sd->cid)) {
  1631. /* TODO: Check CRC before committing */
  1632. sd->state = sd_programming_state;
  1633. for (i = 0; i < sizeof(sd->cid); i ++)
  1634. if ((sd->cid[i] | 0x00) != sd->data[i])
  1635. sd->card_status |= CID_CSD_OVERWRITE;
  1636. if (!(sd->card_status & CID_CSD_OVERWRITE))
  1637. for (i = 0; i < sizeof(sd->cid); i ++) {
  1638. sd->cid[i] |= 0x00;
  1639. sd->cid[i] &= sd->data[i];
  1640. }
  1641. /* Bzzzzzzztt .... Operation complete. */
  1642. sd->state = sd_transfer_state;
  1643. }
  1644. break;
  1645. case 27: /* CMD27: PROGRAM_CSD */
  1646. sd->data[sd->data_offset ++] = value;
  1647. if (sd->data_offset >= sizeof(sd->csd)) {
  1648. /* TODO: Check CRC before committing */
  1649. sd->state = sd_programming_state;
  1650. for (i = 0; i < sizeof(sd->csd); i ++)
  1651. if ((sd->csd[i] | sd_csd_rw_mask[i]) !=
  1652. (sd->data[i] | sd_csd_rw_mask[i]))
  1653. sd->card_status |= CID_CSD_OVERWRITE;
  1654. /* Copy flag (OTP) & Permanent write protect */
  1655. if (sd->csd[14] & ~sd->data[14] & 0x60)
  1656. sd->card_status |= CID_CSD_OVERWRITE;
  1657. if (!(sd->card_status & CID_CSD_OVERWRITE))
  1658. for (i = 0; i < sizeof(sd->csd); i ++) {
  1659. sd->csd[i] |= sd_csd_rw_mask[i];
  1660. sd->csd[i] &= sd->data[i];
  1661. }
  1662. /* Bzzzzzzztt .... Operation complete. */
  1663. sd->state = sd_transfer_state;
  1664. }
  1665. break;
  1666. case 42: /* CMD42: LOCK_UNLOCK */
  1667. sd->data[sd->data_offset ++] = value;
  1668. if (sd->data_offset >= sd->blk_len) {
  1669. /* TODO: Check CRC before committing */
  1670. sd->state = sd_programming_state;
  1671. sd_lock_command(sd);
  1672. /* Bzzzzzzztt .... Operation complete. */
  1673. sd->state = sd_transfer_state;
  1674. }
  1675. break;
  1676. case 56: /* CMD56: GEN_CMD */
  1677. sd->data[sd->data_offset ++] = value;
  1678. if (sd->data_offset >= sd->blk_len) {
  1679. APP_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1680. sd->state = sd_transfer_state;
  1681. }
  1682. break;
  1683. default:
  1684. qemu_log_mask(LOG_GUEST_ERROR, "%s: unknown command\n", __func__);
  1685. break;
  1686. }
  1687. }
  1688. #define SD_TUNING_BLOCK_SIZE 64
  1689. static const uint8_t sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = {
  1690. /* See: Physical Layer Simplified Specification Version 3.01, Table 4-2 */
  1691. 0xff, 0x0f, 0xff, 0x00, 0x0f, 0xfc, 0xc3, 0xcc,
  1692. 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
  1693. 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
  1694. 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
  1695. 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
  1696. 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
  1697. 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
  1698. 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
  1699. };
  1700. uint8_t sd_read_byte(SDState *sd)
  1701. {
  1702. /* TODO: Append CRCs */
  1703. uint8_t ret;
  1704. int io_len;
  1705. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable)
  1706. return 0x00;
  1707. if (sd->state != sd_sendingdata_state) {
  1708. qemu_log_mask(LOG_GUEST_ERROR,
  1709. "%s: not in Sending-Data state\n", __func__);
  1710. return 0x00;
  1711. }
  1712. if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION))
  1713. return 0x00;
  1714. io_len = (sd->ocr & (1 << 30)) ? 512 : sd->blk_len;
  1715. trace_sdcard_read_data(sd->proto_name,
  1716. sd_acmd_name(sd->current_cmd),
  1717. sd->current_cmd, io_len);
  1718. switch (sd->current_cmd) {
  1719. case 6: /* CMD6: SWITCH_FUNCTION */
  1720. ret = sd->data[sd->data_offset ++];
  1721. if (sd->data_offset >= 64)
  1722. sd->state = sd_transfer_state;
  1723. break;
  1724. case 9: /* CMD9: SEND_CSD */
  1725. case 10: /* CMD10: SEND_CID */
  1726. ret = sd->data[sd->data_offset ++];
  1727. if (sd->data_offset >= 16)
  1728. sd->state = sd_transfer_state;
  1729. break;
  1730. case 13: /* ACMD13: SD_STATUS */
  1731. ret = sd->sd_status[sd->data_offset ++];
  1732. if (sd->data_offset >= sizeof(sd->sd_status))
  1733. sd->state = sd_transfer_state;
  1734. break;
  1735. case 17: /* CMD17: READ_SINGLE_BLOCK */
  1736. if (sd->data_offset == 0)
  1737. BLK_READ_BLOCK(sd->data_start, io_len);
  1738. ret = sd->data[sd->data_offset ++];
  1739. if (sd->data_offset >= io_len)
  1740. sd->state = sd_transfer_state;
  1741. break;
  1742. case 18: /* CMD18: READ_MULTIPLE_BLOCK */
  1743. if (sd->data_offset == 0) {
  1744. if (sd->data_start + io_len > sd->size) {
  1745. sd->card_status |= ADDRESS_ERROR;
  1746. return 0x00;
  1747. }
  1748. BLK_READ_BLOCK(sd->data_start, io_len);
  1749. }
  1750. ret = sd->data[sd->data_offset ++];
  1751. if (sd->data_offset >= io_len) {
  1752. sd->data_start += io_len;
  1753. sd->data_offset = 0;
  1754. if (sd->multi_blk_cnt != 0) {
  1755. if (--sd->multi_blk_cnt == 0) {
  1756. /* Stop! */
  1757. sd->state = sd_transfer_state;
  1758. break;
  1759. }
  1760. }
  1761. }
  1762. break;
  1763. case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
  1764. if (sd->data_offset >= SD_TUNING_BLOCK_SIZE - 1) {
  1765. sd->state = sd_transfer_state;
  1766. }
  1767. ret = sd_tuning_block_pattern[sd->data_offset++];
  1768. break;
  1769. case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */
  1770. ret = sd->data[sd->data_offset ++];
  1771. if (sd->data_offset >= 4)
  1772. sd->state = sd_transfer_state;
  1773. break;
  1774. case 30: /* CMD30: SEND_WRITE_PROT */
  1775. ret = sd->data[sd->data_offset ++];
  1776. if (sd->data_offset >= 4)
  1777. sd->state = sd_transfer_state;
  1778. break;
  1779. case 51: /* ACMD51: SEND_SCR */
  1780. ret = sd->scr[sd->data_offset ++];
  1781. if (sd->data_offset >= sizeof(sd->scr))
  1782. sd->state = sd_transfer_state;
  1783. break;
  1784. case 56: /* CMD56: GEN_CMD */
  1785. if (sd->data_offset == 0)
  1786. APP_READ_BLOCK(sd->data_start, sd->blk_len);
  1787. ret = sd->data[sd->data_offset ++];
  1788. if (sd->data_offset >= sd->blk_len)
  1789. sd->state = sd_transfer_state;
  1790. break;
  1791. default:
  1792. qemu_log_mask(LOG_GUEST_ERROR, "%s: unknown command\n", __func__);
  1793. return 0x00;
  1794. }
  1795. return ret;
  1796. }
  1797. static bool sd_data_ready(SDState *sd)
  1798. {
  1799. return sd->state == sd_sendingdata_state;
  1800. }
  1801. void sd_enable(SDState *sd, bool enable)
  1802. {
  1803. sd->enable = enable;
  1804. }
  1805. static void sd_instance_init(Object *obj)
  1806. {
  1807. SDState *sd = SD_CARD(obj);
  1808. sd->enable = true;
  1809. sd->ocr_power_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sd_ocr_powerup, sd);
  1810. }
  1811. static void sd_instance_finalize(Object *obj)
  1812. {
  1813. SDState *sd = SD_CARD(obj);
  1814. timer_del(sd->ocr_power_timer);
  1815. timer_free(sd->ocr_power_timer);
  1816. }
  1817. static void sd_realize(DeviceState *dev, Error **errp)
  1818. {
  1819. SDState *sd = SD_CARD(dev);
  1820. int ret;
  1821. sd->proto_name = sd->spi ? "SPI" : "SD";
  1822. switch (sd->spec_version) {
  1823. case SD_PHY_SPECv1_10_VERS
  1824. ... SD_PHY_SPECv3_01_VERS:
  1825. break;
  1826. default:
  1827. error_setg(errp, "Invalid SD card Spec version: %u", sd->spec_version);
  1828. return;
  1829. }
  1830. if (sd->blk) {
  1831. int64_t blk_size;
  1832. if (blk_is_read_only(sd->blk)) {
  1833. error_setg(errp, "Cannot use read-only drive as SD card");
  1834. return;
  1835. }
  1836. blk_size = blk_getlength(sd->blk);
  1837. if (blk_size > 0 && !is_power_of_2(blk_size)) {
  1838. int64_t blk_size_aligned = pow2ceil(blk_size);
  1839. char *blk_size_str;
  1840. blk_size_str = size_to_str(blk_size);
  1841. error_setg(errp, "Invalid SD card size: %s", blk_size_str);
  1842. g_free(blk_size_str);
  1843. blk_size_str = size_to_str(blk_size_aligned);
  1844. error_append_hint(errp,
  1845. "SD card size has to be a power of 2, e.g. %s.\n"
  1846. "You can resize disk images with"
  1847. " 'qemu-img resize <imagefile> <new-size>'\n"
  1848. "(note that this will lose data if you make the"
  1849. " image smaller than it currently is).\n",
  1850. blk_size_str);
  1851. g_free(blk_size_str);
  1852. return;
  1853. }
  1854. ret = blk_set_perm(sd->blk, BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE,
  1855. BLK_PERM_ALL, errp);
  1856. if (ret < 0) {
  1857. return;
  1858. }
  1859. blk_set_dev_ops(sd->blk, &sd_block_ops, sd);
  1860. }
  1861. }
  1862. static Property sd_properties[] = {
  1863. DEFINE_PROP_UINT8("spec_version", SDState,
  1864. spec_version, SD_PHY_SPECv2_00_VERS),
  1865. DEFINE_PROP_DRIVE("drive", SDState, blk),
  1866. /* We do not model the chip select pin, so allow the board to select
  1867. * whether card should be in SSI or MMC/SD mode. It is also up to the
  1868. * board to ensure that ssi transfers only occur when the chip select
  1869. * is asserted. */
  1870. DEFINE_PROP_BOOL("spi", SDState, spi, false),
  1871. DEFINE_PROP_END_OF_LIST()
  1872. };
  1873. static void sd_class_init(ObjectClass *klass, void *data)
  1874. {
  1875. DeviceClass *dc = DEVICE_CLASS(klass);
  1876. SDCardClass *sc = SD_CARD_CLASS(klass);
  1877. dc->realize = sd_realize;
  1878. device_class_set_props(dc, sd_properties);
  1879. dc->vmsd = &sd_vmstate;
  1880. dc->reset = sd_reset;
  1881. dc->bus_type = TYPE_SD_BUS;
  1882. set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
  1883. sc->set_voltage = sd_set_voltage;
  1884. sc->get_dat_lines = sd_get_dat_lines;
  1885. sc->get_cmd_line = sd_get_cmd_line;
  1886. sc->do_command = sd_do_command;
  1887. sc->write_byte = sd_write_byte;
  1888. sc->read_byte = sd_read_byte;
  1889. sc->data_ready = sd_data_ready;
  1890. sc->enable = sd_enable;
  1891. sc->get_inserted = sd_get_inserted;
  1892. sc->get_readonly = sd_get_readonly;
  1893. }
  1894. static const TypeInfo sd_info = {
  1895. .name = TYPE_SD_CARD,
  1896. .parent = TYPE_DEVICE,
  1897. .instance_size = sizeof(SDState),
  1898. .class_size = sizeof(SDCardClass),
  1899. .class_init = sd_class_init,
  1900. .instance_init = sd_instance_init,
  1901. .instance_finalize = sd_instance_finalize,
  1902. };
  1903. static void sd_register_types(void)
  1904. {
  1905. type_register_static(&sd_info);
  1906. }
  1907. type_init(sd_register_types)