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boot.c 8.9 KB

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  1. /*
  2. * QEMU RISC-V Boot Helper
  3. *
  4. * Copyright (c) 2017 SiFive, Inc.
  5. * Copyright (c) 2019 Alistair Francis <alistair.francis@wdc.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2 or later, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "qemu/osdep.h"
  20. #include "qemu-common.h"
  21. #include "qemu/units.h"
  22. #include "qemu/error-report.h"
  23. #include "exec/cpu-defs.h"
  24. #include "hw/boards.h"
  25. #include "hw/loader.h"
  26. #include "hw/riscv/boot.h"
  27. #include "hw/riscv/boot_opensbi.h"
  28. #include "elf.h"
  29. #include "sysemu/device_tree.h"
  30. #include "sysemu/qtest.h"
  31. #include <libfdt.h>
  32. #if defined(TARGET_RISCV32)
  33. # define KERNEL_BOOT_ADDRESS 0x80400000
  34. #define fw_dynamic_info_data(__val) cpu_to_le32(__val)
  35. #else
  36. # define KERNEL_BOOT_ADDRESS 0x80200000
  37. #define fw_dynamic_info_data(__val) cpu_to_le64(__val)
  38. #endif
  39. void riscv_find_and_load_firmware(MachineState *machine,
  40. const char *default_machine_firmware,
  41. hwaddr firmware_load_addr,
  42. symbol_fn_t sym_cb)
  43. {
  44. char *firmware_filename = NULL;
  45. if ((!machine->firmware) || (!strcmp(machine->firmware, "default"))) {
  46. /*
  47. * The user didn't specify -bios, or has specified "-bios default".
  48. * That means we are going to load the OpenSBI binary included in
  49. * the QEMU source.
  50. */
  51. firmware_filename = riscv_find_firmware(default_machine_firmware);
  52. } else if (strcmp(machine->firmware, "none")) {
  53. firmware_filename = riscv_find_firmware(machine->firmware);
  54. }
  55. if (firmware_filename) {
  56. /* If not "none" load the firmware */
  57. riscv_load_firmware(firmware_filename, firmware_load_addr, sym_cb);
  58. g_free(firmware_filename);
  59. }
  60. }
  61. char *riscv_find_firmware(const char *firmware_filename)
  62. {
  63. char *filename;
  64. filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware_filename);
  65. if (filename == NULL) {
  66. if (!qtest_enabled()) {
  67. /*
  68. * We only ship plain binary bios images in the QEMU source.
  69. * With Spike machine that uses ELF images as the default bios,
  70. * running QEMU test will complain hence let's suppress the error
  71. * report for QEMU testing.
  72. */
  73. error_report("Unable to load the RISC-V firmware \"%s\"",
  74. firmware_filename);
  75. exit(1);
  76. }
  77. }
  78. return filename;
  79. }
  80. target_ulong riscv_load_firmware(const char *firmware_filename,
  81. hwaddr firmware_load_addr,
  82. symbol_fn_t sym_cb)
  83. {
  84. uint64_t firmware_entry;
  85. if (load_elf_ram_sym(firmware_filename, NULL, NULL, NULL,
  86. &firmware_entry, NULL, NULL, NULL,
  87. 0, EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
  88. return firmware_entry;
  89. }
  90. if (load_image_targphys_as(firmware_filename, firmware_load_addr,
  91. ram_size, NULL) > 0) {
  92. return firmware_load_addr;
  93. }
  94. error_report("could not load firmware '%s'", firmware_filename);
  95. exit(1);
  96. }
  97. target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb)
  98. {
  99. uint64_t kernel_entry;
  100. if (load_elf_ram_sym(kernel_filename, NULL, NULL, NULL,
  101. &kernel_entry, NULL, NULL, NULL, 0,
  102. EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
  103. return kernel_entry;
  104. }
  105. if (load_uimage_as(kernel_filename, &kernel_entry, NULL, NULL,
  106. NULL, NULL, NULL) > 0) {
  107. return kernel_entry;
  108. }
  109. if (load_image_targphys_as(kernel_filename, KERNEL_BOOT_ADDRESS,
  110. ram_size, NULL) > 0) {
  111. return KERNEL_BOOT_ADDRESS;
  112. }
  113. error_report("could not load kernel '%s'", kernel_filename);
  114. exit(1);
  115. }
  116. hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size,
  117. uint64_t kernel_entry, hwaddr *start)
  118. {
  119. int size;
  120. /*
  121. * We want to put the initrd far enough into RAM that when the
  122. * kernel is uncompressed it will not clobber the initrd. However
  123. * on boards without much RAM we must ensure that we still leave
  124. * enough room for a decent sized initrd, and on boards with large
  125. * amounts of RAM we must avoid the initrd being so far up in RAM
  126. * that it is outside lowmem and inaccessible to the kernel.
  127. * So for boards with less than 256MB of RAM we put the initrd
  128. * halfway into RAM, and for boards with 256MB of RAM or more we put
  129. * the initrd at 128MB.
  130. */
  131. *start = kernel_entry + MIN(mem_size / 2, 128 * MiB);
  132. size = load_ramdisk(filename, *start, mem_size - *start);
  133. if (size == -1) {
  134. size = load_image_targphys(filename, *start, mem_size - *start);
  135. if (size == -1) {
  136. error_report("could not load ramdisk '%s'", filename);
  137. exit(1);
  138. }
  139. }
  140. return *start + size;
  141. }
  142. uint32_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt)
  143. {
  144. uint32_t temp, fdt_addr;
  145. hwaddr dram_end = dram_base + mem_size;
  146. int fdtsize = fdt_totalsize(fdt);
  147. if (fdtsize <= 0) {
  148. error_report("invalid device-tree");
  149. exit(1);
  150. }
  151. /*
  152. * We should put fdt as far as possible to avoid kernel/initrd overwriting
  153. * its content. But it should be addressable by 32 bit system as well.
  154. * Thus, put it at an aligned address that less than fdt size from end of
  155. * dram or 4GB whichever is lesser.
  156. */
  157. temp = MIN(dram_end, 4096 * MiB);
  158. fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);
  159. fdt_pack(fdt);
  160. /* copy in the device tree */
  161. qemu_fdt_dumpdtb(fdt, fdtsize);
  162. rom_add_blob_fixed_as("fdt", fdt, fdtsize, fdt_addr,
  163. &address_space_memory);
  164. return fdt_addr;
  165. }
  166. void riscv_rom_copy_firmware_info(hwaddr rom_base, hwaddr rom_size,
  167. uint32_t reset_vec_size, uint64_t kernel_entry)
  168. {
  169. struct fw_dynamic_info dinfo;
  170. size_t dinfo_len;
  171. dinfo.magic = fw_dynamic_info_data(FW_DYNAMIC_INFO_MAGIC_VALUE);
  172. dinfo.version = fw_dynamic_info_data(FW_DYNAMIC_INFO_VERSION);
  173. dinfo.next_mode = fw_dynamic_info_data(FW_DYNAMIC_INFO_NEXT_MODE_S);
  174. dinfo.next_addr = fw_dynamic_info_data(kernel_entry);
  175. dinfo.options = 0;
  176. dinfo.boot_hart = 0;
  177. dinfo_len = sizeof(dinfo);
  178. /**
  179. * copy the dynamic firmware info. This information is specific to
  180. * OpenSBI but doesn't break any other firmware as long as they don't
  181. * expect any certain value in "a2" register.
  182. */
  183. if (dinfo_len > (rom_size - reset_vec_size)) {
  184. error_report("not enough space to store dynamic firmware info");
  185. exit(1);
  186. }
  187. rom_add_blob_fixed_as("mrom.finfo", &dinfo, dinfo_len,
  188. rom_base + reset_vec_size,
  189. &address_space_memory);
  190. }
  191. void riscv_setup_rom_reset_vec(hwaddr start_addr, hwaddr rom_base,
  192. hwaddr rom_size, uint64_t kernel_entry,
  193. uint32_t fdt_load_addr, void *fdt)
  194. {
  195. int i;
  196. uint32_t start_addr_hi32 = 0x00000000;
  197. #if defined(TARGET_RISCV64)
  198. start_addr_hi32 = start_addr >> 32;
  199. #endif
  200. /* reset vector */
  201. uint32_t reset_vec[10] = {
  202. 0x00000297, /* 1: auipc t0, %pcrel_hi(fw_dyn) */
  203. 0x02828613, /* addi a2, t0, %pcrel_lo(1b) */
  204. 0xf1402573, /* csrr a0, mhartid */
  205. #if defined(TARGET_RISCV32)
  206. 0x0202a583, /* lw a1, 32(t0) */
  207. 0x0182a283, /* lw t0, 24(t0) */
  208. #elif defined(TARGET_RISCV64)
  209. 0x0202b583, /* ld a1, 32(t0) */
  210. 0x0182b283, /* ld t0, 24(t0) */
  211. #endif
  212. 0x00028067, /* jr t0 */
  213. start_addr, /* start: .dword */
  214. start_addr_hi32,
  215. fdt_load_addr, /* fdt_laddr: .dword */
  216. 0x00000000,
  217. /* fw_dyn: */
  218. };
  219. /* copy in the reset vector in little_endian byte order */
  220. for (i = 0; i < ARRAY_SIZE(reset_vec); i++) {
  221. reset_vec[i] = cpu_to_le32(reset_vec[i]);
  222. }
  223. rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
  224. rom_base, &address_space_memory);
  225. riscv_rom_copy_firmware_info(rom_base, rom_size, sizeof(reset_vec),
  226. kernel_entry);
  227. return;
  228. }