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dec.c 5.1 KB

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  1. /*
  2. * QEMU DEC 21154 PCI bridge
  3. *
  4. * Copyright (c) 2006-2007 Fabrice Bellard
  5. * Copyright (c) 2007 Jocelyn Mayer
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy
  8. * of this software and associated documentation files (the "Software"), to deal
  9. * in the Software without restriction, including without limitation the rights
  10. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11. * copies of the Software, and to permit persons to whom the Software is
  12. * furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23. * THE SOFTWARE.
  24. */
  25. #include "qemu/osdep.h"
  26. #include "dec.h"
  27. #include "hw/sysbus.h"
  28. #include "qapi/error.h"
  29. #include "qemu/module.h"
  30. #include "hw/pci/pci.h"
  31. #include "hw/pci/pci_host.h"
  32. #include "hw/pci/pci_bridge.h"
  33. #include "hw/pci/pci_bus.h"
  34. #include "qom/object.h"
  35. OBJECT_DECLARE_SIMPLE_TYPE(DECState, DEC_21154)
  36. struct DECState {
  37. PCIHostState parent_obj;
  38. };
  39. static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
  40. {
  41. return irq_num;
  42. }
  43. static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp)
  44. {
  45. pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
  46. }
  47. static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
  48. {
  49. DeviceClass *dc = DEVICE_CLASS(klass);
  50. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  51. set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
  52. k->realize = dec_pci_bridge_realize;
  53. k->exit = pci_bridge_exitfn;
  54. k->vendor_id = PCI_VENDOR_ID_DEC;
  55. k->device_id = PCI_DEVICE_ID_DEC_21154;
  56. k->config_write = pci_bridge_write_config;
  57. k->is_bridge = true;
  58. dc->desc = "DEC 21154 PCI-PCI bridge";
  59. dc->reset = pci_bridge_reset;
  60. dc->vmsd = &vmstate_pci_device;
  61. }
  62. static const TypeInfo dec_21154_pci_bridge_info = {
  63. .name = "dec-21154-p2p-bridge",
  64. .parent = TYPE_PCI_BRIDGE,
  65. .instance_size = sizeof(PCIBridge),
  66. .class_init = dec_21154_pci_bridge_class_init,
  67. .interfaces = (InterfaceInfo[]) {
  68. { INTERFACE_CONVENTIONAL_PCI_DEVICE },
  69. { },
  70. },
  71. };
  72. PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
  73. {
  74. PCIDevice *dev;
  75. PCIBridge *br;
  76. dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge");
  77. br = PCI_BRIDGE(dev);
  78. pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
  79. pci_realize_and_unref(dev, parent_bus, &error_fatal);
  80. return pci_bridge_get_sec_bus(br);
  81. }
  82. static void pci_dec_21154_device_realize(DeviceState *dev, Error **errp)
  83. {
  84. PCIHostState *phb;
  85. SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
  86. phb = PCI_HOST_BRIDGE(dev);
  87. memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
  88. dev, "pci-conf-idx", 0x1000);
  89. memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
  90. dev, "pci-data-idx", 0x1000);
  91. sysbus_init_mmio(sbd, &phb->conf_mem);
  92. sysbus_init_mmio(sbd, &phb->data_mem);
  93. }
  94. static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp)
  95. {
  96. /* PCI2PCI bridge same values as PearPC - check this */
  97. }
  98. static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
  99. {
  100. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  101. DeviceClass *dc = DEVICE_CLASS(klass);
  102. set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
  103. k->realize = dec_21154_pci_host_realize;
  104. k->vendor_id = PCI_VENDOR_ID_DEC;
  105. k->device_id = PCI_DEVICE_ID_DEC_21154;
  106. k->revision = 0x02;
  107. k->class_id = PCI_CLASS_BRIDGE_PCI;
  108. k->is_bridge = true;
  109. /*
  110. * PCI-facing part of the host bridge, not usable without the
  111. * host-facing part, which can't be device_add'ed, yet.
  112. */
  113. dc->user_creatable = false;
  114. }
  115. static const TypeInfo dec_21154_pci_host_info = {
  116. .name = "dec-21154",
  117. .parent = TYPE_PCI_DEVICE,
  118. .instance_size = sizeof(PCIDevice),
  119. .class_init = dec_21154_pci_host_class_init,
  120. .interfaces = (InterfaceInfo[]) {
  121. { INTERFACE_CONVENTIONAL_PCI_DEVICE },
  122. { },
  123. },
  124. };
  125. static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
  126. {
  127. DeviceClass *dc = DEVICE_CLASS(klass);
  128. dc->realize = pci_dec_21154_device_realize;
  129. }
  130. static const TypeInfo pci_dec_21154_device_info = {
  131. .name = TYPE_DEC_21154,
  132. .parent = TYPE_PCI_HOST_BRIDGE,
  133. .instance_size = sizeof(DECState),
  134. .class_init = pci_dec_21154_device_class_init,
  135. };
  136. static void dec_register_types(void)
  137. {
  138. type_register_static(&pci_dec_21154_device_info);
  139. type_register_static(&dec_21154_pci_host_info);
  140. type_register_static(&dec_21154_pci_bridge_info);
  141. }
  142. type_init(dec_register_types)