trace-events 14 KB

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  1. # See docs/devel/tracing.txt for syntax documentation.
  2. # allwinner-cpucfg.c
  3. allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32
  4. allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  5. allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  6. # allwinner-h3-dramc.c
  7. allwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror"
  8. allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
  9. allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  10. allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  11. allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  12. allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  13. allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  14. allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  15. # allwinner-sid.c
  16. allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  17. allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
  18. # avr_power.c
  19. avr_power_read(uint8_t value) "power_reduc read value:%u"
  20. avr_power_write(uint8_t value) "power_reduc write value:%u"
  21. # eccmemctl.c
  22. ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
  23. ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
  24. ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
  25. ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
  26. ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
  27. ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
  28. ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
  29. ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
  30. ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
  31. ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
  32. ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
  33. ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
  34. ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
  35. ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
  36. ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
  37. ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
  38. ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
  39. ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
  40. # empty_slot.c
  41. empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
  42. # slavio_misc.c
  43. slavio_misc_update_irq_raise(void) "Raise IRQ"
  44. slavio_misc_update_irq_lower(void) "Lower IRQ"
  45. slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
  46. slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
  47. slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
  48. slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
  49. slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
  50. slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
  51. slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
  52. slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
  53. slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
  54. slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
  55. slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
  56. apc_mem_writeb(uint32_t val) "Write power management 0x%02x"
  57. apc_mem_readb(uint32_t ret) "Read power management 0x%02x"
  58. slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
  59. slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
  60. slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
  61. slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
  62. # milkymist-hpdmc.c
  63. milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
  64. milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
  65. # milkymist-pfpu.c
  66. milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
  67. milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
  68. milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
  69. milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
  70. # aspeed_scu.c
  71. aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
  72. # mps2-scc.c
  73. mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  74. mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  75. mps2_scc_reset(void) "MPS2 SCC: reset"
  76. mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c"
  77. mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
  78. mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
  79. # mps2-fpgaio.c
  80. mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  81. mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  82. mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
  83. mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c"
  84. # msf2-sysreg.c
  85. msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
  86. msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
  87. msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
  88. # imx7_gpr.c
  89. imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
  90. imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
  91. # mos6522.c
  92. mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
  93. mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
  94. mos6522_set_sr_int(void) "set sr_int"
  95. mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
  96. mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
  97. # npcm7xx_clk.c
  98. npcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
  99. npcm7xx_clk_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
  100. # npcm7xx_gcr.c
  101. npcm7xx_gcr_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
  102. npcm7xx_gcr_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
  103. # stm32f4xx_syscfg.c
  104. stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d"
  105. stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d"
  106. stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
  107. stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
  108. # stm32f4xx_exti.c
  109. stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d"
  110. stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
  111. stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
  112. # tz-mpc.c
  113. tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u"
  114. tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u"
  115. tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d"
  116. tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
  117. tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s"
  118. tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64
  119. # tz-msc.c
  120. tz_msc_reset(void) "TZ MSC: reset"
  121. tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d"
  122. tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d"
  123. tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d"
  124. tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d"
  125. tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked"
  126. # tz-ppc.c
  127. tz_ppc_reset(void) "TZ PPC: reset"
  128. tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
  129. tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
  130. tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
  131. tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
  132. tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
  133. tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
  134. tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
  135. tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
  136. # iotkit-secctl.c
  137. iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
  138. iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u"
  139. iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u"
  140. iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u"
  141. # imx6ul_ccm.c
  142. ccm_entry(void) ""
  143. ccm_freq(uint32_t freq) "freq = %d"
  144. ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
  145. ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
  146. ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
  147. # iotkit-sysinfo.c
  148. iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  149. iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  150. # iotkit-sysctl.c
  151. iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  152. iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  153. iotkit_sysctl_reset(void) "IoTKit SysCtl: reset"
  154. # armsse-cpuid.c
  155. armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  156. armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  157. # armsse-mhu.c
  158. armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  159. armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
  160. # aspeed_xdma.c
  161. aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
  162. # bcm2835_property.c
  163. bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
  164. # bcm2835_mbox.c
  165. bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
  166. bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
  167. bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
  168. # mac_via.c
  169. via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
  170. via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
  171. via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
  172. via1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
  173. via1_rtc_cmd_invalid(int value) "value=0x%02x"
  174. via1_rtc_internal_time(uint32_t time) "time=0x%08x"
  175. via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
  176. via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
  177. via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
  178. via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
  179. via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
  180. via1_rtc_cmd_test_write(int value) "value=0x%02x"
  181. via1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
  182. via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
  183. via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
  184. via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
  185. via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
  186. via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s"
  187. via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
  188. via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
  189. # grlib_ahb_apb_pnp.c
  190. grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
  191. grlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx64" data:0x%08x"
  192. # pca9552.c
  193. pca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]"
  194. pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u"