cpu.c 26 KB

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  1. #include "qemu/osdep.h"
  2. #include "hw/boards.h"
  3. #include "migration/vmstate.h"
  4. #include "hw/acpi/cpu.h"
  5. #include "qapi/error.h"
  6. #include "qapi/qapi-events-acpi.h"
  7. #include "trace.h"
  8. #include "sysemu/numa.h"
  9. #define ACPI_CPU_HOTPLUG_REG_LEN 12
  10. #define ACPI_CPU_SELECTOR_OFFSET_WR 0
  11. #define ACPI_CPU_FLAGS_OFFSET_RW 4
  12. #define ACPI_CPU_CMD_OFFSET_WR 5
  13. #define ACPI_CPU_CMD_DATA_OFFSET_RW 8
  14. #define ACPI_CPU_CMD_DATA2_OFFSET_R 0
  15. #define OVMF_CPUHP_SMI_CMD 4
  16. enum {
  17. CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
  18. CPHP_OST_EVENT_CMD = 1,
  19. CPHP_OST_STATUS_CMD = 2,
  20. CPHP_GET_CPU_ID_CMD = 3,
  21. CPHP_CMD_MAX
  22. };
  23. static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
  24. {
  25. ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
  26. info->slot_type = ACPI_SLOT_TYPE_CPU;
  27. info->slot = g_strdup_printf("%d", idx);
  28. info->source = cdev->ost_event;
  29. info->status = cdev->ost_status;
  30. if (cdev->cpu) {
  31. DeviceState *dev = DEVICE(cdev->cpu);
  32. if (dev->id) {
  33. info->device = g_strdup(dev->id);
  34. info->has_device = true;
  35. }
  36. }
  37. return info;
  38. }
  39. void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
  40. {
  41. int i;
  42. for (i = 0; i < cpu_st->dev_count; i++) {
  43. ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1);
  44. elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]);
  45. elem->next = NULL;
  46. **list = elem;
  47. *list = &elem->next;
  48. }
  49. }
  50. static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
  51. {
  52. uint64_t val = 0;
  53. CPUHotplugState *cpu_st = opaque;
  54. AcpiCpuStatus *cdev;
  55. if (cpu_st->selector >= cpu_st->dev_count) {
  56. return val;
  57. }
  58. cdev = &cpu_st->devs[cpu_st->selector];
  59. switch (addr) {
  60. case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
  61. val |= cdev->cpu ? 1 : 0;
  62. val |= cdev->is_inserting ? 2 : 0;
  63. val |= cdev->is_removing ? 4 : 0;
  64. trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
  65. break;
  66. case ACPI_CPU_CMD_DATA_OFFSET_RW:
  67. switch (cpu_st->command) {
  68. case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
  69. val = cpu_st->selector;
  70. break;
  71. case CPHP_GET_CPU_ID_CMD:
  72. val = cdev->arch_id & 0xFFFFFFFF;
  73. break;
  74. default:
  75. break;
  76. }
  77. trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
  78. break;
  79. case ACPI_CPU_CMD_DATA2_OFFSET_R:
  80. switch (cpu_st->command) {
  81. case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
  82. val = 0;
  83. break;
  84. case CPHP_GET_CPU_ID_CMD:
  85. val = cdev->arch_id >> 32;
  86. break;
  87. default:
  88. break;
  89. }
  90. trace_cpuhp_acpi_read_cmd_data2(cpu_st->selector, val);
  91. break;
  92. default:
  93. break;
  94. }
  95. return val;
  96. }
  97. static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
  98. unsigned int size)
  99. {
  100. CPUHotplugState *cpu_st = opaque;
  101. AcpiCpuStatus *cdev;
  102. ACPIOSTInfo *info;
  103. assert(cpu_st->dev_count);
  104. if (addr) {
  105. if (cpu_st->selector >= cpu_st->dev_count) {
  106. trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
  107. return;
  108. }
  109. }
  110. switch (addr) {
  111. case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
  112. cpu_st->selector = data;
  113. trace_cpuhp_acpi_write_idx(cpu_st->selector);
  114. break;
  115. case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
  116. cdev = &cpu_st->devs[cpu_st->selector];
  117. if (data & 2) { /* clear insert event */
  118. cdev->is_inserting = false;
  119. trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
  120. } else if (data & 4) { /* clear remove event */
  121. cdev->is_removing = false;
  122. trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
  123. } else if (data & 8) {
  124. DeviceState *dev = NULL;
  125. HotplugHandler *hotplug_ctrl = NULL;
  126. if (!cdev->cpu || cdev->cpu == first_cpu) {
  127. trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
  128. break;
  129. }
  130. trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
  131. dev = DEVICE(cdev->cpu);
  132. hotplug_ctrl = qdev_get_hotplug_handler(dev);
  133. hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
  134. object_unparent(OBJECT(dev));
  135. }
  136. break;
  137. case ACPI_CPU_CMD_OFFSET_WR:
  138. trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
  139. if (data < CPHP_CMD_MAX) {
  140. cpu_st->command = data;
  141. if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
  142. uint32_t iter = cpu_st->selector;
  143. do {
  144. cdev = &cpu_st->devs[iter];
  145. if (cdev->is_inserting || cdev->is_removing) {
  146. cpu_st->selector = iter;
  147. trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
  148. cdev->is_inserting, cdev->is_removing);
  149. break;
  150. }
  151. iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
  152. } while (iter != cpu_st->selector);
  153. }
  154. }
  155. break;
  156. case ACPI_CPU_CMD_DATA_OFFSET_RW:
  157. switch (cpu_st->command) {
  158. case CPHP_OST_EVENT_CMD: {
  159. cdev = &cpu_st->devs[cpu_st->selector];
  160. cdev->ost_event = data;
  161. trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
  162. break;
  163. }
  164. case CPHP_OST_STATUS_CMD: {
  165. cdev = &cpu_st->devs[cpu_st->selector];
  166. cdev->ost_status = data;
  167. info = acpi_cpu_device_status(cpu_st->selector, cdev);
  168. qapi_event_send_acpi_device_ost(info);
  169. qapi_free_ACPIOSTInfo(info);
  170. trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
  171. cdev->ost_status);
  172. break;
  173. }
  174. default:
  175. break;
  176. }
  177. break;
  178. default:
  179. break;
  180. }
  181. }
  182. static const MemoryRegionOps cpu_hotplug_ops = {
  183. .read = cpu_hotplug_rd,
  184. .write = cpu_hotplug_wr,
  185. .endianness = DEVICE_LITTLE_ENDIAN,
  186. .valid = {
  187. .min_access_size = 1,
  188. .max_access_size = 4,
  189. },
  190. };
  191. void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
  192. CPUHotplugState *state, hwaddr base_addr)
  193. {
  194. MachineState *machine = MACHINE(qdev_get_machine());
  195. MachineClass *mc = MACHINE_GET_CLASS(machine);
  196. const CPUArchIdList *id_list;
  197. int i;
  198. assert(mc->possible_cpu_arch_ids);
  199. id_list = mc->possible_cpu_arch_ids(machine);
  200. state->dev_count = id_list->len;
  201. state->devs = g_new0(typeof(*state->devs), state->dev_count);
  202. for (i = 0; i < id_list->len; i++) {
  203. state->devs[i].cpu = CPU(id_list->cpus[i].cpu);
  204. state->devs[i].arch_id = id_list->cpus[i].arch_id;
  205. }
  206. memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
  207. "acpi-cpu-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
  208. memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
  209. }
  210. static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
  211. {
  212. CPUClass *k = CPU_GET_CLASS(dev);
  213. uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
  214. int i;
  215. for (i = 0; i < cpu_st->dev_count; i++) {
  216. if (cpu_arch_id == cpu_st->devs[i].arch_id) {
  217. return &cpu_st->devs[i];
  218. }
  219. }
  220. return NULL;
  221. }
  222. void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
  223. CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
  224. {
  225. AcpiCpuStatus *cdev;
  226. cdev = get_cpu_status(cpu_st, dev);
  227. if (!cdev) {
  228. return;
  229. }
  230. cdev->cpu = CPU(dev);
  231. if (dev->hotplugged) {
  232. cdev->is_inserting = true;
  233. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  234. }
  235. }
  236. void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
  237. CPUHotplugState *cpu_st,
  238. DeviceState *dev, Error **errp)
  239. {
  240. AcpiCpuStatus *cdev;
  241. cdev = get_cpu_status(cpu_st, dev);
  242. if (!cdev) {
  243. return;
  244. }
  245. cdev->is_removing = true;
  246. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  247. }
  248. void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
  249. DeviceState *dev, Error **errp)
  250. {
  251. AcpiCpuStatus *cdev;
  252. cdev = get_cpu_status(cpu_st, dev);
  253. if (!cdev) {
  254. return;
  255. }
  256. cdev->cpu = NULL;
  257. }
  258. static const VMStateDescription vmstate_cpuhp_sts = {
  259. .name = "CPU hotplug device state",
  260. .version_id = 1,
  261. .minimum_version_id = 1,
  262. .minimum_version_id_old = 1,
  263. .fields = (VMStateField[]) {
  264. VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
  265. VMSTATE_BOOL(is_removing, AcpiCpuStatus),
  266. VMSTATE_UINT32(ost_event, AcpiCpuStatus),
  267. VMSTATE_UINT32(ost_status, AcpiCpuStatus),
  268. VMSTATE_END_OF_LIST()
  269. }
  270. };
  271. const VMStateDescription vmstate_cpu_hotplug = {
  272. .name = "CPU hotplug state",
  273. .version_id = 1,
  274. .minimum_version_id = 1,
  275. .minimum_version_id_old = 1,
  276. .fields = (VMStateField[]) {
  277. VMSTATE_UINT32(selector, CPUHotplugState),
  278. VMSTATE_UINT8(command, CPUHotplugState),
  279. VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
  280. vmstate_cpuhp_sts, AcpiCpuStatus),
  281. VMSTATE_END_OF_LIST()
  282. }
  283. };
  284. #define CPU_NAME_FMT "C%.03X"
  285. #define CPUHP_RES_DEVICE "PRES"
  286. #define CPU_LOCK "CPLK"
  287. #define CPU_STS_METHOD "CSTA"
  288. #define CPU_SCAN_METHOD "CSCN"
  289. #define CPU_NOTIFY_METHOD "CTFY"
  290. #define CPU_EJECT_METHOD "CEJ0"
  291. #define CPU_OST_METHOD "COST"
  292. #define CPU_ADDED_LIST "CNEW"
  293. #define CPU_ENABLED "CPEN"
  294. #define CPU_SELECTOR "CSEL"
  295. #define CPU_COMMAND "CCMD"
  296. #define CPU_DATA "CDAT"
  297. #define CPU_INSERT_EVENT "CINS"
  298. #define CPU_REMOVE_EVENT "CRMV"
  299. #define CPU_EJECT_EVENT "CEJ0"
  300. void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
  301. hwaddr io_base,
  302. const char *res_root,
  303. const char *event_handler_method)
  304. {
  305. Aml *ifctx;
  306. Aml *field;
  307. Aml *method;
  308. Aml *cpu_ctrl_dev;
  309. Aml *cpus_dev;
  310. Aml *zero = aml_int(0);
  311. Aml *one = aml_int(1);
  312. Aml *sb_scope = aml_scope("_SB");
  313. MachineClass *mc = MACHINE_GET_CLASS(machine);
  314. const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
  315. char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
  316. Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
  317. AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
  318. AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);
  319. cpu_ctrl_dev = aml_device("%s", cphp_res_path);
  320. {
  321. Aml *crs;
  322. aml_append(cpu_ctrl_dev,
  323. aml_name_decl("_HID", aml_eisaid("PNP0A06")));
  324. aml_append(cpu_ctrl_dev,
  325. aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
  326. aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
  327. crs = aml_resource_template();
  328. aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
  329. ACPI_CPU_HOTPLUG_REG_LEN));
  330. aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
  331. /* declare CPU hotplug MMIO region with related access fields */
  332. aml_append(cpu_ctrl_dev,
  333. aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
  334. ACPI_CPU_HOTPLUG_REG_LEN));
  335. field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
  336. AML_WRITE_AS_ZEROS);
  337. aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
  338. /* 1 if enabled, read only */
  339. aml_append(field, aml_named_field(CPU_ENABLED, 1));
  340. /* (read) 1 if has a insert event. (write) 1 to clear event */
  341. aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
  342. /* (read) 1 if has a remove event. (write) 1 to clear event */
  343. aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
  344. /* initiates device eject, write only */
  345. aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
  346. aml_append(field, aml_reserved_field(4));
  347. aml_append(field, aml_named_field(CPU_COMMAND, 8));
  348. aml_append(cpu_ctrl_dev, field);
  349. field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
  350. /* CPU selector, write only */
  351. aml_append(field, aml_named_field(CPU_SELECTOR, 32));
  352. /* flags + cmd + 2byte align */
  353. aml_append(field, aml_reserved_field(4 * 8));
  354. aml_append(field, aml_named_field(CPU_DATA, 32));
  355. aml_append(cpu_ctrl_dev, field);
  356. if (opts.has_legacy_cphp) {
  357. method = aml_method("_INI", 0, AML_SERIALIZED);
  358. /* switch off legacy CPU hotplug HW and use new one,
  359. * on reboot system is in new mode and writing 0
  360. * in CPU_SELECTOR selects BSP, which is NOP at
  361. * the time _INI is called */
  362. aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR)));
  363. aml_append(cpu_ctrl_dev, method);
  364. }
  365. }
  366. aml_append(sb_scope, cpu_ctrl_dev);
  367. cpus_dev = aml_device("\\_SB.CPUS");
  368. {
  369. int i;
  370. Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
  371. Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
  372. Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
  373. Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
  374. Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
  375. Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
  376. Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
  377. Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);
  378. aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
  379. aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
  380. method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
  381. for (i = 0; i < arch_ids->len; i++) {
  382. Aml *cpu = aml_name(CPU_NAME_FMT, i);
  383. Aml *uid = aml_arg(0);
  384. Aml *event = aml_arg(1);
  385. ifctx = aml_if(aml_equal(uid, aml_int(i)));
  386. {
  387. aml_append(ifctx, aml_notify(cpu, event));
  388. }
  389. aml_append(method, ifctx);
  390. }
  391. aml_append(cpus_dev, method);
  392. method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
  393. {
  394. Aml *idx = aml_arg(0);
  395. Aml *sta = aml_local(0);
  396. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  397. aml_append(method, aml_store(idx, cpu_selector));
  398. aml_append(method, aml_store(zero, sta));
  399. ifctx = aml_if(aml_equal(is_enabled, one));
  400. {
  401. aml_append(ifctx, aml_store(aml_int(0xF), sta));
  402. }
  403. aml_append(method, ifctx);
  404. aml_append(method, aml_release(ctrl_lock));
  405. aml_append(method, aml_return(sta));
  406. }
  407. aml_append(cpus_dev, method);
  408. method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
  409. {
  410. Aml *idx = aml_arg(0);
  411. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  412. aml_append(method, aml_store(idx, cpu_selector));
  413. aml_append(method, aml_store(one, ej_evt));
  414. aml_append(method, aml_release(ctrl_lock));
  415. }
  416. aml_append(cpus_dev, method);
  417. method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
  418. {
  419. const uint8_t max_cpus_per_pass = 255;
  420. Aml *else_ctx;
  421. Aml *while_ctx, *while_ctx2;
  422. Aml *has_event = aml_local(0);
  423. Aml *dev_chk = aml_int(1);
  424. Aml *eject_req = aml_int(3);
  425. Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
  426. Aml *num_added_cpus = aml_local(1);
  427. Aml *cpu_idx = aml_local(2);
  428. Aml *uid = aml_local(3);
  429. Aml *has_job = aml_local(4);
  430. Aml *new_cpus = aml_name(CPU_ADDED_LIST);
  431. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  432. /*
  433. * Windows versions newer than XP (including Windows 10/Windows
  434. * Server 2019), do support* VarPackageOp but, it is cripled to hold
  435. * the same elements number as old PackageOp.
  436. * For compatibility with Windows XP (so it won't crash) use ACPI1.0
  437. * PackageOp which can hold max 255 elements.
  438. *
  439. * use named package as old Windows don't support it in local var
  440. */
  441. aml_append(method, aml_name_decl(CPU_ADDED_LIST,
  442. aml_package(max_cpus_per_pass)));
  443. aml_append(method, aml_store(zero, uid));
  444. aml_append(method, aml_store(one, has_job));
  445. /*
  446. * CPU_ADDED_LIST can hold limited number of elements, outer loop
  447. * allows to process CPUs in batches which let us to handle more
  448. * CPUs than CPU_ADDED_LIST can hold.
  449. */
  450. while_ctx2 = aml_while(aml_equal(has_job, one));
  451. {
  452. aml_append(while_ctx2, aml_store(zero, has_job));
  453. aml_append(while_ctx2, aml_store(one, has_event));
  454. aml_append(while_ctx2, aml_store(zero, num_added_cpus));
  455. /*
  456. * Scan CPUs, till there are CPUs with events or
  457. * CPU_ADDED_LIST capacity is exhausted
  458. */
  459. while_ctx = aml_while(aml_land(aml_equal(has_event, one),
  460. aml_lless(uid, aml_int(arch_ids->len))));
  461. {
  462. /*
  463. * clear loop exit condition, ins_evt/rm_evt checks will
  464. * set it to 1 while next_cpu_cmd returns a CPU with events
  465. */
  466. aml_append(while_ctx, aml_store(zero, has_event));
  467. aml_append(while_ctx, aml_store(uid, cpu_selector));
  468. aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
  469. /*
  470. * wrap around case, scan is complete, exit loop.
  471. * It happens since events are not cleared in scan loop,
  472. * so next_cpu_cmd continues to find already processed CPUs
  473. */
  474. ifctx = aml_if(aml_lless(cpu_data, uid));
  475. {
  476. aml_append(ifctx, aml_break());
  477. }
  478. aml_append(while_ctx, ifctx);
  479. /*
  480. * if CPU_ADDED_LIST is full, exit inner loop and process
  481. * collected CPUs
  482. */
  483. ifctx = aml_if(
  484. aml_equal(num_added_cpus, aml_int(max_cpus_per_pass)));
  485. {
  486. aml_append(ifctx, aml_store(one, has_job));
  487. aml_append(ifctx, aml_break());
  488. }
  489. aml_append(while_ctx, ifctx);
  490. aml_append(while_ctx, aml_store(cpu_data, uid));
  491. ifctx = aml_if(aml_equal(ins_evt, one));
  492. {
  493. /* cache added CPUs to Notify/Wakeup later */
  494. aml_append(ifctx, aml_store(uid,
  495. aml_index(new_cpus, num_added_cpus)));
  496. aml_append(ifctx, aml_increment(num_added_cpus));
  497. aml_append(ifctx, aml_store(one, has_event));
  498. }
  499. aml_append(while_ctx, ifctx);
  500. else_ctx = aml_else();
  501. ifctx = aml_if(aml_equal(rm_evt, one));
  502. {
  503. aml_append(ifctx,
  504. aml_call2(CPU_NOTIFY_METHOD, uid, eject_req));
  505. aml_append(ifctx, aml_store(one, rm_evt));
  506. aml_append(ifctx, aml_store(one, has_event));
  507. }
  508. aml_append(else_ctx, ifctx);
  509. aml_append(while_ctx, else_ctx);
  510. aml_append(while_ctx, aml_increment(uid));
  511. }
  512. aml_append(while_ctx2, while_ctx);
  513. /*
  514. * in case FW negotiated ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT,
  515. * make upcall to FW, so it can pull in new CPUs before
  516. * OS is notified and wakes them up
  517. */
  518. if (opts.smi_path) {
  519. ifctx = aml_if(aml_lgreater(num_added_cpus, zero));
  520. {
  521. aml_append(ifctx, aml_store(aml_int(OVMF_CPUHP_SMI_CMD),
  522. aml_name("%s", opts.smi_path)));
  523. }
  524. aml_append(while_ctx2, ifctx);
  525. }
  526. /* Notify OSPM about new CPUs and clear insert events */
  527. aml_append(while_ctx2, aml_store(zero, cpu_idx));
  528. while_ctx = aml_while(aml_lless(cpu_idx, num_added_cpus));
  529. {
  530. aml_append(while_ctx,
  531. aml_store(aml_derefof(aml_index(new_cpus, cpu_idx)),
  532. uid));
  533. aml_append(while_ctx,
  534. aml_call2(CPU_NOTIFY_METHOD, uid, dev_chk));
  535. aml_append(while_ctx, aml_store(uid, aml_debug()));
  536. aml_append(while_ctx, aml_store(uid, cpu_selector));
  537. aml_append(while_ctx, aml_store(one, ins_evt));
  538. aml_append(while_ctx, aml_increment(cpu_idx));
  539. }
  540. aml_append(while_ctx2, while_ctx);
  541. /*
  542. * If another batch is needed, then it will resume scanning
  543. * exactly at -- and not after -- the last CPU that's currently
  544. * in CPU_ADDED_LIST. In other words, the last CPU in
  545. * CPU_ADDED_LIST is going to be re-checked. That's OK: we've
  546. * just cleared the insert event for *all* CPUs in
  547. * CPU_ADDED_LIST, including the last one. So the scan will
  548. * simply seek past it.
  549. */
  550. }
  551. aml_append(method, while_ctx2);
  552. aml_append(method, aml_release(ctrl_lock));
  553. }
  554. aml_append(cpus_dev, method);
  555. method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
  556. {
  557. Aml *uid = aml_arg(0);
  558. Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
  559. Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
  560. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  561. aml_append(method, aml_store(uid, cpu_selector));
  562. aml_append(method, aml_store(ev_cmd, cpu_cmd));
  563. aml_append(method, aml_store(aml_arg(1), cpu_data));
  564. aml_append(method, aml_store(st_cmd, cpu_cmd));
  565. aml_append(method, aml_store(aml_arg(2), cpu_data));
  566. aml_append(method, aml_release(ctrl_lock));
  567. }
  568. aml_append(cpus_dev, method);
  569. /* build Processor object for each processor */
  570. for (i = 0; i < arch_ids->len; i++) {
  571. Aml *dev;
  572. Aml *uid = aml_int(i);
  573. GArray *madt_buf = g_array_new(0, 1, 1);
  574. int arch_id = arch_ids->cpus[i].arch_id;
  575. if (opts.acpi_1_compatible && arch_id < 255) {
  576. dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
  577. } else {
  578. dev = aml_device(CPU_NAME_FMT, i);
  579. aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
  580. aml_append(dev, aml_name_decl("_UID", uid));
  581. }
  582. method = aml_method("_STA", 0, AML_SERIALIZED);
  583. aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
  584. aml_append(dev, method);
  585. /* build _MAT object */
  586. assert(adevc && adevc->madt_cpu);
  587. adevc->madt_cpu(adev, i, arch_ids, madt_buf);
  588. switch (madt_buf->data[0]) {
  589. case ACPI_APIC_PROCESSOR: {
  590. AcpiMadtProcessorApic *apic = (void *)madt_buf->data;
  591. apic->flags = cpu_to_le32(1);
  592. break;
  593. }
  594. case ACPI_APIC_LOCAL_X2APIC: {
  595. AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data;
  596. apic->flags = cpu_to_le32(1);
  597. break;
  598. }
  599. default:
  600. assert(0);
  601. }
  602. aml_append(dev, aml_name_decl("_MAT",
  603. aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
  604. g_array_free(madt_buf, true);
  605. if (CPU(arch_ids->cpus[i].cpu) != first_cpu) {
  606. method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
  607. aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
  608. aml_append(dev, method);
  609. }
  610. method = aml_method("_OST", 3, AML_SERIALIZED);
  611. aml_append(method,
  612. aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
  613. aml_arg(1), aml_arg(2))
  614. );
  615. aml_append(dev, method);
  616. /* Linux guests discard SRAT info for non-present CPUs
  617. * as a result _PXM is required for all CPUs which might
  618. * be hot-plugged. For simplicity, add it for all CPUs.
  619. */
  620. if (arch_ids->cpus[i].props.has_node_id) {
  621. aml_append(dev, aml_name_decl("_PXM",
  622. aml_int(arch_ids->cpus[i].props.node_id)));
  623. }
  624. aml_append(cpus_dev, dev);
  625. }
  626. }
  627. aml_append(sb_scope, cpus_dev);
  628. aml_append(table, sb_scope);
  629. method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
  630. aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
  631. aml_append(table, method);
  632. g_free(cphp_res_path);
  633. }