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memory.c 100 KB

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  1. /*
  2. * Physical memory management
  3. *
  4. * Copyright 2011 Red Hat, Inc. and/or its affiliates
  5. *
  6. * Authors:
  7. * Avi Kivity <avi@redhat.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2. See
  10. * the COPYING file in the top-level directory.
  11. *
  12. * Contributions after 2012-01-13 are licensed under the terms of the
  13. * GNU GPL, version 2 or (at your option) any later version.
  14. */
  15. #include "qemu/osdep.h"
  16. #include "qapi/error.h"
  17. #include "cpu.h"
  18. #include "exec/memory.h"
  19. #include "exec/address-spaces.h"
  20. #include "qapi/visitor.h"
  21. #include "qemu/bitops.h"
  22. #include "qemu/error-report.h"
  23. #include "qemu/main-loop.h"
  24. #include "qemu/qemu-print.h"
  25. #include "qom/object.h"
  26. #include "trace-root.h"
  27. #include "exec/memory-internal.h"
  28. #include "exec/ram_addr.h"
  29. #include "sysemu/kvm.h"
  30. #include "sysemu/runstate.h"
  31. #include "sysemu/tcg.h"
  32. #include "sysemu/accel.h"
  33. #include "hw/boards.h"
  34. #include "migration/vmstate.h"
  35. //#define DEBUG_UNASSIGNED
  36. static unsigned memory_region_transaction_depth;
  37. static bool memory_region_update_pending;
  38. static bool ioeventfd_update_pending;
  39. bool global_dirty_log;
  40. static QTAILQ_HEAD(, MemoryListener) memory_listeners
  41. = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  42. static QTAILQ_HEAD(, AddressSpace) address_spaces
  43. = QTAILQ_HEAD_INITIALIZER(address_spaces);
  44. static GHashTable *flat_views;
  45. typedef struct AddrRange AddrRange;
  46. /*
  47. * Note that signed integers are needed for negative offsetting in aliases
  48. * (large MemoryRegion::alias_offset).
  49. */
  50. struct AddrRange {
  51. Int128 start;
  52. Int128 size;
  53. };
  54. static AddrRange addrrange_make(Int128 start, Int128 size)
  55. {
  56. return (AddrRange) { start, size };
  57. }
  58. static bool addrrange_equal(AddrRange r1, AddrRange r2)
  59. {
  60. return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  61. }
  62. static Int128 addrrange_end(AddrRange r)
  63. {
  64. return int128_add(r.start, r.size);
  65. }
  66. static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  67. {
  68. int128_addto(&range.start, delta);
  69. return range;
  70. }
  71. static bool addrrange_contains(AddrRange range, Int128 addr)
  72. {
  73. return int128_ge(addr, range.start)
  74. && int128_lt(addr, addrrange_end(range));
  75. }
  76. static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  77. {
  78. return addrrange_contains(r1, r2.start)
  79. || addrrange_contains(r2, r1.start);
  80. }
  81. static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  82. {
  83. Int128 start = int128_max(r1.start, r2.start);
  84. Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  85. return addrrange_make(start, int128_sub(end, start));
  86. }
  87. enum ListenerDirection { Forward, Reverse };
  88. #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
  89. do { \
  90. MemoryListener *_listener; \
  91. \
  92. switch (_direction) { \
  93. case Forward: \
  94. QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
  95. if (_listener->_callback) { \
  96. _listener->_callback(_listener, ##_args); \
  97. } \
  98. } \
  99. break; \
  100. case Reverse: \
  101. QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
  102. if (_listener->_callback) { \
  103. _listener->_callback(_listener, ##_args); \
  104. } \
  105. } \
  106. break; \
  107. default: \
  108. abort(); \
  109. } \
  110. } while (0)
  111. #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
  112. do { \
  113. MemoryListener *_listener; \
  114. \
  115. switch (_direction) { \
  116. case Forward: \
  117. QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
  118. if (_listener->_callback) { \
  119. _listener->_callback(_listener, _section, ##_args); \
  120. } \
  121. } \
  122. break; \
  123. case Reverse: \
  124. QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
  125. if (_listener->_callback) { \
  126. _listener->_callback(_listener, _section, ##_args); \
  127. } \
  128. } \
  129. break; \
  130. default: \
  131. abort(); \
  132. } \
  133. } while (0)
  134. /* No need to ref/unref .mr, the FlatRange keeps it alive. */
  135. #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
  136. do { \
  137. MemoryRegionSection mrs = section_from_flat_range(fr, \
  138. address_space_to_flatview(as)); \
  139. MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
  140. } while(0)
  141. struct CoalescedMemoryRange {
  142. AddrRange addr;
  143. QTAILQ_ENTRY(CoalescedMemoryRange) link;
  144. };
  145. struct MemoryRegionIoeventfd {
  146. AddrRange addr;
  147. bool match_data;
  148. uint64_t data;
  149. EventNotifier *e;
  150. };
  151. static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
  152. MemoryRegionIoeventfd *b)
  153. {
  154. if (int128_lt(a->addr.start, b->addr.start)) {
  155. return true;
  156. } else if (int128_gt(a->addr.start, b->addr.start)) {
  157. return false;
  158. } else if (int128_lt(a->addr.size, b->addr.size)) {
  159. return true;
  160. } else if (int128_gt(a->addr.size, b->addr.size)) {
  161. return false;
  162. } else if (a->match_data < b->match_data) {
  163. return true;
  164. } else if (a->match_data > b->match_data) {
  165. return false;
  166. } else if (a->match_data) {
  167. if (a->data < b->data) {
  168. return true;
  169. } else if (a->data > b->data) {
  170. return false;
  171. }
  172. }
  173. if (a->e < b->e) {
  174. return true;
  175. } else if (a->e > b->e) {
  176. return false;
  177. }
  178. return false;
  179. }
  180. static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
  181. MemoryRegionIoeventfd *b)
  182. {
  183. return !memory_region_ioeventfd_before(a, b)
  184. && !memory_region_ioeventfd_before(b, a);
  185. }
  186. /* Range of memory in the global map. Addresses are absolute. */
  187. struct FlatRange {
  188. MemoryRegion *mr;
  189. hwaddr offset_in_region;
  190. AddrRange addr;
  191. uint8_t dirty_log_mask;
  192. bool romd_mode;
  193. bool readonly;
  194. bool nonvolatile;
  195. };
  196. #define FOR_EACH_FLAT_RANGE(var, view) \
  197. for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
  198. static inline MemoryRegionSection
  199. section_from_flat_range(FlatRange *fr, FlatView *fv)
  200. {
  201. return (MemoryRegionSection) {
  202. .mr = fr->mr,
  203. .fv = fv,
  204. .offset_within_region = fr->offset_in_region,
  205. .size = fr->addr.size,
  206. .offset_within_address_space = int128_get64(fr->addr.start),
  207. .readonly = fr->readonly,
  208. .nonvolatile = fr->nonvolatile,
  209. };
  210. }
  211. static bool flatrange_equal(FlatRange *a, FlatRange *b)
  212. {
  213. return a->mr == b->mr
  214. && addrrange_equal(a->addr, b->addr)
  215. && a->offset_in_region == b->offset_in_region
  216. && a->romd_mode == b->romd_mode
  217. && a->readonly == b->readonly
  218. && a->nonvolatile == b->nonvolatile;
  219. }
  220. static FlatView *flatview_new(MemoryRegion *mr_root)
  221. {
  222. FlatView *view;
  223. view = g_new0(FlatView, 1);
  224. view->ref = 1;
  225. view->root = mr_root;
  226. memory_region_ref(mr_root);
  227. trace_flatview_new(view, mr_root);
  228. return view;
  229. }
  230. /* Insert a range into a given position. Caller is responsible for maintaining
  231. * sorting order.
  232. */
  233. static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
  234. {
  235. if (view->nr == view->nr_allocated) {
  236. view->nr_allocated = MAX(2 * view->nr, 10);
  237. view->ranges = g_realloc(view->ranges,
  238. view->nr_allocated * sizeof(*view->ranges));
  239. }
  240. memmove(view->ranges + pos + 1, view->ranges + pos,
  241. (view->nr - pos) * sizeof(FlatRange));
  242. view->ranges[pos] = *range;
  243. memory_region_ref(range->mr);
  244. ++view->nr;
  245. }
  246. static void flatview_destroy(FlatView *view)
  247. {
  248. int i;
  249. trace_flatview_destroy(view, view->root);
  250. if (view->dispatch) {
  251. address_space_dispatch_free(view->dispatch);
  252. }
  253. for (i = 0; i < view->nr; i++) {
  254. memory_region_unref(view->ranges[i].mr);
  255. }
  256. g_free(view->ranges);
  257. memory_region_unref(view->root);
  258. g_free(view);
  259. }
  260. static bool flatview_ref(FlatView *view)
  261. {
  262. return atomic_fetch_inc_nonzero(&view->ref) > 0;
  263. }
  264. void flatview_unref(FlatView *view)
  265. {
  266. if (atomic_fetch_dec(&view->ref) == 1) {
  267. trace_flatview_destroy_rcu(view, view->root);
  268. assert(view->root);
  269. call_rcu(view, flatview_destroy, rcu);
  270. }
  271. }
  272. static bool can_merge(FlatRange *r1, FlatRange *r2)
  273. {
  274. return int128_eq(addrrange_end(r1->addr), r2->addr.start)
  275. && r1->mr == r2->mr
  276. && int128_eq(int128_add(int128_make64(r1->offset_in_region),
  277. r1->addr.size),
  278. int128_make64(r2->offset_in_region))
  279. && r1->dirty_log_mask == r2->dirty_log_mask
  280. && r1->romd_mode == r2->romd_mode
  281. && r1->readonly == r2->readonly
  282. && r1->nonvolatile == r2->nonvolatile;
  283. }
  284. /* Attempt to simplify a view by merging adjacent ranges */
  285. static void flatview_simplify(FlatView *view)
  286. {
  287. unsigned i, j, k;
  288. i = 0;
  289. while (i < view->nr) {
  290. j = i + 1;
  291. while (j < view->nr
  292. && can_merge(&view->ranges[j-1], &view->ranges[j])) {
  293. int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
  294. ++j;
  295. }
  296. ++i;
  297. for (k = i; k < j; k++) {
  298. memory_region_unref(view->ranges[k].mr);
  299. }
  300. memmove(&view->ranges[i], &view->ranges[j],
  301. (view->nr - j) * sizeof(view->ranges[j]));
  302. view->nr -= j - i;
  303. }
  304. }
  305. static bool memory_region_big_endian(MemoryRegion *mr)
  306. {
  307. #ifdef TARGET_WORDS_BIGENDIAN
  308. return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
  309. #else
  310. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  311. #endif
  312. }
  313. static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
  314. {
  315. if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
  316. switch (op & MO_SIZE) {
  317. case MO_8:
  318. break;
  319. case MO_16:
  320. *data = bswap16(*data);
  321. break;
  322. case MO_32:
  323. *data = bswap32(*data);
  324. break;
  325. case MO_64:
  326. *data = bswap64(*data);
  327. break;
  328. default:
  329. g_assert_not_reached();
  330. }
  331. }
  332. }
  333. static inline void memory_region_shift_read_access(uint64_t *value,
  334. signed shift,
  335. uint64_t mask,
  336. uint64_t tmp)
  337. {
  338. if (shift >= 0) {
  339. *value |= (tmp & mask) << shift;
  340. } else {
  341. *value |= (tmp & mask) >> -shift;
  342. }
  343. }
  344. static inline uint64_t memory_region_shift_write_access(uint64_t *value,
  345. signed shift,
  346. uint64_t mask)
  347. {
  348. uint64_t tmp;
  349. if (shift >= 0) {
  350. tmp = (*value >> shift) & mask;
  351. } else {
  352. tmp = (*value << -shift) & mask;
  353. }
  354. return tmp;
  355. }
  356. static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
  357. {
  358. MemoryRegion *root;
  359. hwaddr abs_addr = offset;
  360. abs_addr += mr->addr;
  361. for (root = mr; root->container; ) {
  362. root = root->container;
  363. abs_addr += root->addr;
  364. }
  365. return abs_addr;
  366. }
  367. static int get_cpu_index(void)
  368. {
  369. if (current_cpu) {
  370. return current_cpu->cpu_index;
  371. }
  372. return -1;
  373. }
  374. static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
  375. hwaddr addr,
  376. uint64_t *value,
  377. unsigned size,
  378. signed shift,
  379. uint64_t mask,
  380. MemTxAttrs attrs)
  381. {
  382. uint64_t tmp;
  383. tmp = mr->ops->read(mr->opaque, addr, size);
  384. if (mr->subpage) {
  385. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  386. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  387. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  388. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  389. }
  390. memory_region_shift_read_access(value, shift, mask, tmp);
  391. return MEMTX_OK;
  392. }
  393. static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
  394. hwaddr addr,
  395. uint64_t *value,
  396. unsigned size,
  397. signed shift,
  398. uint64_t mask,
  399. MemTxAttrs attrs)
  400. {
  401. uint64_t tmp = 0;
  402. MemTxResult r;
  403. r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
  404. if (mr->subpage) {
  405. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  406. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  407. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  408. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  409. }
  410. memory_region_shift_read_access(value, shift, mask, tmp);
  411. return r;
  412. }
  413. static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
  414. hwaddr addr,
  415. uint64_t *value,
  416. unsigned size,
  417. signed shift,
  418. uint64_t mask,
  419. MemTxAttrs attrs)
  420. {
  421. uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
  422. if (mr->subpage) {
  423. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  424. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  425. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  426. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  427. }
  428. mr->ops->write(mr->opaque, addr, tmp, size);
  429. return MEMTX_OK;
  430. }
  431. static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
  432. hwaddr addr,
  433. uint64_t *value,
  434. unsigned size,
  435. signed shift,
  436. uint64_t mask,
  437. MemTxAttrs attrs)
  438. {
  439. uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
  440. if (mr->subpage) {
  441. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  442. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  443. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  444. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  445. }
  446. return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
  447. }
  448. static MemTxResult access_with_adjusted_size(hwaddr addr,
  449. uint64_t *value,
  450. unsigned size,
  451. unsigned access_size_min,
  452. unsigned access_size_max,
  453. MemTxResult (*access_fn)
  454. (MemoryRegion *mr,
  455. hwaddr addr,
  456. uint64_t *value,
  457. unsigned size,
  458. signed shift,
  459. uint64_t mask,
  460. MemTxAttrs attrs),
  461. MemoryRegion *mr,
  462. MemTxAttrs attrs)
  463. {
  464. uint64_t access_mask;
  465. unsigned access_size;
  466. unsigned i;
  467. MemTxResult r = MEMTX_OK;
  468. if (!access_size_min) {
  469. access_size_min = 1;
  470. }
  471. if (!access_size_max) {
  472. access_size_max = 4;
  473. }
  474. /* FIXME: support unaligned access? */
  475. access_size = MAX(MIN(size, access_size_max), access_size_min);
  476. access_mask = MAKE_64BIT_MASK(0, access_size * 8);
  477. if (memory_region_big_endian(mr)) {
  478. for (i = 0; i < size; i += access_size) {
  479. r |= access_fn(mr, addr + i, value, access_size,
  480. (size - access_size - i) * 8, access_mask, attrs);
  481. }
  482. } else {
  483. for (i = 0; i < size; i += access_size) {
  484. r |= access_fn(mr, addr + i, value, access_size, i * 8,
  485. access_mask, attrs);
  486. }
  487. }
  488. return r;
  489. }
  490. static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
  491. {
  492. AddressSpace *as;
  493. while (mr->container) {
  494. mr = mr->container;
  495. }
  496. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  497. if (mr == as->root) {
  498. return as;
  499. }
  500. }
  501. return NULL;
  502. }
  503. /* Render a memory region into the global view. Ranges in @view obscure
  504. * ranges in @mr.
  505. */
  506. static void render_memory_region(FlatView *view,
  507. MemoryRegion *mr,
  508. Int128 base,
  509. AddrRange clip,
  510. bool readonly,
  511. bool nonvolatile)
  512. {
  513. MemoryRegion *subregion;
  514. unsigned i;
  515. hwaddr offset_in_region;
  516. Int128 remain;
  517. Int128 now;
  518. FlatRange fr;
  519. AddrRange tmp;
  520. if (!mr->enabled) {
  521. return;
  522. }
  523. int128_addto(&base, int128_make64(mr->addr));
  524. readonly |= mr->readonly;
  525. nonvolatile |= mr->nonvolatile;
  526. tmp = addrrange_make(base, mr->size);
  527. if (!addrrange_intersects(tmp, clip)) {
  528. return;
  529. }
  530. clip = addrrange_intersection(tmp, clip);
  531. if (mr->alias) {
  532. int128_subfrom(&base, int128_make64(mr->alias->addr));
  533. int128_subfrom(&base, int128_make64(mr->alias_offset));
  534. render_memory_region(view, mr->alias, base, clip,
  535. readonly, nonvolatile);
  536. return;
  537. }
  538. /* Render subregions in priority order. */
  539. QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
  540. render_memory_region(view, subregion, base, clip,
  541. readonly, nonvolatile);
  542. }
  543. if (!mr->terminates) {
  544. return;
  545. }
  546. offset_in_region = int128_get64(int128_sub(clip.start, base));
  547. base = clip.start;
  548. remain = clip.size;
  549. fr.mr = mr;
  550. fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
  551. fr.romd_mode = mr->romd_mode;
  552. fr.readonly = readonly;
  553. fr.nonvolatile = nonvolatile;
  554. /* Render the region itself into any gaps left by the current view. */
  555. for (i = 0; i < view->nr && int128_nz(remain); ++i) {
  556. if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
  557. continue;
  558. }
  559. if (int128_lt(base, view->ranges[i].addr.start)) {
  560. now = int128_min(remain,
  561. int128_sub(view->ranges[i].addr.start, base));
  562. fr.offset_in_region = offset_in_region;
  563. fr.addr = addrrange_make(base, now);
  564. flatview_insert(view, i, &fr);
  565. ++i;
  566. int128_addto(&base, now);
  567. offset_in_region += int128_get64(now);
  568. int128_subfrom(&remain, now);
  569. }
  570. now = int128_sub(int128_min(int128_add(base, remain),
  571. addrrange_end(view->ranges[i].addr)),
  572. base);
  573. int128_addto(&base, now);
  574. offset_in_region += int128_get64(now);
  575. int128_subfrom(&remain, now);
  576. }
  577. if (int128_nz(remain)) {
  578. fr.offset_in_region = offset_in_region;
  579. fr.addr = addrrange_make(base, remain);
  580. flatview_insert(view, i, &fr);
  581. }
  582. }
  583. static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
  584. {
  585. while (mr->enabled) {
  586. if (mr->alias) {
  587. if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
  588. /* The alias is included in its entirety. Use it as
  589. * the "real" root, so that we can share more FlatViews.
  590. */
  591. mr = mr->alias;
  592. continue;
  593. }
  594. } else if (!mr->terminates) {
  595. unsigned int found = 0;
  596. MemoryRegion *child, *next = NULL;
  597. QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
  598. if (child->enabled) {
  599. if (++found > 1) {
  600. next = NULL;
  601. break;
  602. }
  603. if (!child->addr && int128_ge(mr->size, child->size)) {
  604. /* A child is included in its entirety. If it's the only
  605. * enabled one, use it in the hope of finding an alias down the
  606. * way. This will also let us share FlatViews.
  607. */
  608. next = child;
  609. }
  610. }
  611. }
  612. if (found == 0) {
  613. return NULL;
  614. }
  615. if (next) {
  616. mr = next;
  617. continue;
  618. }
  619. }
  620. return mr;
  621. }
  622. return NULL;
  623. }
  624. /* Render a memory topology into a list of disjoint absolute ranges. */
  625. static FlatView *generate_memory_topology(MemoryRegion *mr)
  626. {
  627. int i;
  628. FlatView *view;
  629. view = flatview_new(mr);
  630. if (mr) {
  631. render_memory_region(view, mr, int128_zero(),
  632. addrrange_make(int128_zero(), int128_2_64()),
  633. false, false);
  634. }
  635. flatview_simplify(view);
  636. view->dispatch = address_space_dispatch_new(view);
  637. for (i = 0; i < view->nr; i++) {
  638. MemoryRegionSection mrs =
  639. section_from_flat_range(&view->ranges[i], view);
  640. flatview_add_to_dispatch(view, &mrs);
  641. }
  642. address_space_dispatch_compact(view->dispatch);
  643. g_hash_table_replace(flat_views, mr, view);
  644. return view;
  645. }
  646. static void address_space_add_del_ioeventfds(AddressSpace *as,
  647. MemoryRegionIoeventfd *fds_new,
  648. unsigned fds_new_nb,
  649. MemoryRegionIoeventfd *fds_old,
  650. unsigned fds_old_nb)
  651. {
  652. unsigned iold, inew;
  653. MemoryRegionIoeventfd *fd;
  654. MemoryRegionSection section;
  655. /* Generate a symmetric difference of the old and new fd sets, adding
  656. * and deleting as necessary.
  657. */
  658. iold = inew = 0;
  659. while (iold < fds_old_nb || inew < fds_new_nb) {
  660. if (iold < fds_old_nb
  661. && (inew == fds_new_nb
  662. || memory_region_ioeventfd_before(&fds_old[iold],
  663. &fds_new[inew]))) {
  664. fd = &fds_old[iold];
  665. section = (MemoryRegionSection) {
  666. .fv = address_space_to_flatview(as),
  667. .offset_within_address_space = int128_get64(fd->addr.start),
  668. .size = fd->addr.size,
  669. };
  670. MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
  671. fd->match_data, fd->data, fd->e);
  672. ++iold;
  673. } else if (inew < fds_new_nb
  674. && (iold == fds_old_nb
  675. || memory_region_ioeventfd_before(&fds_new[inew],
  676. &fds_old[iold]))) {
  677. fd = &fds_new[inew];
  678. section = (MemoryRegionSection) {
  679. .fv = address_space_to_flatview(as),
  680. .offset_within_address_space = int128_get64(fd->addr.start),
  681. .size = fd->addr.size,
  682. };
  683. MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
  684. fd->match_data, fd->data, fd->e);
  685. ++inew;
  686. } else {
  687. ++iold;
  688. ++inew;
  689. }
  690. }
  691. }
  692. FlatView *address_space_get_flatview(AddressSpace *as)
  693. {
  694. FlatView *view;
  695. RCU_READ_LOCK_GUARD();
  696. do {
  697. view = address_space_to_flatview(as);
  698. /* If somebody has replaced as->current_map concurrently,
  699. * flatview_ref returns false.
  700. */
  701. } while (!flatview_ref(view));
  702. return view;
  703. }
  704. static void address_space_update_ioeventfds(AddressSpace *as)
  705. {
  706. FlatView *view;
  707. FlatRange *fr;
  708. unsigned ioeventfd_nb = 0;
  709. MemoryRegionIoeventfd *ioeventfds = NULL;
  710. AddrRange tmp;
  711. unsigned i;
  712. view = address_space_get_flatview(as);
  713. FOR_EACH_FLAT_RANGE(fr, view) {
  714. for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
  715. tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
  716. int128_sub(fr->addr.start,
  717. int128_make64(fr->offset_in_region)));
  718. if (addrrange_intersects(fr->addr, tmp)) {
  719. ++ioeventfd_nb;
  720. ioeventfds = g_realloc(ioeventfds,
  721. ioeventfd_nb * sizeof(*ioeventfds));
  722. ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
  723. ioeventfds[ioeventfd_nb-1].addr = tmp;
  724. }
  725. }
  726. }
  727. address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
  728. as->ioeventfds, as->ioeventfd_nb);
  729. g_free(as->ioeventfds);
  730. as->ioeventfds = ioeventfds;
  731. as->ioeventfd_nb = ioeventfd_nb;
  732. flatview_unref(view);
  733. }
  734. /*
  735. * Notify the memory listeners about the coalesced IO change events of
  736. * range `cmr'. Only the part that has intersection of the specified
  737. * FlatRange will be sent.
  738. */
  739. static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
  740. CoalescedMemoryRange *cmr, bool add)
  741. {
  742. AddrRange tmp;
  743. tmp = addrrange_shift(cmr->addr,
  744. int128_sub(fr->addr.start,
  745. int128_make64(fr->offset_in_region)));
  746. if (!addrrange_intersects(tmp, fr->addr)) {
  747. return;
  748. }
  749. tmp = addrrange_intersection(tmp, fr->addr);
  750. if (add) {
  751. MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
  752. int128_get64(tmp.start),
  753. int128_get64(tmp.size));
  754. } else {
  755. MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
  756. int128_get64(tmp.start),
  757. int128_get64(tmp.size));
  758. }
  759. }
  760. static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
  761. {
  762. CoalescedMemoryRange *cmr;
  763. QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
  764. flat_range_coalesced_io_notify(fr, as, cmr, false);
  765. }
  766. }
  767. static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
  768. {
  769. MemoryRegion *mr = fr->mr;
  770. CoalescedMemoryRange *cmr;
  771. if (QTAILQ_EMPTY(&mr->coalesced)) {
  772. return;
  773. }
  774. QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
  775. flat_range_coalesced_io_notify(fr, as, cmr, true);
  776. }
  777. }
  778. static void address_space_update_topology_pass(AddressSpace *as,
  779. const FlatView *old_view,
  780. const FlatView *new_view,
  781. bool adding)
  782. {
  783. unsigned iold, inew;
  784. FlatRange *frold, *frnew;
  785. /* Generate a symmetric difference of the old and new memory maps.
  786. * Kill ranges in the old map, and instantiate ranges in the new map.
  787. */
  788. iold = inew = 0;
  789. while (iold < old_view->nr || inew < new_view->nr) {
  790. if (iold < old_view->nr) {
  791. frold = &old_view->ranges[iold];
  792. } else {
  793. frold = NULL;
  794. }
  795. if (inew < new_view->nr) {
  796. frnew = &new_view->ranges[inew];
  797. } else {
  798. frnew = NULL;
  799. }
  800. if (frold
  801. && (!frnew
  802. || int128_lt(frold->addr.start, frnew->addr.start)
  803. || (int128_eq(frold->addr.start, frnew->addr.start)
  804. && !flatrange_equal(frold, frnew)))) {
  805. /* In old but not in new, or in both but attributes changed. */
  806. if (!adding) {
  807. flat_range_coalesced_io_del(frold, as);
  808. MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
  809. }
  810. ++iold;
  811. } else if (frold && frnew && flatrange_equal(frold, frnew)) {
  812. /* In both and unchanged (except logging may have changed) */
  813. if (adding) {
  814. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
  815. if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
  816. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
  817. frold->dirty_log_mask,
  818. frnew->dirty_log_mask);
  819. }
  820. if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
  821. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
  822. frold->dirty_log_mask,
  823. frnew->dirty_log_mask);
  824. }
  825. }
  826. ++iold;
  827. ++inew;
  828. } else {
  829. /* In new */
  830. if (adding) {
  831. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
  832. flat_range_coalesced_io_add(frnew, as);
  833. }
  834. ++inew;
  835. }
  836. }
  837. }
  838. static void flatviews_init(void)
  839. {
  840. static FlatView *empty_view;
  841. if (flat_views) {
  842. return;
  843. }
  844. flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
  845. (GDestroyNotify) flatview_unref);
  846. if (!empty_view) {
  847. empty_view = generate_memory_topology(NULL);
  848. /* We keep it alive forever in the global variable. */
  849. flatview_ref(empty_view);
  850. } else {
  851. g_hash_table_replace(flat_views, NULL, empty_view);
  852. flatview_ref(empty_view);
  853. }
  854. }
  855. static void flatviews_reset(void)
  856. {
  857. AddressSpace *as;
  858. if (flat_views) {
  859. g_hash_table_unref(flat_views);
  860. flat_views = NULL;
  861. }
  862. flatviews_init();
  863. /* Render unique FVs */
  864. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  865. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  866. if (g_hash_table_lookup(flat_views, physmr)) {
  867. continue;
  868. }
  869. generate_memory_topology(physmr);
  870. }
  871. }
  872. static void address_space_set_flatview(AddressSpace *as)
  873. {
  874. FlatView *old_view = address_space_to_flatview(as);
  875. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  876. FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
  877. assert(new_view);
  878. if (old_view == new_view) {
  879. return;
  880. }
  881. if (old_view) {
  882. flatview_ref(old_view);
  883. }
  884. flatview_ref(new_view);
  885. if (!QTAILQ_EMPTY(&as->listeners)) {
  886. FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
  887. if (!old_view2) {
  888. old_view2 = &tmpview;
  889. }
  890. address_space_update_topology_pass(as, old_view2, new_view, false);
  891. address_space_update_topology_pass(as, old_view2, new_view, true);
  892. }
  893. /* Writes are protected by the BQL. */
  894. atomic_rcu_set(&as->current_map, new_view);
  895. if (old_view) {
  896. flatview_unref(old_view);
  897. }
  898. /* Note that all the old MemoryRegions are still alive up to this
  899. * point. This relieves most MemoryListeners from the need to
  900. * ref/unref the MemoryRegions they get---unless they use them
  901. * outside the iothread mutex, in which case precise reference
  902. * counting is necessary.
  903. */
  904. if (old_view) {
  905. flatview_unref(old_view);
  906. }
  907. }
  908. static void address_space_update_topology(AddressSpace *as)
  909. {
  910. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  911. flatviews_init();
  912. if (!g_hash_table_lookup(flat_views, physmr)) {
  913. generate_memory_topology(physmr);
  914. }
  915. address_space_set_flatview(as);
  916. }
  917. void memory_region_transaction_begin(void)
  918. {
  919. qemu_flush_coalesced_mmio_buffer();
  920. ++memory_region_transaction_depth;
  921. }
  922. void memory_region_transaction_commit(void)
  923. {
  924. AddressSpace *as;
  925. assert(memory_region_transaction_depth);
  926. assert(qemu_mutex_iothread_locked());
  927. --memory_region_transaction_depth;
  928. if (!memory_region_transaction_depth) {
  929. if (memory_region_update_pending) {
  930. flatviews_reset();
  931. MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
  932. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  933. address_space_set_flatview(as);
  934. address_space_update_ioeventfds(as);
  935. }
  936. memory_region_update_pending = false;
  937. ioeventfd_update_pending = false;
  938. MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
  939. } else if (ioeventfd_update_pending) {
  940. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  941. address_space_update_ioeventfds(as);
  942. }
  943. ioeventfd_update_pending = false;
  944. }
  945. }
  946. }
  947. static void memory_region_destructor_none(MemoryRegion *mr)
  948. {
  949. }
  950. static void memory_region_destructor_ram(MemoryRegion *mr)
  951. {
  952. qemu_ram_free(mr->ram_block);
  953. }
  954. static bool memory_region_need_escape(char c)
  955. {
  956. return c == '/' || c == '[' || c == '\\' || c == ']';
  957. }
  958. static char *memory_region_escape_name(const char *name)
  959. {
  960. const char *p;
  961. char *escaped, *q;
  962. uint8_t c;
  963. size_t bytes = 0;
  964. for (p = name; *p; p++) {
  965. bytes += memory_region_need_escape(*p) ? 4 : 1;
  966. }
  967. if (bytes == p - name) {
  968. return g_memdup(name, bytes + 1);
  969. }
  970. escaped = g_malloc(bytes + 1);
  971. for (p = name, q = escaped; *p; p++) {
  972. c = *p;
  973. if (unlikely(memory_region_need_escape(c))) {
  974. *q++ = '\\';
  975. *q++ = 'x';
  976. *q++ = "0123456789abcdef"[c >> 4];
  977. c = "0123456789abcdef"[c & 15];
  978. }
  979. *q++ = c;
  980. }
  981. *q = 0;
  982. return escaped;
  983. }
  984. static void memory_region_do_init(MemoryRegion *mr,
  985. Object *owner,
  986. const char *name,
  987. uint64_t size)
  988. {
  989. mr->size = int128_make64(size);
  990. if (size == UINT64_MAX) {
  991. mr->size = int128_2_64();
  992. }
  993. mr->name = g_strdup(name);
  994. mr->owner = owner;
  995. mr->ram_block = NULL;
  996. if (name) {
  997. char *escaped_name = memory_region_escape_name(name);
  998. char *name_array = g_strdup_printf("%s[*]", escaped_name);
  999. if (!owner) {
  1000. owner = container_get(qdev_get_machine(), "/unattached");
  1001. }
  1002. object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
  1003. object_unref(OBJECT(mr));
  1004. g_free(name_array);
  1005. g_free(escaped_name);
  1006. }
  1007. }
  1008. void memory_region_init(MemoryRegion *mr,
  1009. Object *owner,
  1010. const char *name,
  1011. uint64_t size)
  1012. {
  1013. object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
  1014. memory_region_do_init(mr, owner, name, size);
  1015. }
  1016. static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
  1017. void *opaque, Error **errp)
  1018. {
  1019. MemoryRegion *mr = MEMORY_REGION(obj);
  1020. uint64_t value = mr->addr;
  1021. visit_type_uint64(v, name, &value, errp);
  1022. }
  1023. static void memory_region_get_container(Object *obj, Visitor *v,
  1024. const char *name, void *opaque,
  1025. Error **errp)
  1026. {
  1027. MemoryRegion *mr = MEMORY_REGION(obj);
  1028. gchar *path = (gchar *)"";
  1029. if (mr->container) {
  1030. path = object_get_canonical_path(OBJECT(mr->container));
  1031. }
  1032. visit_type_str(v, name, &path, errp);
  1033. if (mr->container) {
  1034. g_free(path);
  1035. }
  1036. }
  1037. static Object *memory_region_resolve_container(Object *obj, void *opaque,
  1038. const char *part)
  1039. {
  1040. MemoryRegion *mr = MEMORY_REGION(obj);
  1041. return OBJECT(mr->container);
  1042. }
  1043. static void memory_region_get_priority(Object *obj, Visitor *v,
  1044. const char *name, void *opaque,
  1045. Error **errp)
  1046. {
  1047. MemoryRegion *mr = MEMORY_REGION(obj);
  1048. int32_t value = mr->priority;
  1049. visit_type_int32(v, name, &value, errp);
  1050. }
  1051. static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
  1052. void *opaque, Error **errp)
  1053. {
  1054. MemoryRegion *mr = MEMORY_REGION(obj);
  1055. uint64_t value = memory_region_size(mr);
  1056. visit_type_uint64(v, name, &value, errp);
  1057. }
  1058. static void memory_region_initfn(Object *obj)
  1059. {
  1060. MemoryRegion *mr = MEMORY_REGION(obj);
  1061. ObjectProperty *op;
  1062. mr->ops = &unassigned_mem_ops;
  1063. mr->enabled = true;
  1064. mr->romd_mode = true;
  1065. mr->global_locking = true;
  1066. mr->destructor = memory_region_destructor_none;
  1067. QTAILQ_INIT(&mr->subregions);
  1068. QTAILQ_INIT(&mr->coalesced);
  1069. op = object_property_add(OBJECT(mr), "container",
  1070. "link<" TYPE_MEMORY_REGION ">",
  1071. memory_region_get_container,
  1072. NULL, /* memory_region_set_container */
  1073. NULL, NULL, &error_abort);
  1074. op->resolve = memory_region_resolve_container;
  1075. object_property_add(OBJECT(mr), "addr", "uint64",
  1076. memory_region_get_addr,
  1077. NULL, /* memory_region_set_addr */
  1078. NULL, NULL, &error_abort);
  1079. object_property_add(OBJECT(mr), "priority", "uint32",
  1080. memory_region_get_priority,
  1081. NULL, /* memory_region_set_priority */
  1082. NULL, NULL, &error_abort);
  1083. object_property_add(OBJECT(mr), "size", "uint64",
  1084. memory_region_get_size,
  1085. NULL, /* memory_region_set_size, */
  1086. NULL, NULL, &error_abort);
  1087. }
  1088. static void iommu_memory_region_initfn(Object *obj)
  1089. {
  1090. MemoryRegion *mr = MEMORY_REGION(obj);
  1091. mr->is_iommu = true;
  1092. }
  1093. static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
  1094. unsigned size)
  1095. {
  1096. #ifdef DEBUG_UNASSIGNED
  1097. printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
  1098. #endif
  1099. return 0;
  1100. }
  1101. static void unassigned_mem_write(void *opaque, hwaddr addr,
  1102. uint64_t val, unsigned size)
  1103. {
  1104. #ifdef DEBUG_UNASSIGNED
  1105. printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
  1106. #endif
  1107. }
  1108. static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
  1109. unsigned size, bool is_write,
  1110. MemTxAttrs attrs)
  1111. {
  1112. return false;
  1113. }
  1114. const MemoryRegionOps unassigned_mem_ops = {
  1115. .valid.accepts = unassigned_mem_accepts,
  1116. .endianness = DEVICE_NATIVE_ENDIAN,
  1117. };
  1118. static uint64_t memory_region_ram_device_read(void *opaque,
  1119. hwaddr addr, unsigned size)
  1120. {
  1121. MemoryRegion *mr = opaque;
  1122. uint64_t data = (uint64_t)~0;
  1123. switch (size) {
  1124. case 1:
  1125. data = *(uint8_t *)(mr->ram_block->host + addr);
  1126. break;
  1127. case 2:
  1128. data = *(uint16_t *)(mr->ram_block->host + addr);
  1129. break;
  1130. case 4:
  1131. data = *(uint32_t *)(mr->ram_block->host + addr);
  1132. break;
  1133. case 8:
  1134. data = *(uint64_t *)(mr->ram_block->host + addr);
  1135. break;
  1136. }
  1137. trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
  1138. return data;
  1139. }
  1140. static void memory_region_ram_device_write(void *opaque, hwaddr addr,
  1141. uint64_t data, unsigned size)
  1142. {
  1143. MemoryRegion *mr = opaque;
  1144. trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
  1145. switch (size) {
  1146. case 1:
  1147. *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
  1148. break;
  1149. case 2:
  1150. *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
  1151. break;
  1152. case 4:
  1153. *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
  1154. break;
  1155. case 8:
  1156. *(uint64_t *)(mr->ram_block->host + addr) = data;
  1157. break;
  1158. }
  1159. }
  1160. static const MemoryRegionOps ram_device_mem_ops = {
  1161. .read = memory_region_ram_device_read,
  1162. .write = memory_region_ram_device_write,
  1163. .endianness = DEVICE_HOST_ENDIAN,
  1164. .valid = {
  1165. .min_access_size = 1,
  1166. .max_access_size = 8,
  1167. .unaligned = true,
  1168. },
  1169. .impl = {
  1170. .min_access_size = 1,
  1171. .max_access_size = 8,
  1172. .unaligned = true,
  1173. },
  1174. };
  1175. bool memory_region_access_valid(MemoryRegion *mr,
  1176. hwaddr addr,
  1177. unsigned size,
  1178. bool is_write,
  1179. MemTxAttrs attrs)
  1180. {
  1181. int access_size_min, access_size_max;
  1182. int access_size, i;
  1183. if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
  1184. return false;
  1185. }
  1186. if (!mr->ops->valid.accepts) {
  1187. return true;
  1188. }
  1189. access_size_min = mr->ops->valid.min_access_size;
  1190. if (!mr->ops->valid.min_access_size) {
  1191. access_size_min = 1;
  1192. }
  1193. access_size_max = mr->ops->valid.max_access_size;
  1194. if (!mr->ops->valid.max_access_size) {
  1195. access_size_max = 4;
  1196. }
  1197. access_size = MAX(MIN(size, access_size_max), access_size_min);
  1198. for (i = 0; i < size; i += access_size) {
  1199. if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
  1200. is_write, attrs)) {
  1201. return false;
  1202. }
  1203. }
  1204. return true;
  1205. }
  1206. static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
  1207. hwaddr addr,
  1208. uint64_t *pval,
  1209. unsigned size,
  1210. MemTxAttrs attrs)
  1211. {
  1212. *pval = 0;
  1213. if (mr->ops->read) {
  1214. return access_with_adjusted_size(addr, pval, size,
  1215. mr->ops->impl.min_access_size,
  1216. mr->ops->impl.max_access_size,
  1217. memory_region_read_accessor,
  1218. mr, attrs);
  1219. } else {
  1220. return access_with_adjusted_size(addr, pval, size,
  1221. mr->ops->impl.min_access_size,
  1222. mr->ops->impl.max_access_size,
  1223. memory_region_read_with_attrs_accessor,
  1224. mr, attrs);
  1225. }
  1226. }
  1227. MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
  1228. hwaddr addr,
  1229. uint64_t *pval,
  1230. MemOp op,
  1231. MemTxAttrs attrs)
  1232. {
  1233. unsigned size = memop_size(op);
  1234. MemTxResult r;
  1235. if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
  1236. *pval = unassigned_mem_read(mr, addr, size);
  1237. return MEMTX_DECODE_ERROR;
  1238. }
  1239. r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
  1240. adjust_endianness(mr, pval, op);
  1241. return r;
  1242. }
  1243. /* Return true if an eventfd was signalled */
  1244. static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
  1245. hwaddr addr,
  1246. uint64_t data,
  1247. unsigned size,
  1248. MemTxAttrs attrs)
  1249. {
  1250. MemoryRegionIoeventfd ioeventfd = {
  1251. .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
  1252. .data = data,
  1253. };
  1254. unsigned i;
  1255. for (i = 0; i < mr->ioeventfd_nb; i++) {
  1256. ioeventfd.match_data = mr->ioeventfds[i].match_data;
  1257. ioeventfd.e = mr->ioeventfds[i].e;
  1258. if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
  1259. event_notifier_set(ioeventfd.e);
  1260. return true;
  1261. }
  1262. }
  1263. return false;
  1264. }
  1265. MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
  1266. hwaddr addr,
  1267. uint64_t data,
  1268. MemOp op,
  1269. MemTxAttrs attrs)
  1270. {
  1271. unsigned size = memop_size(op);
  1272. if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
  1273. unassigned_mem_write(mr, addr, data, size);
  1274. return MEMTX_DECODE_ERROR;
  1275. }
  1276. adjust_endianness(mr, &data, op);
  1277. if ((!kvm_eventfds_enabled()) &&
  1278. memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
  1279. return MEMTX_OK;
  1280. }
  1281. if (mr->ops->write) {
  1282. return access_with_adjusted_size(addr, &data, size,
  1283. mr->ops->impl.min_access_size,
  1284. mr->ops->impl.max_access_size,
  1285. memory_region_write_accessor, mr,
  1286. attrs);
  1287. } else {
  1288. return
  1289. access_with_adjusted_size(addr, &data, size,
  1290. mr->ops->impl.min_access_size,
  1291. mr->ops->impl.max_access_size,
  1292. memory_region_write_with_attrs_accessor,
  1293. mr, attrs);
  1294. }
  1295. }
  1296. void memory_region_init_io(MemoryRegion *mr,
  1297. Object *owner,
  1298. const MemoryRegionOps *ops,
  1299. void *opaque,
  1300. const char *name,
  1301. uint64_t size)
  1302. {
  1303. memory_region_init(mr, owner, name, size);
  1304. mr->ops = ops ? ops : &unassigned_mem_ops;
  1305. mr->opaque = opaque;
  1306. mr->terminates = true;
  1307. }
  1308. void memory_region_init_ram_nomigrate(MemoryRegion *mr,
  1309. Object *owner,
  1310. const char *name,
  1311. uint64_t size,
  1312. Error **errp)
  1313. {
  1314. memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
  1315. }
  1316. void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
  1317. Object *owner,
  1318. const char *name,
  1319. uint64_t size,
  1320. bool share,
  1321. Error **errp)
  1322. {
  1323. Error *err = NULL;
  1324. memory_region_init(mr, owner, name, size);
  1325. mr->ram = true;
  1326. mr->terminates = true;
  1327. mr->destructor = memory_region_destructor_ram;
  1328. mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
  1329. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1330. if (err) {
  1331. mr->size = int128_zero();
  1332. object_unparent(OBJECT(mr));
  1333. error_propagate(errp, err);
  1334. }
  1335. }
  1336. void memory_region_init_resizeable_ram(MemoryRegion *mr,
  1337. Object *owner,
  1338. const char *name,
  1339. uint64_t size,
  1340. uint64_t max_size,
  1341. void (*resized)(const char*,
  1342. uint64_t length,
  1343. void *host),
  1344. Error **errp)
  1345. {
  1346. Error *err = NULL;
  1347. memory_region_init(mr, owner, name, size);
  1348. mr->ram = true;
  1349. mr->terminates = true;
  1350. mr->destructor = memory_region_destructor_ram;
  1351. mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
  1352. mr, &err);
  1353. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1354. if (err) {
  1355. mr->size = int128_zero();
  1356. object_unparent(OBJECT(mr));
  1357. error_propagate(errp, err);
  1358. }
  1359. }
  1360. #ifdef CONFIG_POSIX
  1361. void memory_region_init_ram_from_file(MemoryRegion *mr,
  1362. struct Object *owner,
  1363. const char *name,
  1364. uint64_t size,
  1365. uint64_t align,
  1366. uint32_t ram_flags,
  1367. const char *path,
  1368. Error **errp)
  1369. {
  1370. Error *err = NULL;
  1371. memory_region_init(mr, owner, name, size);
  1372. mr->ram = true;
  1373. mr->terminates = true;
  1374. mr->destructor = memory_region_destructor_ram;
  1375. mr->align = align;
  1376. mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
  1377. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1378. if (err) {
  1379. mr->size = int128_zero();
  1380. object_unparent(OBJECT(mr));
  1381. error_propagate(errp, err);
  1382. }
  1383. }
  1384. void memory_region_init_ram_from_fd(MemoryRegion *mr,
  1385. struct Object *owner,
  1386. const char *name,
  1387. uint64_t size,
  1388. bool share,
  1389. int fd,
  1390. Error **errp)
  1391. {
  1392. Error *err = NULL;
  1393. memory_region_init(mr, owner, name, size);
  1394. mr->ram = true;
  1395. mr->terminates = true;
  1396. mr->destructor = memory_region_destructor_ram;
  1397. mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
  1398. share ? RAM_SHARED : 0,
  1399. fd, &err);
  1400. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1401. if (err) {
  1402. mr->size = int128_zero();
  1403. object_unparent(OBJECT(mr));
  1404. error_propagate(errp, err);
  1405. }
  1406. }
  1407. #endif
  1408. void memory_region_init_ram_ptr(MemoryRegion *mr,
  1409. Object *owner,
  1410. const char *name,
  1411. uint64_t size,
  1412. void *ptr)
  1413. {
  1414. memory_region_init(mr, owner, name, size);
  1415. mr->ram = true;
  1416. mr->terminates = true;
  1417. mr->destructor = memory_region_destructor_ram;
  1418. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1419. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1420. assert(ptr != NULL);
  1421. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1422. }
  1423. void memory_region_init_ram_device_ptr(MemoryRegion *mr,
  1424. Object *owner,
  1425. const char *name,
  1426. uint64_t size,
  1427. void *ptr)
  1428. {
  1429. memory_region_init(mr, owner, name, size);
  1430. mr->ram = true;
  1431. mr->terminates = true;
  1432. mr->ram_device = true;
  1433. mr->ops = &ram_device_mem_ops;
  1434. mr->opaque = mr;
  1435. mr->destructor = memory_region_destructor_ram;
  1436. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1437. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1438. assert(ptr != NULL);
  1439. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1440. }
  1441. void memory_region_init_alias(MemoryRegion *mr,
  1442. Object *owner,
  1443. const char *name,
  1444. MemoryRegion *orig,
  1445. hwaddr offset,
  1446. uint64_t size)
  1447. {
  1448. memory_region_init(mr, owner, name, size);
  1449. mr->alias = orig;
  1450. mr->alias_offset = offset;
  1451. }
  1452. void memory_region_init_rom_nomigrate(MemoryRegion *mr,
  1453. struct Object *owner,
  1454. const char *name,
  1455. uint64_t size,
  1456. Error **errp)
  1457. {
  1458. Error *err = NULL;
  1459. memory_region_init(mr, owner, name, size);
  1460. mr->ram = true;
  1461. mr->readonly = true;
  1462. mr->terminates = true;
  1463. mr->destructor = memory_region_destructor_ram;
  1464. mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
  1465. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1466. if (err) {
  1467. mr->size = int128_zero();
  1468. object_unparent(OBJECT(mr));
  1469. error_propagate(errp, err);
  1470. }
  1471. }
  1472. void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
  1473. Object *owner,
  1474. const MemoryRegionOps *ops,
  1475. void *opaque,
  1476. const char *name,
  1477. uint64_t size,
  1478. Error **errp)
  1479. {
  1480. Error *err = NULL;
  1481. assert(ops);
  1482. memory_region_init(mr, owner, name, size);
  1483. mr->ops = ops;
  1484. mr->opaque = opaque;
  1485. mr->terminates = true;
  1486. mr->rom_device = true;
  1487. mr->destructor = memory_region_destructor_ram;
  1488. mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
  1489. if (err) {
  1490. mr->size = int128_zero();
  1491. object_unparent(OBJECT(mr));
  1492. error_propagate(errp, err);
  1493. }
  1494. }
  1495. void memory_region_init_iommu(void *_iommu_mr,
  1496. size_t instance_size,
  1497. const char *mrtypename,
  1498. Object *owner,
  1499. const char *name,
  1500. uint64_t size)
  1501. {
  1502. struct IOMMUMemoryRegion *iommu_mr;
  1503. struct MemoryRegion *mr;
  1504. object_initialize(_iommu_mr, instance_size, mrtypename);
  1505. mr = MEMORY_REGION(_iommu_mr);
  1506. memory_region_do_init(mr, owner, name, size);
  1507. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1508. mr->terminates = true; /* then re-forwards */
  1509. QLIST_INIT(&iommu_mr->iommu_notify);
  1510. iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
  1511. }
  1512. static void memory_region_finalize(Object *obj)
  1513. {
  1514. MemoryRegion *mr = MEMORY_REGION(obj);
  1515. assert(!mr->container);
  1516. /* We know the region is not visible in any address space (it
  1517. * does not have a container and cannot be a root either because
  1518. * it has no references, so we can blindly clear mr->enabled.
  1519. * memory_region_set_enabled instead could trigger a transaction
  1520. * and cause an infinite loop.
  1521. */
  1522. mr->enabled = false;
  1523. memory_region_transaction_begin();
  1524. while (!QTAILQ_EMPTY(&mr->subregions)) {
  1525. MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
  1526. memory_region_del_subregion(mr, subregion);
  1527. }
  1528. memory_region_transaction_commit();
  1529. mr->destructor(mr);
  1530. memory_region_clear_coalescing(mr);
  1531. g_free((char *)mr->name);
  1532. g_free(mr->ioeventfds);
  1533. }
  1534. Object *memory_region_owner(MemoryRegion *mr)
  1535. {
  1536. Object *obj = OBJECT(mr);
  1537. return obj->parent;
  1538. }
  1539. void memory_region_ref(MemoryRegion *mr)
  1540. {
  1541. /* MMIO callbacks most likely will access data that belongs
  1542. * to the owner, hence the need to ref/unref the owner whenever
  1543. * the memory region is in use.
  1544. *
  1545. * The memory region is a child of its owner. As long as the
  1546. * owner doesn't call unparent itself on the memory region,
  1547. * ref-ing the owner will also keep the memory region alive.
  1548. * Memory regions without an owner are supposed to never go away;
  1549. * we do not ref/unref them because it slows down DMA sensibly.
  1550. */
  1551. if (mr && mr->owner) {
  1552. object_ref(mr->owner);
  1553. }
  1554. }
  1555. void memory_region_unref(MemoryRegion *mr)
  1556. {
  1557. if (mr && mr->owner) {
  1558. object_unref(mr->owner);
  1559. }
  1560. }
  1561. uint64_t memory_region_size(MemoryRegion *mr)
  1562. {
  1563. if (int128_eq(mr->size, int128_2_64())) {
  1564. return UINT64_MAX;
  1565. }
  1566. return int128_get64(mr->size);
  1567. }
  1568. const char *memory_region_name(const MemoryRegion *mr)
  1569. {
  1570. if (!mr->name) {
  1571. ((MemoryRegion *)mr)->name =
  1572. object_get_canonical_path_component(OBJECT(mr));
  1573. }
  1574. return mr->name;
  1575. }
  1576. bool memory_region_is_ram_device(MemoryRegion *mr)
  1577. {
  1578. return mr->ram_device;
  1579. }
  1580. uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
  1581. {
  1582. uint8_t mask = mr->dirty_log_mask;
  1583. if (global_dirty_log && mr->ram_block) {
  1584. mask |= (1 << DIRTY_MEMORY_MIGRATION);
  1585. }
  1586. return mask;
  1587. }
  1588. bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
  1589. {
  1590. return memory_region_get_dirty_log_mask(mr) & (1 << client);
  1591. }
  1592. static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
  1593. Error **errp)
  1594. {
  1595. IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
  1596. IOMMUNotifier *iommu_notifier;
  1597. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1598. int ret = 0;
  1599. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1600. flags |= iommu_notifier->notifier_flags;
  1601. }
  1602. if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
  1603. ret = imrc->notify_flag_changed(iommu_mr,
  1604. iommu_mr->iommu_notify_flags,
  1605. flags, errp);
  1606. }
  1607. if (!ret) {
  1608. iommu_mr->iommu_notify_flags = flags;
  1609. }
  1610. return ret;
  1611. }
  1612. int memory_region_register_iommu_notifier(MemoryRegion *mr,
  1613. IOMMUNotifier *n, Error **errp)
  1614. {
  1615. IOMMUMemoryRegion *iommu_mr;
  1616. int ret;
  1617. if (mr->alias) {
  1618. return memory_region_register_iommu_notifier(mr->alias, n, errp);
  1619. }
  1620. /* We need to register for at least one bitfield */
  1621. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1622. assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
  1623. assert(n->start <= n->end);
  1624. assert(n->iommu_idx >= 0 &&
  1625. n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
  1626. QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
  1627. ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
  1628. if (ret) {
  1629. QLIST_REMOVE(n, node);
  1630. }
  1631. return ret;
  1632. }
  1633. uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
  1634. {
  1635. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1636. if (imrc->get_min_page_size) {
  1637. return imrc->get_min_page_size(iommu_mr);
  1638. }
  1639. return TARGET_PAGE_SIZE;
  1640. }
  1641. void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
  1642. {
  1643. MemoryRegion *mr = MEMORY_REGION(iommu_mr);
  1644. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1645. hwaddr addr, granularity;
  1646. IOMMUTLBEntry iotlb;
  1647. /* If the IOMMU has its own replay callback, override */
  1648. if (imrc->replay) {
  1649. imrc->replay(iommu_mr, n);
  1650. return;
  1651. }
  1652. granularity = memory_region_iommu_get_min_page_size(iommu_mr);
  1653. for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
  1654. iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
  1655. if (iotlb.perm != IOMMU_NONE) {
  1656. n->notify(n, &iotlb);
  1657. }
  1658. /* if (2^64 - MR size) < granularity, it's possible to get an
  1659. * infinite loop here. This should catch such a wraparound */
  1660. if ((addr + granularity) < addr) {
  1661. break;
  1662. }
  1663. }
  1664. }
  1665. void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
  1666. IOMMUNotifier *n)
  1667. {
  1668. IOMMUMemoryRegion *iommu_mr;
  1669. if (mr->alias) {
  1670. memory_region_unregister_iommu_notifier(mr->alias, n);
  1671. return;
  1672. }
  1673. QLIST_REMOVE(n, node);
  1674. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1675. memory_region_update_iommu_notify_flags(iommu_mr, NULL);
  1676. }
  1677. void memory_region_notify_one(IOMMUNotifier *notifier,
  1678. IOMMUTLBEntry *entry)
  1679. {
  1680. IOMMUNotifierFlag request_flags;
  1681. hwaddr entry_end = entry->iova + entry->addr_mask;
  1682. /*
  1683. * Skip the notification if the notification does not overlap
  1684. * with registered range.
  1685. */
  1686. if (notifier->start > entry_end || notifier->end < entry->iova) {
  1687. return;
  1688. }
  1689. assert(entry->iova >= notifier->start && entry_end <= notifier->end);
  1690. if (entry->perm & IOMMU_RW) {
  1691. request_flags = IOMMU_NOTIFIER_MAP;
  1692. } else {
  1693. request_flags = IOMMU_NOTIFIER_UNMAP;
  1694. }
  1695. if (notifier->notifier_flags & request_flags) {
  1696. notifier->notify(notifier, entry);
  1697. }
  1698. }
  1699. void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
  1700. int iommu_idx,
  1701. IOMMUTLBEntry entry)
  1702. {
  1703. IOMMUNotifier *iommu_notifier;
  1704. assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
  1705. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1706. if (iommu_notifier->iommu_idx == iommu_idx) {
  1707. memory_region_notify_one(iommu_notifier, &entry);
  1708. }
  1709. }
  1710. }
  1711. int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
  1712. enum IOMMUMemoryRegionAttr attr,
  1713. void *data)
  1714. {
  1715. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1716. if (!imrc->get_attr) {
  1717. return -EINVAL;
  1718. }
  1719. return imrc->get_attr(iommu_mr, attr, data);
  1720. }
  1721. int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
  1722. MemTxAttrs attrs)
  1723. {
  1724. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1725. if (!imrc->attrs_to_index) {
  1726. return 0;
  1727. }
  1728. return imrc->attrs_to_index(iommu_mr, attrs);
  1729. }
  1730. int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
  1731. {
  1732. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1733. if (!imrc->num_indexes) {
  1734. return 1;
  1735. }
  1736. return imrc->num_indexes(iommu_mr);
  1737. }
  1738. void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
  1739. {
  1740. uint8_t mask = 1 << client;
  1741. uint8_t old_logging;
  1742. assert(client == DIRTY_MEMORY_VGA);
  1743. old_logging = mr->vga_logging_count;
  1744. mr->vga_logging_count += log ? 1 : -1;
  1745. if (!!old_logging == !!mr->vga_logging_count) {
  1746. return;
  1747. }
  1748. memory_region_transaction_begin();
  1749. mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
  1750. memory_region_update_pending |= mr->enabled;
  1751. memory_region_transaction_commit();
  1752. }
  1753. void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
  1754. hwaddr size)
  1755. {
  1756. assert(mr->ram_block);
  1757. cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
  1758. size,
  1759. memory_region_get_dirty_log_mask(mr));
  1760. }
  1761. static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
  1762. {
  1763. MemoryListener *listener;
  1764. AddressSpace *as;
  1765. FlatView *view;
  1766. FlatRange *fr;
  1767. /* If the same address space has multiple log_sync listeners, we
  1768. * visit that address space's FlatView multiple times. But because
  1769. * log_sync listeners are rare, it's still cheaper than walking each
  1770. * address space once.
  1771. */
  1772. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1773. if (!listener->log_sync) {
  1774. continue;
  1775. }
  1776. as = listener->address_space;
  1777. view = address_space_get_flatview(as);
  1778. FOR_EACH_FLAT_RANGE(fr, view) {
  1779. if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
  1780. MemoryRegionSection mrs = section_from_flat_range(fr, view);
  1781. listener->log_sync(listener, &mrs);
  1782. }
  1783. }
  1784. flatview_unref(view);
  1785. }
  1786. }
  1787. void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
  1788. hwaddr len)
  1789. {
  1790. MemoryRegionSection mrs;
  1791. MemoryListener *listener;
  1792. AddressSpace *as;
  1793. FlatView *view;
  1794. FlatRange *fr;
  1795. hwaddr sec_start, sec_end, sec_size;
  1796. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1797. if (!listener->log_clear) {
  1798. continue;
  1799. }
  1800. as = listener->address_space;
  1801. view = address_space_get_flatview(as);
  1802. FOR_EACH_FLAT_RANGE(fr, view) {
  1803. if (!fr->dirty_log_mask || fr->mr != mr) {
  1804. /*
  1805. * Clear dirty bitmap operation only applies to those
  1806. * regions whose dirty logging is at least enabled
  1807. */
  1808. continue;
  1809. }
  1810. mrs = section_from_flat_range(fr, view);
  1811. sec_start = MAX(mrs.offset_within_region, start);
  1812. sec_end = mrs.offset_within_region + int128_get64(mrs.size);
  1813. sec_end = MIN(sec_end, start + len);
  1814. if (sec_start >= sec_end) {
  1815. /*
  1816. * If this memory region section has no intersection
  1817. * with the requested range, skip.
  1818. */
  1819. continue;
  1820. }
  1821. /* Valid case; shrink the section if needed */
  1822. mrs.offset_within_address_space +=
  1823. sec_start - mrs.offset_within_region;
  1824. mrs.offset_within_region = sec_start;
  1825. sec_size = sec_end - sec_start;
  1826. mrs.size = int128_make64(sec_size);
  1827. listener->log_clear(listener, &mrs);
  1828. }
  1829. flatview_unref(view);
  1830. }
  1831. }
  1832. DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
  1833. hwaddr addr,
  1834. hwaddr size,
  1835. unsigned client)
  1836. {
  1837. DirtyBitmapSnapshot *snapshot;
  1838. assert(mr->ram_block);
  1839. memory_region_sync_dirty_bitmap(mr);
  1840. snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
  1841. memory_global_after_dirty_log_sync();
  1842. return snapshot;
  1843. }
  1844. bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
  1845. hwaddr addr, hwaddr size)
  1846. {
  1847. assert(mr->ram_block);
  1848. return cpu_physical_memory_snapshot_get_dirty(snap,
  1849. memory_region_get_ram_addr(mr) + addr, size);
  1850. }
  1851. void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
  1852. {
  1853. if (mr->readonly != readonly) {
  1854. memory_region_transaction_begin();
  1855. mr->readonly = readonly;
  1856. memory_region_update_pending |= mr->enabled;
  1857. memory_region_transaction_commit();
  1858. }
  1859. }
  1860. void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
  1861. {
  1862. if (mr->nonvolatile != nonvolatile) {
  1863. memory_region_transaction_begin();
  1864. mr->nonvolatile = nonvolatile;
  1865. memory_region_update_pending |= mr->enabled;
  1866. memory_region_transaction_commit();
  1867. }
  1868. }
  1869. void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
  1870. {
  1871. if (mr->romd_mode != romd_mode) {
  1872. memory_region_transaction_begin();
  1873. mr->romd_mode = romd_mode;
  1874. memory_region_update_pending |= mr->enabled;
  1875. memory_region_transaction_commit();
  1876. }
  1877. }
  1878. void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
  1879. hwaddr size, unsigned client)
  1880. {
  1881. assert(mr->ram_block);
  1882. cpu_physical_memory_test_and_clear_dirty(
  1883. memory_region_get_ram_addr(mr) + addr, size, client);
  1884. }
  1885. int memory_region_get_fd(MemoryRegion *mr)
  1886. {
  1887. int fd;
  1888. RCU_READ_LOCK_GUARD();
  1889. while (mr->alias) {
  1890. mr = mr->alias;
  1891. }
  1892. fd = mr->ram_block->fd;
  1893. return fd;
  1894. }
  1895. void *memory_region_get_ram_ptr(MemoryRegion *mr)
  1896. {
  1897. void *ptr;
  1898. uint64_t offset = 0;
  1899. RCU_READ_LOCK_GUARD();
  1900. while (mr->alias) {
  1901. offset += mr->alias_offset;
  1902. mr = mr->alias;
  1903. }
  1904. assert(mr->ram_block);
  1905. ptr = qemu_map_ram_ptr(mr->ram_block, offset);
  1906. return ptr;
  1907. }
  1908. MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
  1909. {
  1910. RAMBlock *block;
  1911. block = qemu_ram_block_from_host(ptr, false, offset);
  1912. if (!block) {
  1913. return NULL;
  1914. }
  1915. return block->mr;
  1916. }
  1917. ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
  1918. {
  1919. return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
  1920. }
  1921. void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
  1922. {
  1923. assert(mr->ram_block);
  1924. qemu_ram_resize(mr->ram_block, newsize, errp);
  1925. }
  1926. /*
  1927. * Call proper memory listeners about the change on the newly
  1928. * added/removed CoalescedMemoryRange.
  1929. */
  1930. static void memory_region_update_coalesced_range(MemoryRegion *mr,
  1931. CoalescedMemoryRange *cmr,
  1932. bool add)
  1933. {
  1934. AddressSpace *as;
  1935. FlatView *view;
  1936. FlatRange *fr;
  1937. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  1938. view = address_space_get_flatview(as);
  1939. FOR_EACH_FLAT_RANGE(fr, view) {
  1940. if (fr->mr == mr) {
  1941. flat_range_coalesced_io_notify(fr, as, cmr, add);
  1942. }
  1943. }
  1944. flatview_unref(view);
  1945. }
  1946. }
  1947. void memory_region_set_coalescing(MemoryRegion *mr)
  1948. {
  1949. memory_region_clear_coalescing(mr);
  1950. memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
  1951. }
  1952. void memory_region_add_coalescing(MemoryRegion *mr,
  1953. hwaddr offset,
  1954. uint64_t size)
  1955. {
  1956. CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
  1957. cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
  1958. QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
  1959. memory_region_update_coalesced_range(mr, cmr, true);
  1960. memory_region_set_flush_coalesced(mr);
  1961. }
  1962. void memory_region_clear_coalescing(MemoryRegion *mr)
  1963. {
  1964. CoalescedMemoryRange *cmr;
  1965. if (QTAILQ_EMPTY(&mr->coalesced)) {
  1966. return;
  1967. }
  1968. qemu_flush_coalesced_mmio_buffer();
  1969. mr->flush_coalesced_mmio = false;
  1970. while (!QTAILQ_EMPTY(&mr->coalesced)) {
  1971. cmr = QTAILQ_FIRST(&mr->coalesced);
  1972. QTAILQ_REMOVE(&mr->coalesced, cmr, link);
  1973. memory_region_update_coalesced_range(mr, cmr, false);
  1974. g_free(cmr);
  1975. }
  1976. }
  1977. void memory_region_set_flush_coalesced(MemoryRegion *mr)
  1978. {
  1979. mr->flush_coalesced_mmio = true;
  1980. }
  1981. void memory_region_clear_flush_coalesced(MemoryRegion *mr)
  1982. {
  1983. qemu_flush_coalesced_mmio_buffer();
  1984. if (QTAILQ_EMPTY(&mr->coalesced)) {
  1985. mr->flush_coalesced_mmio = false;
  1986. }
  1987. }
  1988. void memory_region_clear_global_locking(MemoryRegion *mr)
  1989. {
  1990. mr->global_locking = false;
  1991. }
  1992. static bool userspace_eventfd_warning;
  1993. void memory_region_add_eventfd(MemoryRegion *mr,
  1994. hwaddr addr,
  1995. unsigned size,
  1996. bool match_data,
  1997. uint64_t data,
  1998. EventNotifier *e)
  1999. {
  2000. MemoryRegionIoeventfd mrfd = {
  2001. .addr.start = int128_make64(addr),
  2002. .addr.size = int128_make64(size),
  2003. .match_data = match_data,
  2004. .data = data,
  2005. .e = e,
  2006. };
  2007. unsigned i;
  2008. if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
  2009. userspace_eventfd_warning))) {
  2010. userspace_eventfd_warning = true;
  2011. error_report("Using eventfd without MMIO binding in KVM. "
  2012. "Suboptimal performance expected");
  2013. }
  2014. if (size) {
  2015. adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
  2016. }
  2017. memory_region_transaction_begin();
  2018. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  2019. if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
  2020. break;
  2021. }
  2022. }
  2023. ++mr->ioeventfd_nb;
  2024. mr->ioeventfds = g_realloc(mr->ioeventfds,
  2025. sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
  2026. memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
  2027. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
  2028. mr->ioeventfds[i] = mrfd;
  2029. ioeventfd_update_pending |= mr->enabled;
  2030. memory_region_transaction_commit();
  2031. }
  2032. void memory_region_del_eventfd(MemoryRegion *mr,
  2033. hwaddr addr,
  2034. unsigned size,
  2035. bool match_data,
  2036. uint64_t data,
  2037. EventNotifier *e)
  2038. {
  2039. MemoryRegionIoeventfd mrfd = {
  2040. .addr.start = int128_make64(addr),
  2041. .addr.size = int128_make64(size),
  2042. .match_data = match_data,
  2043. .data = data,
  2044. .e = e,
  2045. };
  2046. unsigned i;
  2047. if (size) {
  2048. adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
  2049. }
  2050. memory_region_transaction_begin();
  2051. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  2052. if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
  2053. break;
  2054. }
  2055. }
  2056. assert(i != mr->ioeventfd_nb);
  2057. memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
  2058. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
  2059. --mr->ioeventfd_nb;
  2060. mr->ioeventfds = g_realloc(mr->ioeventfds,
  2061. sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
  2062. ioeventfd_update_pending |= mr->enabled;
  2063. memory_region_transaction_commit();
  2064. }
  2065. static void memory_region_update_container_subregions(MemoryRegion *subregion)
  2066. {
  2067. MemoryRegion *mr = subregion->container;
  2068. MemoryRegion *other;
  2069. memory_region_transaction_begin();
  2070. memory_region_ref(subregion);
  2071. QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
  2072. if (subregion->priority >= other->priority) {
  2073. QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
  2074. goto done;
  2075. }
  2076. }
  2077. QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
  2078. done:
  2079. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2080. memory_region_transaction_commit();
  2081. }
  2082. static void memory_region_add_subregion_common(MemoryRegion *mr,
  2083. hwaddr offset,
  2084. MemoryRegion *subregion)
  2085. {
  2086. assert(!subregion->container);
  2087. subregion->container = mr;
  2088. subregion->addr = offset;
  2089. memory_region_update_container_subregions(subregion);
  2090. }
  2091. void memory_region_add_subregion(MemoryRegion *mr,
  2092. hwaddr offset,
  2093. MemoryRegion *subregion)
  2094. {
  2095. subregion->priority = 0;
  2096. memory_region_add_subregion_common(mr, offset, subregion);
  2097. }
  2098. void memory_region_add_subregion_overlap(MemoryRegion *mr,
  2099. hwaddr offset,
  2100. MemoryRegion *subregion,
  2101. int priority)
  2102. {
  2103. subregion->priority = priority;
  2104. memory_region_add_subregion_common(mr, offset, subregion);
  2105. }
  2106. void memory_region_del_subregion(MemoryRegion *mr,
  2107. MemoryRegion *subregion)
  2108. {
  2109. memory_region_transaction_begin();
  2110. assert(subregion->container == mr);
  2111. subregion->container = NULL;
  2112. QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
  2113. memory_region_unref(subregion);
  2114. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2115. memory_region_transaction_commit();
  2116. }
  2117. void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
  2118. {
  2119. if (enabled == mr->enabled) {
  2120. return;
  2121. }
  2122. memory_region_transaction_begin();
  2123. mr->enabled = enabled;
  2124. memory_region_update_pending = true;
  2125. memory_region_transaction_commit();
  2126. }
  2127. void memory_region_set_size(MemoryRegion *mr, uint64_t size)
  2128. {
  2129. Int128 s = int128_make64(size);
  2130. if (size == UINT64_MAX) {
  2131. s = int128_2_64();
  2132. }
  2133. if (int128_eq(s, mr->size)) {
  2134. return;
  2135. }
  2136. memory_region_transaction_begin();
  2137. mr->size = s;
  2138. memory_region_update_pending = true;
  2139. memory_region_transaction_commit();
  2140. }
  2141. static void memory_region_readd_subregion(MemoryRegion *mr)
  2142. {
  2143. MemoryRegion *container = mr->container;
  2144. if (container) {
  2145. memory_region_transaction_begin();
  2146. memory_region_ref(mr);
  2147. memory_region_del_subregion(container, mr);
  2148. mr->container = container;
  2149. memory_region_update_container_subregions(mr);
  2150. memory_region_unref(mr);
  2151. memory_region_transaction_commit();
  2152. }
  2153. }
  2154. void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
  2155. {
  2156. if (addr != mr->addr) {
  2157. mr->addr = addr;
  2158. memory_region_readd_subregion(mr);
  2159. }
  2160. }
  2161. void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
  2162. {
  2163. assert(mr->alias);
  2164. if (offset == mr->alias_offset) {
  2165. return;
  2166. }
  2167. memory_region_transaction_begin();
  2168. mr->alias_offset = offset;
  2169. memory_region_update_pending |= mr->enabled;
  2170. memory_region_transaction_commit();
  2171. }
  2172. uint64_t memory_region_get_alignment(const MemoryRegion *mr)
  2173. {
  2174. return mr->align;
  2175. }
  2176. static int cmp_flatrange_addr(const void *addr_, const void *fr_)
  2177. {
  2178. const AddrRange *addr = addr_;
  2179. const FlatRange *fr = fr_;
  2180. if (int128_le(addrrange_end(*addr), fr->addr.start)) {
  2181. return -1;
  2182. } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
  2183. return 1;
  2184. }
  2185. return 0;
  2186. }
  2187. static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
  2188. {
  2189. return bsearch(&addr, view->ranges, view->nr,
  2190. sizeof(FlatRange), cmp_flatrange_addr);
  2191. }
  2192. bool memory_region_is_mapped(MemoryRegion *mr)
  2193. {
  2194. return mr->container ? true : false;
  2195. }
  2196. /* Same as memory_region_find, but it does not add a reference to the
  2197. * returned region. It must be called from an RCU critical section.
  2198. */
  2199. static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
  2200. hwaddr addr, uint64_t size)
  2201. {
  2202. MemoryRegionSection ret = { .mr = NULL };
  2203. MemoryRegion *root;
  2204. AddressSpace *as;
  2205. AddrRange range;
  2206. FlatView *view;
  2207. FlatRange *fr;
  2208. addr += mr->addr;
  2209. for (root = mr; root->container; ) {
  2210. root = root->container;
  2211. addr += root->addr;
  2212. }
  2213. as = memory_region_to_address_space(root);
  2214. if (!as) {
  2215. return ret;
  2216. }
  2217. range = addrrange_make(int128_make64(addr), int128_make64(size));
  2218. view = address_space_to_flatview(as);
  2219. fr = flatview_lookup(view, range);
  2220. if (!fr) {
  2221. return ret;
  2222. }
  2223. while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
  2224. --fr;
  2225. }
  2226. ret.mr = fr->mr;
  2227. ret.fv = view;
  2228. range = addrrange_intersection(range, fr->addr);
  2229. ret.offset_within_region = fr->offset_in_region;
  2230. ret.offset_within_region += int128_get64(int128_sub(range.start,
  2231. fr->addr.start));
  2232. ret.size = range.size;
  2233. ret.offset_within_address_space = int128_get64(range.start);
  2234. ret.readonly = fr->readonly;
  2235. ret.nonvolatile = fr->nonvolatile;
  2236. return ret;
  2237. }
  2238. MemoryRegionSection memory_region_find(MemoryRegion *mr,
  2239. hwaddr addr, uint64_t size)
  2240. {
  2241. MemoryRegionSection ret;
  2242. RCU_READ_LOCK_GUARD();
  2243. ret = memory_region_find_rcu(mr, addr, size);
  2244. if (ret.mr) {
  2245. memory_region_ref(ret.mr);
  2246. }
  2247. return ret;
  2248. }
  2249. bool memory_region_present(MemoryRegion *container, hwaddr addr)
  2250. {
  2251. MemoryRegion *mr;
  2252. RCU_READ_LOCK_GUARD();
  2253. mr = memory_region_find_rcu(container, addr, 1).mr;
  2254. return mr && mr != container;
  2255. }
  2256. void memory_global_dirty_log_sync(void)
  2257. {
  2258. memory_region_sync_dirty_bitmap(NULL);
  2259. }
  2260. void memory_global_after_dirty_log_sync(void)
  2261. {
  2262. MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
  2263. }
  2264. static VMChangeStateEntry *vmstate_change;
  2265. void memory_global_dirty_log_start(void)
  2266. {
  2267. if (vmstate_change) {
  2268. qemu_del_vm_change_state_handler(vmstate_change);
  2269. vmstate_change = NULL;
  2270. }
  2271. global_dirty_log = true;
  2272. MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
  2273. /* Refresh DIRTY_MEMORY_MIGRATION bit. */
  2274. memory_region_transaction_begin();
  2275. memory_region_update_pending = true;
  2276. memory_region_transaction_commit();
  2277. }
  2278. static void memory_global_dirty_log_do_stop(void)
  2279. {
  2280. global_dirty_log = false;
  2281. /* Refresh DIRTY_MEMORY_MIGRATION bit. */
  2282. memory_region_transaction_begin();
  2283. memory_region_update_pending = true;
  2284. memory_region_transaction_commit();
  2285. MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
  2286. }
  2287. static void memory_vm_change_state_handler(void *opaque, int running,
  2288. RunState state)
  2289. {
  2290. if (running) {
  2291. memory_global_dirty_log_do_stop();
  2292. if (vmstate_change) {
  2293. qemu_del_vm_change_state_handler(vmstate_change);
  2294. vmstate_change = NULL;
  2295. }
  2296. }
  2297. }
  2298. void memory_global_dirty_log_stop(void)
  2299. {
  2300. if (!runstate_is_running()) {
  2301. if (vmstate_change) {
  2302. return;
  2303. }
  2304. vmstate_change = qemu_add_vm_change_state_handler(
  2305. memory_vm_change_state_handler, NULL);
  2306. return;
  2307. }
  2308. memory_global_dirty_log_do_stop();
  2309. }
  2310. static void listener_add_address_space(MemoryListener *listener,
  2311. AddressSpace *as)
  2312. {
  2313. FlatView *view;
  2314. FlatRange *fr;
  2315. if (listener->begin) {
  2316. listener->begin(listener);
  2317. }
  2318. if (global_dirty_log) {
  2319. if (listener->log_global_start) {
  2320. listener->log_global_start(listener);
  2321. }
  2322. }
  2323. view = address_space_get_flatview(as);
  2324. FOR_EACH_FLAT_RANGE(fr, view) {
  2325. MemoryRegionSection section = section_from_flat_range(fr, view);
  2326. if (listener->region_add) {
  2327. listener->region_add(listener, &section);
  2328. }
  2329. if (fr->dirty_log_mask && listener->log_start) {
  2330. listener->log_start(listener, &section, 0, fr->dirty_log_mask);
  2331. }
  2332. }
  2333. if (listener->commit) {
  2334. listener->commit(listener);
  2335. }
  2336. flatview_unref(view);
  2337. }
  2338. static void listener_del_address_space(MemoryListener *listener,
  2339. AddressSpace *as)
  2340. {
  2341. FlatView *view;
  2342. FlatRange *fr;
  2343. if (listener->begin) {
  2344. listener->begin(listener);
  2345. }
  2346. view = address_space_get_flatview(as);
  2347. FOR_EACH_FLAT_RANGE(fr, view) {
  2348. MemoryRegionSection section = section_from_flat_range(fr, view);
  2349. if (fr->dirty_log_mask && listener->log_stop) {
  2350. listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
  2351. }
  2352. if (listener->region_del) {
  2353. listener->region_del(listener, &section);
  2354. }
  2355. }
  2356. if (listener->commit) {
  2357. listener->commit(listener);
  2358. }
  2359. flatview_unref(view);
  2360. }
  2361. void memory_listener_register(MemoryListener *listener, AddressSpace *as)
  2362. {
  2363. MemoryListener *other = NULL;
  2364. listener->address_space = as;
  2365. if (QTAILQ_EMPTY(&memory_listeners)
  2366. || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
  2367. QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
  2368. } else {
  2369. QTAILQ_FOREACH(other, &memory_listeners, link) {
  2370. if (listener->priority < other->priority) {
  2371. break;
  2372. }
  2373. }
  2374. QTAILQ_INSERT_BEFORE(other, listener, link);
  2375. }
  2376. if (QTAILQ_EMPTY(&as->listeners)
  2377. || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
  2378. QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
  2379. } else {
  2380. QTAILQ_FOREACH(other, &as->listeners, link_as) {
  2381. if (listener->priority < other->priority) {
  2382. break;
  2383. }
  2384. }
  2385. QTAILQ_INSERT_BEFORE(other, listener, link_as);
  2386. }
  2387. listener_add_address_space(listener, as);
  2388. }
  2389. void memory_listener_unregister(MemoryListener *listener)
  2390. {
  2391. if (!listener->address_space) {
  2392. return;
  2393. }
  2394. listener_del_address_space(listener, listener->address_space);
  2395. QTAILQ_REMOVE(&memory_listeners, listener, link);
  2396. QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
  2397. listener->address_space = NULL;
  2398. }
  2399. void address_space_remove_listeners(AddressSpace *as)
  2400. {
  2401. while (!QTAILQ_EMPTY(&as->listeners)) {
  2402. memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
  2403. }
  2404. }
  2405. void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
  2406. {
  2407. memory_region_ref(root);
  2408. as->root = root;
  2409. as->current_map = NULL;
  2410. as->ioeventfd_nb = 0;
  2411. as->ioeventfds = NULL;
  2412. QTAILQ_INIT(&as->listeners);
  2413. QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
  2414. as->name = g_strdup(name ? name : "anonymous");
  2415. address_space_update_topology(as);
  2416. address_space_update_ioeventfds(as);
  2417. }
  2418. static void do_address_space_destroy(AddressSpace *as)
  2419. {
  2420. assert(QTAILQ_EMPTY(&as->listeners));
  2421. flatview_unref(as->current_map);
  2422. g_free(as->name);
  2423. g_free(as->ioeventfds);
  2424. memory_region_unref(as->root);
  2425. }
  2426. void address_space_destroy(AddressSpace *as)
  2427. {
  2428. MemoryRegion *root = as->root;
  2429. /* Flush out anything from MemoryListeners listening in on this */
  2430. memory_region_transaction_begin();
  2431. as->root = NULL;
  2432. memory_region_transaction_commit();
  2433. QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
  2434. /* At this point, as->dispatch and as->current_map are dummy
  2435. * entries that the guest should never use. Wait for the old
  2436. * values to expire before freeing the data.
  2437. */
  2438. as->root = root;
  2439. call_rcu(as, do_address_space_destroy, rcu);
  2440. }
  2441. static const char *memory_region_type(MemoryRegion *mr)
  2442. {
  2443. if (memory_region_is_ram_device(mr)) {
  2444. return "ramd";
  2445. } else if (memory_region_is_romd(mr)) {
  2446. return "romd";
  2447. } else if (memory_region_is_rom(mr)) {
  2448. return "rom";
  2449. } else if (memory_region_is_ram(mr)) {
  2450. return "ram";
  2451. } else {
  2452. return "i/o";
  2453. }
  2454. }
  2455. typedef struct MemoryRegionList MemoryRegionList;
  2456. struct MemoryRegionList {
  2457. const MemoryRegion *mr;
  2458. QTAILQ_ENTRY(MemoryRegionList) mrqueue;
  2459. };
  2460. typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
  2461. #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
  2462. int128_sub((size), int128_one())) : 0)
  2463. #define MTREE_INDENT " "
  2464. static void mtree_expand_owner(const char *label, Object *obj)
  2465. {
  2466. DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
  2467. qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
  2468. if (dev && dev->id) {
  2469. qemu_printf(" id=%s", dev->id);
  2470. } else {
  2471. gchar *canonical_path = object_get_canonical_path(obj);
  2472. if (canonical_path) {
  2473. qemu_printf(" path=%s", canonical_path);
  2474. g_free(canonical_path);
  2475. } else {
  2476. qemu_printf(" type=%s", object_get_typename(obj));
  2477. }
  2478. }
  2479. qemu_printf("}");
  2480. }
  2481. static void mtree_print_mr_owner(const MemoryRegion *mr)
  2482. {
  2483. Object *owner = mr->owner;
  2484. Object *parent = memory_region_owner((MemoryRegion *)mr);
  2485. if (!owner && !parent) {
  2486. qemu_printf(" orphan");
  2487. return;
  2488. }
  2489. if (owner) {
  2490. mtree_expand_owner("owner", owner);
  2491. }
  2492. if (parent && parent != owner) {
  2493. mtree_expand_owner("parent", parent);
  2494. }
  2495. }
  2496. static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
  2497. hwaddr base,
  2498. MemoryRegionListHead *alias_print_queue,
  2499. bool owner)
  2500. {
  2501. MemoryRegionList *new_ml, *ml, *next_ml;
  2502. MemoryRegionListHead submr_print_queue;
  2503. const MemoryRegion *submr;
  2504. unsigned int i;
  2505. hwaddr cur_start, cur_end;
  2506. if (!mr) {
  2507. return;
  2508. }
  2509. for (i = 0; i < level; i++) {
  2510. qemu_printf(MTREE_INDENT);
  2511. }
  2512. cur_start = base + mr->addr;
  2513. cur_end = cur_start + MR_SIZE(mr->size);
  2514. /*
  2515. * Try to detect overflow of memory region. This should never
  2516. * happen normally. When it happens, we dump something to warn the
  2517. * user who is observing this.
  2518. */
  2519. if (cur_start < base || cur_end < cur_start) {
  2520. qemu_printf("[DETECTED OVERFLOW!] ");
  2521. }
  2522. if (mr->alias) {
  2523. MemoryRegionList *ml;
  2524. bool found = false;
  2525. /* check if the alias is already in the queue */
  2526. QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
  2527. if (ml->mr == mr->alias) {
  2528. found = true;
  2529. }
  2530. }
  2531. if (!found) {
  2532. ml = g_new(MemoryRegionList, 1);
  2533. ml->mr = mr->alias;
  2534. QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
  2535. }
  2536. qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
  2537. " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
  2538. "-" TARGET_FMT_plx "%s",
  2539. cur_start, cur_end,
  2540. mr->priority,
  2541. mr->nonvolatile ? "nv-" : "",
  2542. memory_region_type((MemoryRegion *)mr),
  2543. memory_region_name(mr),
  2544. memory_region_name(mr->alias),
  2545. mr->alias_offset,
  2546. mr->alias_offset + MR_SIZE(mr->size),
  2547. mr->enabled ? "" : " [disabled]");
  2548. if (owner) {
  2549. mtree_print_mr_owner(mr);
  2550. }
  2551. } else {
  2552. qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
  2553. " (prio %d, %s%s): %s%s",
  2554. cur_start, cur_end,
  2555. mr->priority,
  2556. mr->nonvolatile ? "nv-" : "",
  2557. memory_region_type((MemoryRegion *)mr),
  2558. memory_region_name(mr),
  2559. mr->enabled ? "" : " [disabled]");
  2560. if (owner) {
  2561. mtree_print_mr_owner(mr);
  2562. }
  2563. }
  2564. qemu_printf("\n");
  2565. QTAILQ_INIT(&submr_print_queue);
  2566. QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
  2567. new_ml = g_new(MemoryRegionList, 1);
  2568. new_ml->mr = submr;
  2569. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2570. if (new_ml->mr->addr < ml->mr->addr ||
  2571. (new_ml->mr->addr == ml->mr->addr &&
  2572. new_ml->mr->priority > ml->mr->priority)) {
  2573. QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
  2574. new_ml = NULL;
  2575. break;
  2576. }
  2577. }
  2578. if (new_ml) {
  2579. QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
  2580. }
  2581. }
  2582. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2583. mtree_print_mr(ml->mr, level + 1, cur_start,
  2584. alias_print_queue, owner);
  2585. }
  2586. QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
  2587. g_free(ml);
  2588. }
  2589. }
  2590. struct FlatViewInfo {
  2591. int counter;
  2592. bool dispatch_tree;
  2593. bool owner;
  2594. AccelClass *ac;
  2595. const char *ac_name;
  2596. };
  2597. static void mtree_print_flatview(gpointer key, gpointer value,
  2598. gpointer user_data)
  2599. {
  2600. FlatView *view = key;
  2601. GArray *fv_address_spaces = value;
  2602. struct FlatViewInfo *fvi = user_data;
  2603. FlatRange *range = &view->ranges[0];
  2604. MemoryRegion *mr;
  2605. int n = view->nr;
  2606. int i;
  2607. AddressSpace *as;
  2608. qemu_printf("FlatView #%d\n", fvi->counter);
  2609. ++fvi->counter;
  2610. for (i = 0; i < fv_address_spaces->len; ++i) {
  2611. as = g_array_index(fv_address_spaces, AddressSpace*, i);
  2612. qemu_printf(" AS \"%s\", root: %s",
  2613. as->name, memory_region_name(as->root));
  2614. if (as->root->alias) {
  2615. qemu_printf(", alias %s", memory_region_name(as->root->alias));
  2616. }
  2617. qemu_printf("\n");
  2618. }
  2619. qemu_printf(" Root memory region: %s\n",
  2620. view->root ? memory_region_name(view->root) : "(none)");
  2621. if (n <= 0) {
  2622. qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
  2623. return;
  2624. }
  2625. while (n--) {
  2626. mr = range->mr;
  2627. if (range->offset_in_region) {
  2628. qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
  2629. " (prio %d, %s%s): %s @" TARGET_FMT_plx,
  2630. int128_get64(range->addr.start),
  2631. int128_get64(range->addr.start)
  2632. + MR_SIZE(range->addr.size),
  2633. mr->priority,
  2634. range->nonvolatile ? "nv-" : "",
  2635. range->readonly ? "rom" : memory_region_type(mr),
  2636. memory_region_name(mr),
  2637. range->offset_in_region);
  2638. } else {
  2639. qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
  2640. " (prio %d, %s%s): %s",
  2641. int128_get64(range->addr.start),
  2642. int128_get64(range->addr.start)
  2643. + MR_SIZE(range->addr.size),
  2644. mr->priority,
  2645. range->nonvolatile ? "nv-" : "",
  2646. range->readonly ? "rom" : memory_region_type(mr),
  2647. memory_region_name(mr));
  2648. }
  2649. if (fvi->owner) {
  2650. mtree_print_mr_owner(mr);
  2651. }
  2652. if (fvi->ac) {
  2653. for (i = 0; i < fv_address_spaces->len; ++i) {
  2654. as = g_array_index(fv_address_spaces, AddressSpace*, i);
  2655. if (fvi->ac->has_memory(current_machine, as,
  2656. int128_get64(range->addr.start),
  2657. MR_SIZE(range->addr.size) + 1)) {
  2658. qemu_printf(" %s", fvi->ac_name);
  2659. }
  2660. }
  2661. }
  2662. qemu_printf("\n");
  2663. range++;
  2664. }
  2665. #if !defined(CONFIG_USER_ONLY)
  2666. if (fvi->dispatch_tree && view->root) {
  2667. mtree_print_dispatch(view->dispatch, view->root);
  2668. }
  2669. #endif
  2670. qemu_printf("\n");
  2671. }
  2672. static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
  2673. gpointer user_data)
  2674. {
  2675. FlatView *view = key;
  2676. GArray *fv_address_spaces = value;
  2677. g_array_unref(fv_address_spaces);
  2678. flatview_unref(view);
  2679. return true;
  2680. }
  2681. void mtree_info(bool flatview, bool dispatch_tree, bool owner)
  2682. {
  2683. MemoryRegionListHead ml_head;
  2684. MemoryRegionList *ml, *ml2;
  2685. AddressSpace *as;
  2686. if (flatview) {
  2687. FlatView *view;
  2688. struct FlatViewInfo fvi = {
  2689. .counter = 0,
  2690. .dispatch_tree = dispatch_tree,
  2691. .owner = owner,
  2692. };
  2693. GArray *fv_address_spaces;
  2694. GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
  2695. AccelClass *ac = ACCEL_GET_CLASS(current_machine->accelerator);
  2696. if (ac->has_memory) {
  2697. fvi.ac = ac;
  2698. fvi.ac_name = current_machine->accel ? current_machine->accel :
  2699. object_class_get_name(OBJECT_CLASS(ac));
  2700. }
  2701. /* Gather all FVs in one table */
  2702. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2703. view = address_space_get_flatview(as);
  2704. fv_address_spaces = g_hash_table_lookup(views, view);
  2705. if (!fv_address_spaces) {
  2706. fv_address_spaces = g_array_new(false, false, sizeof(as));
  2707. g_hash_table_insert(views, view, fv_address_spaces);
  2708. }
  2709. g_array_append_val(fv_address_spaces, as);
  2710. }
  2711. /* Print */
  2712. g_hash_table_foreach(views, mtree_print_flatview, &fvi);
  2713. /* Free */
  2714. g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
  2715. g_hash_table_unref(views);
  2716. return;
  2717. }
  2718. QTAILQ_INIT(&ml_head);
  2719. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2720. qemu_printf("address-space: %s\n", as->name);
  2721. mtree_print_mr(as->root, 1, 0, &ml_head, owner);
  2722. qemu_printf("\n");
  2723. }
  2724. /* print aliased regions */
  2725. QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
  2726. qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
  2727. mtree_print_mr(ml->mr, 1, 0, &ml_head, owner);
  2728. qemu_printf("\n");
  2729. }
  2730. QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
  2731. g_free(ml);
  2732. }
  2733. }
  2734. void memory_region_init_ram(MemoryRegion *mr,
  2735. struct Object *owner,
  2736. const char *name,
  2737. uint64_t size,
  2738. Error **errp)
  2739. {
  2740. DeviceState *owner_dev;
  2741. Error *err = NULL;
  2742. memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
  2743. if (err) {
  2744. error_propagate(errp, err);
  2745. return;
  2746. }
  2747. /* This will assert if owner is neither NULL nor a DeviceState.
  2748. * We only want the owner here for the purposes of defining a
  2749. * unique name for migration. TODO: Ideally we should implement
  2750. * a naming scheme for Objects which are not DeviceStates, in
  2751. * which case we can relax this restriction.
  2752. */
  2753. owner_dev = DEVICE(owner);
  2754. vmstate_register_ram(mr, owner_dev);
  2755. }
  2756. void memory_region_init_rom(MemoryRegion *mr,
  2757. struct Object *owner,
  2758. const char *name,
  2759. uint64_t size,
  2760. Error **errp)
  2761. {
  2762. DeviceState *owner_dev;
  2763. Error *err = NULL;
  2764. memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
  2765. if (err) {
  2766. error_propagate(errp, err);
  2767. return;
  2768. }
  2769. /* This will assert if owner is neither NULL nor a DeviceState.
  2770. * We only want the owner here for the purposes of defining a
  2771. * unique name for migration. TODO: Ideally we should implement
  2772. * a naming scheme for Objects which are not DeviceStates, in
  2773. * which case we can relax this restriction.
  2774. */
  2775. owner_dev = DEVICE(owner);
  2776. vmstate_register_ram(mr, owner_dev);
  2777. }
  2778. void memory_region_init_rom_device(MemoryRegion *mr,
  2779. struct Object *owner,
  2780. const MemoryRegionOps *ops,
  2781. void *opaque,
  2782. const char *name,
  2783. uint64_t size,
  2784. Error **errp)
  2785. {
  2786. DeviceState *owner_dev;
  2787. Error *err = NULL;
  2788. memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
  2789. name, size, &err);
  2790. if (err) {
  2791. error_propagate(errp, err);
  2792. return;
  2793. }
  2794. /* This will assert if owner is neither NULL nor a DeviceState.
  2795. * We only want the owner here for the purposes of defining a
  2796. * unique name for migration. TODO: Ideally we should implement
  2797. * a naming scheme for Objects which are not DeviceStates, in
  2798. * which case we can relax this restriction.
  2799. */
  2800. owner_dev = DEVICE(owner);
  2801. vmstate_register_ram(mr, owner_dev);
  2802. }
  2803. static const TypeInfo memory_region_info = {
  2804. .parent = TYPE_OBJECT,
  2805. .name = TYPE_MEMORY_REGION,
  2806. .class_size = sizeof(MemoryRegionClass),
  2807. .instance_size = sizeof(MemoryRegion),
  2808. .instance_init = memory_region_initfn,
  2809. .instance_finalize = memory_region_finalize,
  2810. };
  2811. static const TypeInfo iommu_memory_region_info = {
  2812. .parent = TYPE_MEMORY_REGION,
  2813. .name = TYPE_IOMMU_MEMORY_REGION,
  2814. .class_size = sizeof(IOMMUMemoryRegionClass),
  2815. .instance_size = sizeof(IOMMUMemoryRegion),
  2816. .instance_init = iommu_memory_region_initfn,
  2817. .abstract = true,
  2818. };
  2819. static void memory_register_types(void)
  2820. {
  2821. type_register_static(&memory_region_info);
  2822. type_register_static(&iommu_memory_region_info);
  2823. }
  2824. type_init(memory_register_types)