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sd.c 61 KB

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  1. /*
  2. * SD Memory Card emulation as defined in the "SD Memory Card Physical
  3. * layer specification, Version 2.00."
  4. *
  5. * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
  6. * Copyright (c) 2007 CodeSourcery
  7. * Copyright (c) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
  8. *
  9. * Redistribution and use in source and binary forms, with or without
  10. * modification, are permitted provided that the following conditions
  11. * are met:
  12. *
  13. * 1. Redistributions of source code must retain the above copyright
  14. * notice, this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright
  16. * notice, this list of conditions and the following disclaimer in
  17. * the documentation and/or other materials provided with the
  18. * distribution.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  21. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  22. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  23. * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR
  24. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  25. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  26. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  27. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  28. * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. */
  32. #include "qemu/osdep.h"
  33. #include "qemu/units.h"
  34. #include "hw/irq.h"
  35. #include "hw/registerfields.h"
  36. #include "sysemu/block-backend.h"
  37. #include "hw/sd/sd.h"
  38. #include "migration/vmstate.h"
  39. #include "qapi/error.h"
  40. #include "qemu/bitmap.h"
  41. #include "hw/qdev-properties.h"
  42. #include "qemu/error-report.h"
  43. #include "qemu/timer.h"
  44. #include "qemu/log.h"
  45. #include "qemu/module.h"
  46. #include "sdmmc-internal.h"
  47. #include "trace.h"
  48. //#define DEBUG_SD 1
  49. typedef enum {
  50. sd_r0 = 0, /* no response */
  51. sd_r1, /* normal response command */
  52. sd_r2_i, /* CID register */
  53. sd_r2_s, /* CSD register */
  54. sd_r3, /* OCR register */
  55. sd_r6 = 6, /* Published RCA response */
  56. sd_r7, /* Operating voltage */
  57. sd_r1b = -1,
  58. sd_illegal = -2,
  59. } sd_rsp_type_t;
  60. enum SDCardModes {
  61. sd_inactive,
  62. sd_card_identification_mode,
  63. sd_data_transfer_mode,
  64. };
  65. enum SDCardStates {
  66. sd_inactive_state = -1,
  67. sd_idle_state = 0,
  68. sd_ready_state,
  69. sd_identification_state,
  70. sd_standby_state,
  71. sd_transfer_state,
  72. sd_sendingdata_state,
  73. sd_receivingdata_state,
  74. sd_programming_state,
  75. sd_disconnect_state,
  76. };
  77. struct SDState {
  78. DeviceState parent_obj;
  79. /* SD Memory Card Registers */
  80. uint32_t ocr;
  81. uint8_t scr[8];
  82. uint8_t cid[16];
  83. uint8_t csd[16];
  84. uint16_t rca;
  85. uint32_t card_status;
  86. uint8_t sd_status[64];
  87. /* Configurable properties */
  88. uint8_t spec_version;
  89. BlockBackend *blk;
  90. bool spi;
  91. uint32_t mode; /* current card mode, one of SDCardModes */
  92. int32_t state; /* current card state, one of SDCardStates */
  93. uint32_t vhs;
  94. bool wp_switch;
  95. unsigned long *wp_groups;
  96. int32_t wpgrps_size;
  97. uint64_t size;
  98. uint32_t blk_len;
  99. uint32_t multi_blk_cnt;
  100. uint32_t erase_start;
  101. uint32_t erase_end;
  102. uint8_t pwd[16];
  103. uint32_t pwd_len;
  104. uint8_t function_group[6];
  105. uint8_t current_cmd;
  106. /* True if we will handle the next command as an ACMD. Note that this does
  107. * *not* track the APP_CMD status bit!
  108. */
  109. bool expecting_acmd;
  110. uint32_t blk_written;
  111. uint64_t data_start;
  112. uint32_t data_offset;
  113. uint8_t data[512];
  114. qemu_irq readonly_cb;
  115. qemu_irq inserted_cb;
  116. QEMUTimer *ocr_power_timer;
  117. const char *proto_name;
  118. bool enable;
  119. uint8_t dat_lines;
  120. bool cmd_line;
  121. };
  122. static const char *sd_state_name(enum SDCardStates state)
  123. {
  124. static const char *state_name[] = {
  125. [sd_idle_state] = "idle",
  126. [sd_ready_state] = "ready",
  127. [sd_identification_state] = "identification",
  128. [sd_standby_state] = "standby",
  129. [sd_transfer_state] = "transfer",
  130. [sd_sendingdata_state] = "sendingdata",
  131. [sd_receivingdata_state] = "receivingdata",
  132. [sd_programming_state] = "programming",
  133. [sd_disconnect_state] = "disconnect",
  134. };
  135. if (state == sd_inactive_state) {
  136. return "inactive";
  137. }
  138. assert(state < ARRAY_SIZE(state_name));
  139. return state_name[state];
  140. }
  141. static const char *sd_response_name(sd_rsp_type_t rsp)
  142. {
  143. static const char *response_name[] = {
  144. [sd_r0] = "RESP#0 (no response)",
  145. [sd_r1] = "RESP#1 (normal cmd)",
  146. [sd_r2_i] = "RESP#2 (CID reg)",
  147. [sd_r2_s] = "RESP#2 (CSD reg)",
  148. [sd_r3] = "RESP#3 (OCR reg)",
  149. [sd_r6] = "RESP#6 (RCA)",
  150. [sd_r7] = "RESP#7 (operating voltage)",
  151. };
  152. if (rsp == sd_illegal) {
  153. return "ILLEGAL RESP";
  154. }
  155. if (rsp == sd_r1b) {
  156. rsp = sd_r1;
  157. }
  158. assert(rsp < ARRAY_SIZE(response_name));
  159. return response_name[rsp];
  160. }
  161. static uint8_t sd_get_dat_lines(SDState *sd)
  162. {
  163. return sd->enable ? sd->dat_lines : 0;
  164. }
  165. static bool sd_get_cmd_line(SDState *sd)
  166. {
  167. return sd->enable ? sd->cmd_line : false;
  168. }
  169. static void sd_set_voltage(SDState *sd, uint16_t millivolts)
  170. {
  171. trace_sdcard_set_voltage(millivolts);
  172. switch (millivolts) {
  173. case 3001 ... 3600: /* SD_VOLTAGE_3_3V */
  174. case 2001 ... 3000: /* SD_VOLTAGE_3_0V */
  175. break;
  176. default:
  177. qemu_log_mask(LOG_GUEST_ERROR, "SD card voltage not supported: %.3fV",
  178. millivolts / 1000.f);
  179. }
  180. }
  181. static void sd_set_mode(SDState *sd)
  182. {
  183. switch (sd->state) {
  184. case sd_inactive_state:
  185. sd->mode = sd_inactive;
  186. break;
  187. case sd_idle_state:
  188. case sd_ready_state:
  189. case sd_identification_state:
  190. sd->mode = sd_card_identification_mode;
  191. break;
  192. case sd_standby_state:
  193. case sd_transfer_state:
  194. case sd_sendingdata_state:
  195. case sd_receivingdata_state:
  196. case sd_programming_state:
  197. case sd_disconnect_state:
  198. sd->mode = sd_data_transfer_mode;
  199. break;
  200. }
  201. }
  202. static const sd_cmd_type_t sd_cmd_type[SDMMC_CMD_MAX] = {
  203. sd_bc, sd_none, sd_bcr, sd_bcr, sd_none, sd_none, sd_none, sd_ac,
  204. sd_bcr, sd_ac, sd_ac, sd_adtc, sd_ac, sd_ac, sd_none, sd_ac,
  205. /* 16 */
  206. sd_ac, sd_adtc, sd_adtc, sd_none, sd_none, sd_none, sd_none, sd_none,
  207. sd_adtc, sd_adtc, sd_adtc, sd_adtc, sd_ac, sd_ac, sd_adtc, sd_none,
  208. /* 32 */
  209. sd_ac, sd_ac, sd_none, sd_none, sd_none, sd_none, sd_ac, sd_none,
  210. sd_none, sd_none, sd_bc, sd_none, sd_none, sd_none, sd_none, sd_none,
  211. /* 48 */
  212. sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_ac,
  213. sd_adtc, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none,
  214. };
  215. static const int sd_cmd_class[SDMMC_CMD_MAX] = {
  216. 0, 0, 0, 0, 0, 9, 10, 0, 0, 0, 0, 1, 0, 0, 0, 0,
  217. 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6,
  218. 5, 5, 10, 10, 10, 10, 5, 9, 9, 9, 7, 7, 7, 7, 7, 7,
  219. 7, 7, 10, 7, 9, 9, 9, 8, 8, 10, 8, 8, 8, 8, 8, 8,
  220. };
  221. static uint8_t sd_crc7(void *message, size_t width)
  222. {
  223. int i, bit;
  224. uint8_t shift_reg = 0x00;
  225. uint8_t *msg = (uint8_t *) message;
  226. for (i = 0; i < width; i ++, msg ++)
  227. for (bit = 7; bit >= 0; bit --) {
  228. shift_reg <<= 1;
  229. if ((shift_reg >> 7) ^ ((*msg >> bit) & 1))
  230. shift_reg ^= 0x89;
  231. }
  232. return shift_reg;
  233. }
  234. static uint16_t sd_crc16(void *message, size_t width)
  235. {
  236. int i, bit;
  237. uint16_t shift_reg = 0x0000;
  238. uint16_t *msg = (uint16_t *) message;
  239. width <<= 1;
  240. for (i = 0; i < width; i ++, msg ++)
  241. for (bit = 15; bit >= 0; bit --) {
  242. shift_reg <<= 1;
  243. if ((shift_reg >> 15) ^ ((*msg >> bit) & 1))
  244. shift_reg ^= 0x1011;
  245. }
  246. return shift_reg;
  247. }
  248. #define OCR_POWER_DELAY_NS 500000 /* 0.5ms */
  249. FIELD(OCR, VDD_VOLTAGE_WINDOW, 0, 24)
  250. FIELD(OCR, VDD_VOLTAGE_WIN_LO, 0, 8)
  251. FIELD(OCR, DUAL_VOLTAGE_CARD, 7, 1)
  252. FIELD(OCR, VDD_VOLTAGE_WIN_HI, 8, 16)
  253. FIELD(OCR, ACCEPT_SWITCH_1V8, 24, 1) /* Only UHS-I */
  254. FIELD(OCR, UHS_II_CARD, 29, 1) /* Only UHS-II */
  255. FIELD(OCR, CARD_CAPACITY, 30, 1) /* 0:SDSC, 1:SDHC/SDXC */
  256. FIELD(OCR, CARD_POWER_UP, 31, 1)
  257. #define ACMD41_ENQUIRY_MASK 0x00ffffff
  258. #define ACMD41_R3_MASK (R_OCR_VDD_VOLTAGE_WIN_HI_MASK \
  259. | R_OCR_ACCEPT_SWITCH_1V8_MASK \
  260. | R_OCR_UHS_II_CARD_MASK \
  261. | R_OCR_CARD_CAPACITY_MASK \
  262. | R_OCR_CARD_POWER_UP_MASK)
  263. static void sd_set_ocr(SDState *sd)
  264. {
  265. /* All voltages OK */
  266. sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
  267. }
  268. static void sd_ocr_powerup(void *opaque)
  269. {
  270. SDState *sd = opaque;
  271. trace_sdcard_powerup();
  272. assert(!FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP));
  273. /* card power-up OK */
  274. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
  275. if (sd->size > 1 * GiB) {
  276. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
  277. }
  278. }
  279. static void sd_set_scr(SDState *sd)
  280. {
  281. sd->scr[0] = 0 << 4; /* SCR structure version 1.0 */
  282. if (sd->spec_version == SD_PHY_SPECv1_10_VERS) {
  283. sd->scr[0] |= 1; /* Spec Version 1.10 */
  284. } else {
  285. sd->scr[0] |= 2; /* Spec Version 2.00 or Version 3.0X */
  286. }
  287. sd->scr[1] = (2 << 4) /* SDSC Card (Security Version 1.01) */
  288. | 0b0101; /* 1-bit or 4-bit width bus modes */
  289. sd->scr[2] = 0x00; /* Extended Security is not supported. */
  290. if (sd->spec_version >= SD_PHY_SPECv3_01_VERS) {
  291. sd->scr[2] |= 1 << 7; /* Spec Version 3.0X */
  292. }
  293. sd->scr[3] = 0x00;
  294. /* reserved for manufacturer usage */
  295. sd->scr[4] = 0x00;
  296. sd->scr[5] = 0x00;
  297. sd->scr[6] = 0x00;
  298. sd->scr[7] = 0x00;
  299. }
  300. #define MID 0xaa
  301. #define OID "XY"
  302. #define PNM "QEMU!"
  303. #define PRV 0x01
  304. #define MDT_YR 2006
  305. #define MDT_MON 2
  306. static void sd_set_cid(SDState *sd)
  307. {
  308. sd->cid[0] = MID; /* Fake card manufacturer ID (MID) */
  309. sd->cid[1] = OID[0]; /* OEM/Application ID (OID) */
  310. sd->cid[2] = OID[1];
  311. sd->cid[3] = PNM[0]; /* Fake product name (PNM) */
  312. sd->cid[4] = PNM[1];
  313. sd->cid[5] = PNM[2];
  314. sd->cid[6] = PNM[3];
  315. sd->cid[7] = PNM[4];
  316. sd->cid[8] = PRV; /* Fake product revision (PRV) */
  317. sd->cid[9] = 0xde; /* Fake serial number (PSN) */
  318. sd->cid[10] = 0xad;
  319. sd->cid[11] = 0xbe;
  320. sd->cid[12] = 0xef;
  321. sd->cid[13] = 0x00 | /* Manufacture date (MDT) */
  322. ((MDT_YR - 2000) / 10);
  323. sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
  324. sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
  325. }
  326. #define HWBLOCK_SHIFT 9 /* 512 bytes */
  327. #define SECTOR_SHIFT 5 /* 16 kilobytes */
  328. #define WPGROUP_SHIFT 7 /* 2 megs */
  329. #define CMULT_SHIFT 9 /* 512 times HWBLOCK_SIZE */
  330. #define WPGROUP_SIZE (1 << (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT))
  331. static const uint8_t sd_csd_rw_mask[16] = {
  332. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  333. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe,
  334. };
  335. static void sd_set_csd(SDState *sd, uint64_t size)
  336. {
  337. uint32_t csize = (size >> (CMULT_SHIFT + HWBLOCK_SHIFT)) - 1;
  338. uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1;
  339. uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1;
  340. if (size <= 1 * GiB) { /* Standard Capacity SD */
  341. sd->csd[0] = 0x00; /* CSD structure */
  342. sd->csd[1] = 0x26; /* Data read access-time-1 */
  343. sd->csd[2] = 0x00; /* Data read access-time-2 */
  344. sd->csd[3] = 0x32; /* Max. data transfer rate: 25 MHz */
  345. sd->csd[4] = 0x5f; /* Card Command Classes */
  346. sd->csd[5] = 0x50 | /* Max. read data block length */
  347. HWBLOCK_SHIFT;
  348. sd->csd[6] = 0xe0 | /* Partial block for read allowed */
  349. ((csize >> 10) & 0x03);
  350. sd->csd[7] = 0x00 | /* Device size */
  351. ((csize >> 2) & 0xff);
  352. sd->csd[8] = 0x3f | /* Max. read current */
  353. ((csize << 6) & 0xc0);
  354. sd->csd[9] = 0xfc | /* Max. write current */
  355. ((CMULT_SHIFT - 2) >> 1);
  356. sd->csd[10] = 0x40 | /* Erase sector size */
  357. (((CMULT_SHIFT - 2) << 7) & 0x80) | (sectsize >> 1);
  358. sd->csd[11] = 0x00 | /* Write protect group size */
  359. ((sectsize << 7) & 0x80) | wpsize;
  360. sd->csd[12] = 0x90 | /* Write speed factor */
  361. (HWBLOCK_SHIFT >> 2);
  362. sd->csd[13] = 0x20 | /* Max. write data block length */
  363. ((HWBLOCK_SHIFT << 6) & 0xc0);
  364. sd->csd[14] = 0x00; /* File format group */
  365. } else { /* SDHC */
  366. size /= 512 * KiB;
  367. size -= 1;
  368. sd->csd[0] = 0x40;
  369. sd->csd[1] = 0x0e;
  370. sd->csd[2] = 0x00;
  371. sd->csd[3] = 0x32;
  372. sd->csd[4] = 0x5b;
  373. sd->csd[5] = 0x59;
  374. sd->csd[6] = 0x00;
  375. sd->csd[7] = (size >> 16) & 0xff;
  376. sd->csd[8] = (size >> 8) & 0xff;
  377. sd->csd[9] = (size & 0xff);
  378. sd->csd[10] = 0x7f;
  379. sd->csd[11] = 0x80;
  380. sd->csd[12] = 0x0a;
  381. sd->csd[13] = 0x40;
  382. sd->csd[14] = 0x00;
  383. }
  384. sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
  385. }
  386. static void sd_set_rca(SDState *sd)
  387. {
  388. sd->rca += 0x4567;
  389. }
  390. FIELD(CSR, AKE_SEQ_ERROR, 3, 1)
  391. FIELD(CSR, APP_CMD, 5, 1)
  392. FIELD(CSR, FX_EVENT, 6, 1)
  393. FIELD(CSR, READY_FOR_DATA, 8, 1)
  394. FIELD(CSR, CURRENT_STATE, 9, 4)
  395. FIELD(CSR, ERASE_RESET, 13, 1)
  396. FIELD(CSR, CARD_ECC_DISABLED, 14, 1)
  397. FIELD(CSR, WP_ERASE_SKIP, 15, 1)
  398. FIELD(CSR, CSD_OVERWRITE, 16, 1)
  399. FIELD(CSR, DEFERRED_RESPONSE, 17, 1)
  400. FIELD(CSR, ERROR, 19, 1)
  401. FIELD(CSR, CC_ERROR, 20, 1)
  402. FIELD(CSR, CARD_ECC_FAILED, 21, 1)
  403. FIELD(CSR, ILLEGAL_COMMAND, 22, 1)
  404. FIELD(CSR, COM_CRC_ERROR, 23, 1)
  405. FIELD(CSR, LOCK_UNLOCK_FAILED, 24, 1)
  406. FIELD(CSR, CARD_IS_LOCKED, 25, 1)
  407. FIELD(CSR, WP_VIOLATION, 26, 1)
  408. FIELD(CSR, ERASE_PARAM, 27, 1)
  409. FIELD(CSR, ERASE_SEQ_ERROR, 28, 1)
  410. FIELD(CSR, BLOCK_LEN_ERROR, 29, 1)
  411. FIELD(CSR, ADDRESS_ERROR, 30, 1)
  412. FIELD(CSR, OUT_OF_RANGE, 31, 1)
  413. /* Card status bits, split by clear condition:
  414. * A : According to the card current state
  415. * B : Always related to the previous command
  416. * C : Cleared by read
  417. */
  418. #define CARD_STATUS_A (R_CSR_READY_FOR_DATA_MASK \
  419. | R_CSR_CARD_ECC_DISABLED_MASK \
  420. | R_CSR_CARD_IS_LOCKED_MASK)
  421. #define CARD_STATUS_B (R_CSR_CURRENT_STATE_MASK \
  422. | R_CSR_ILLEGAL_COMMAND_MASK \
  423. | R_CSR_COM_CRC_ERROR_MASK)
  424. #define CARD_STATUS_C (R_CSR_AKE_SEQ_ERROR_MASK \
  425. | R_CSR_APP_CMD_MASK \
  426. | R_CSR_ERASE_RESET_MASK \
  427. | R_CSR_WP_ERASE_SKIP_MASK \
  428. | R_CSR_CSD_OVERWRITE_MASK \
  429. | R_CSR_ERROR_MASK \
  430. | R_CSR_CC_ERROR_MASK \
  431. | R_CSR_CARD_ECC_FAILED_MASK \
  432. | R_CSR_LOCK_UNLOCK_FAILED_MASK \
  433. | R_CSR_WP_VIOLATION_MASK \
  434. | R_CSR_ERASE_PARAM_MASK \
  435. | R_CSR_ERASE_SEQ_ERROR_MASK \
  436. | R_CSR_BLOCK_LEN_ERROR_MASK \
  437. | R_CSR_ADDRESS_ERROR_MASK \
  438. | R_CSR_OUT_OF_RANGE_MASK)
  439. static void sd_set_cardstatus(SDState *sd)
  440. {
  441. sd->card_status = 0x00000100;
  442. }
  443. static void sd_set_sdstatus(SDState *sd)
  444. {
  445. memset(sd->sd_status, 0, 64);
  446. }
  447. static int sd_req_crc_validate(SDRequest *req)
  448. {
  449. uint8_t buffer[5];
  450. buffer[0] = 0x40 | req->cmd;
  451. stl_be_p(&buffer[1], req->arg);
  452. return 0;
  453. return sd_crc7(buffer, 5) != req->crc; /* TODO */
  454. }
  455. static void sd_response_r1_make(SDState *sd, uint8_t *response)
  456. {
  457. stl_be_p(response, sd->card_status);
  458. /* Clear the "clear on read" status bits */
  459. sd->card_status &= ~CARD_STATUS_C;
  460. }
  461. static void sd_response_r3_make(SDState *sd, uint8_t *response)
  462. {
  463. stl_be_p(response, sd->ocr & ACMD41_R3_MASK);
  464. }
  465. static void sd_response_r6_make(SDState *sd, uint8_t *response)
  466. {
  467. uint16_t status;
  468. status = ((sd->card_status >> 8) & 0xc000) |
  469. ((sd->card_status >> 6) & 0x2000) |
  470. (sd->card_status & 0x1fff);
  471. sd->card_status &= ~(CARD_STATUS_C & 0xc81fff);
  472. stw_be_p(response + 0, sd->rca);
  473. stw_be_p(response + 2, status);
  474. }
  475. static void sd_response_r7_make(SDState *sd, uint8_t *response)
  476. {
  477. stl_be_p(response, sd->vhs);
  478. }
  479. static inline uint64_t sd_addr_to_wpnum(uint64_t addr)
  480. {
  481. return addr >> (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT);
  482. }
  483. static void sd_reset(DeviceState *dev)
  484. {
  485. SDState *sd = SD_CARD(dev);
  486. uint64_t size;
  487. uint64_t sect;
  488. trace_sdcard_reset();
  489. if (sd->blk) {
  490. blk_get_geometry(sd->blk, &sect);
  491. } else {
  492. sect = 0;
  493. }
  494. size = sect << 9;
  495. sect = sd_addr_to_wpnum(size) + 1;
  496. sd->state = sd_idle_state;
  497. sd->rca = 0x0000;
  498. sd_set_ocr(sd);
  499. sd_set_scr(sd);
  500. sd_set_cid(sd);
  501. sd_set_csd(sd, size);
  502. sd_set_cardstatus(sd);
  503. sd_set_sdstatus(sd);
  504. g_free(sd->wp_groups);
  505. sd->wp_switch = sd->blk ? blk_is_read_only(sd->blk) : false;
  506. sd->wpgrps_size = sect;
  507. sd->wp_groups = bitmap_new(sd->wpgrps_size);
  508. memset(sd->function_group, 0, sizeof(sd->function_group));
  509. sd->erase_start = 0;
  510. sd->erase_end = 0;
  511. sd->size = size;
  512. sd->blk_len = 0x200;
  513. sd->pwd_len = 0;
  514. sd->expecting_acmd = false;
  515. sd->dat_lines = 0xf;
  516. sd->cmd_line = true;
  517. sd->multi_blk_cnt = 0;
  518. }
  519. static bool sd_get_inserted(SDState *sd)
  520. {
  521. return sd->blk && blk_is_inserted(sd->blk);
  522. }
  523. static bool sd_get_readonly(SDState *sd)
  524. {
  525. return sd->wp_switch;
  526. }
  527. static void sd_cardchange(void *opaque, bool load, Error **errp)
  528. {
  529. SDState *sd = opaque;
  530. DeviceState *dev = DEVICE(sd);
  531. SDBus *sdbus = SD_BUS(qdev_get_parent_bus(dev));
  532. bool inserted = sd_get_inserted(sd);
  533. bool readonly = sd_get_readonly(sd);
  534. if (inserted) {
  535. trace_sdcard_inserted(readonly);
  536. sd_reset(dev);
  537. } else {
  538. trace_sdcard_ejected();
  539. }
  540. /* The IRQ notification is for legacy non-QOM SD controller devices;
  541. * QOMified controllers use the SDBus APIs.
  542. */
  543. if (sdbus) {
  544. sdbus_set_inserted(sdbus, inserted);
  545. if (inserted) {
  546. sdbus_set_readonly(sdbus, readonly);
  547. }
  548. } else {
  549. qemu_set_irq(sd->inserted_cb, inserted);
  550. if (inserted) {
  551. qemu_set_irq(sd->readonly_cb, readonly);
  552. }
  553. }
  554. }
  555. static const BlockDevOps sd_block_ops = {
  556. .change_media_cb = sd_cardchange,
  557. };
  558. static bool sd_ocr_vmstate_needed(void *opaque)
  559. {
  560. SDState *sd = opaque;
  561. /* Include the OCR state (and timer) if it is not yet powered up */
  562. return !FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP);
  563. }
  564. static const VMStateDescription sd_ocr_vmstate = {
  565. .name = "sd-card/ocr-state",
  566. .version_id = 1,
  567. .minimum_version_id = 1,
  568. .needed = sd_ocr_vmstate_needed,
  569. .fields = (VMStateField[]) {
  570. VMSTATE_UINT32(ocr, SDState),
  571. VMSTATE_TIMER_PTR(ocr_power_timer, SDState),
  572. VMSTATE_END_OF_LIST()
  573. },
  574. };
  575. static int sd_vmstate_pre_load(void *opaque)
  576. {
  577. SDState *sd = opaque;
  578. /* If the OCR state is not included (prior versions, or not
  579. * needed), then the OCR must be set as powered up. If the OCR state
  580. * is included, this will be replaced by the state restore.
  581. */
  582. sd_ocr_powerup(sd);
  583. return 0;
  584. }
  585. static const VMStateDescription sd_vmstate = {
  586. .name = "sd-card",
  587. .version_id = 1,
  588. .minimum_version_id = 1,
  589. .pre_load = sd_vmstate_pre_load,
  590. .fields = (VMStateField[]) {
  591. VMSTATE_UINT32(mode, SDState),
  592. VMSTATE_INT32(state, SDState),
  593. VMSTATE_UINT8_ARRAY(cid, SDState, 16),
  594. VMSTATE_UINT8_ARRAY(csd, SDState, 16),
  595. VMSTATE_UINT16(rca, SDState),
  596. VMSTATE_UINT32(card_status, SDState),
  597. VMSTATE_PARTIAL_BUFFER(sd_status, SDState, 1),
  598. VMSTATE_UINT32(vhs, SDState),
  599. VMSTATE_BITMAP(wp_groups, SDState, 0, wpgrps_size),
  600. VMSTATE_UINT32(blk_len, SDState),
  601. VMSTATE_UINT32(multi_blk_cnt, SDState),
  602. VMSTATE_UINT32(erase_start, SDState),
  603. VMSTATE_UINT32(erase_end, SDState),
  604. VMSTATE_UINT8_ARRAY(pwd, SDState, 16),
  605. VMSTATE_UINT32(pwd_len, SDState),
  606. VMSTATE_UINT8_ARRAY(function_group, SDState, 6),
  607. VMSTATE_UINT8(current_cmd, SDState),
  608. VMSTATE_BOOL(expecting_acmd, SDState),
  609. VMSTATE_UINT32(blk_written, SDState),
  610. VMSTATE_UINT64(data_start, SDState),
  611. VMSTATE_UINT32(data_offset, SDState),
  612. VMSTATE_UINT8_ARRAY(data, SDState, 512),
  613. VMSTATE_UNUSED_V(1, 512),
  614. VMSTATE_BOOL(enable, SDState),
  615. VMSTATE_END_OF_LIST()
  616. },
  617. .subsections = (const VMStateDescription*[]) {
  618. &sd_ocr_vmstate,
  619. NULL
  620. },
  621. };
  622. /* Legacy initialization function for use by non-qdevified callers */
  623. SDState *sd_init(BlockBackend *blk, bool is_spi)
  624. {
  625. Object *obj;
  626. DeviceState *dev;
  627. Error *err = NULL;
  628. obj = object_new(TYPE_SD_CARD);
  629. dev = DEVICE(obj);
  630. qdev_prop_set_drive(dev, "drive", blk, &err);
  631. if (err) {
  632. error_report("sd_init failed: %s", error_get_pretty(err));
  633. return NULL;
  634. }
  635. qdev_prop_set_bit(dev, "spi", is_spi);
  636. object_property_set_bool(obj, true, "realized", &err);
  637. if (err) {
  638. error_report("sd_init failed: %s", error_get_pretty(err));
  639. return NULL;
  640. }
  641. return SD_CARD(dev);
  642. }
  643. void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert)
  644. {
  645. sd->readonly_cb = readonly;
  646. sd->inserted_cb = insert;
  647. qemu_set_irq(readonly, sd->blk ? blk_is_read_only(sd->blk) : 0);
  648. qemu_set_irq(insert, sd->blk ? blk_is_inserted(sd->blk) : 0);
  649. }
  650. static void sd_erase(SDState *sd)
  651. {
  652. int i;
  653. uint64_t erase_start = sd->erase_start;
  654. uint64_t erase_end = sd->erase_end;
  655. trace_sdcard_erase();
  656. if (!sd->erase_start || !sd->erase_end) {
  657. sd->card_status |= ERASE_SEQ_ERROR;
  658. return;
  659. }
  660. if (FIELD_EX32(sd->ocr, OCR, CARD_CAPACITY)) {
  661. /* High capacity memory card: erase units are 512 byte blocks */
  662. erase_start *= 512;
  663. erase_end *= 512;
  664. }
  665. erase_start = sd_addr_to_wpnum(erase_start);
  666. erase_end = sd_addr_to_wpnum(erase_end);
  667. sd->erase_start = 0;
  668. sd->erase_end = 0;
  669. sd->csd[14] |= 0x40;
  670. for (i = erase_start; i <= erase_end; i++) {
  671. if (test_bit(i, sd->wp_groups)) {
  672. sd->card_status |= WP_ERASE_SKIP;
  673. }
  674. }
  675. }
  676. static uint32_t sd_wpbits(SDState *sd, uint64_t addr)
  677. {
  678. uint32_t i, wpnum;
  679. uint32_t ret = 0;
  680. wpnum = sd_addr_to_wpnum(addr);
  681. for (i = 0; i < 32; i++, wpnum++, addr += WPGROUP_SIZE) {
  682. if (addr < sd->size && test_bit(wpnum, sd->wp_groups)) {
  683. ret |= (1 << i);
  684. }
  685. }
  686. return ret;
  687. }
  688. static void sd_function_switch(SDState *sd, uint32_t arg)
  689. {
  690. int i, mode, new_func;
  691. mode = !!(arg & 0x80000000);
  692. sd->data[0] = 0x00; /* Maximum current consumption */
  693. sd->data[1] = 0x01;
  694. sd->data[2] = 0x80; /* Supported group 6 functions */
  695. sd->data[3] = 0x01;
  696. sd->data[4] = 0x80; /* Supported group 5 functions */
  697. sd->data[5] = 0x01;
  698. sd->data[6] = 0x80; /* Supported group 4 functions */
  699. sd->data[7] = 0x01;
  700. sd->data[8] = 0x80; /* Supported group 3 functions */
  701. sd->data[9] = 0x01;
  702. sd->data[10] = 0x80; /* Supported group 2 functions */
  703. sd->data[11] = 0x43;
  704. sd->data[12] = 0x80; /* Supported group 1 functions */
  705. sd->data[13] = 0x03;
  706. for (i = 0; i < 6; i ++) {
  707. new_func = (arg >> (i * 4)) & 0x0f;
  708. if (mode && new_func != 0x0f)
  709. sd->function_group[i] = new_func;
  710. sd->data[14 + (i >> 1)] = new_func << ((i * 4) & 4);
  711. }
  712. memset(&sd->data[17], 0, 47);
  713. stw_be_p(sd->data + 64, sd_crc16(sd->data, 64));
  714. }
  715. static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
  716. {
  717. return test_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
  718. }
  719. static void sd_lock_command(SDState *sd)
  720. {
  721. int erase, lock, clr_pwd, set_pwd, pwd_len;
  722. erase = !!(sd->data[0] & 0x08);
  723. lock = sd->data[0] & 0x04;
  724. clr_pwd = sd->data[0] & 0x02;
  725. set_pwd = sd->data[0] & 0x01;
  726. if (sd->blk_len > 1)
  727. pwd_len = sd->data[1];
  728. else
  729. pwd_len = 0;
  730. if (lock) {
  731. trace_sdcard_lock();
  732. } else {
  733. trace_sdcard_unlock();
  734. }
  735. if (erase) {
  736. if (!(sd->card_status & CARD_IS_LOCKED) || sd->blk_len > 1 ||
  737. set_pwd || clr_pwd || lock || sd->wp_switch ||
  738. (sd->csd[14] & 0x20)) {
  739. sd->card_status |= LOCK_UNLOCK_FAILED;
  740. return;
  741. }
  742. bitmap_zero(sd->wp_groups, sd->wpgrps_size);
  743. sd->csd[14] &= ~0x10;
  744. sd->card_status &= ~CARD_IS_LOCKED;
  745. sd->pwd_len = 0;
  746. /* Erasing the entire card here! */
  747. fprintf(stderr, "SD: Card force-erased by CMD42\n");
  748. return;
  749. }
  750. if (sd->blk_len < 2 + pwd_len ||
  751. pwd_len <= sd->pwd_len ||
  752. pwd_len > sd->pwd_len + 16) {
  753. sd->card_status |= LOCK_UNLOCK_FAILED;
  754. return;
  755. }
  756. if (sd->pwd_len && memcmp(sd->pwd, sd->data + 2, sd->pwd_len)) {
  757. sd->card_status |= LOCK_UNLOCK_FAILED;
  758. return;
  759. }
  760. pwd_len -= sd->pwd_len;
  761. if ((pwd_len && !set_pwd) ||
  762. (clr_pwd && (set_pwd || lock)) ||
  763. (lock && !sd->pwd_len && !set_pwd) ||
  764. (!set_pwd && !clr_pwd &&
  765. (((sd->card_status & CARD_IS_LOCKED) && lock) ||
  766. (!(sd->card_status & CARD_IS_LOCKED) && !lock)))) {
  767. sd->card_status |= LOCK_UNLOCK_FAILED;
  768. return;
  769. }
  770. if (set_pwd) {
  771. memcpy(sd->pwd, sd->data + 2 + sd->pwd_len, pwd_len);
  772. sd->pwd_len = pwd_len;
  773. }
  774. if (clr_pwd) {
  775. sd->pwd_len = 0;
  776. }
  777. if (lock)
  778. sd->card_status |= CARD_IS_LOCKED;
  779. else
  780. sd->card_status &= ~CARD_IS_LOCKED;
  781. }
  782. static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
  783. {
  784. uint32_t rca = 0x0000;
  785. uint64_t addr = (sd->ocr & (1 << 30)) ? (uint64_t) req.arg << 9 : req.arg;
  786. /* CMD55 precedes an ACMD, so we are not interested in tracing it.
  787. * However there is no ACMD55, so we want to trace this particular case.
  788. */
  789. if (req.cmd != 55 || sd->expecting_acmd) {
  790. trace_sdcard_normal_command(sd->proto_name,
  791. sd_cmd_name(req.cmd), req.cmd,
  792. req.arg, sd_state_name(sd->state));
  793. }
  794. /* Not interpreting this as an app command */
  795. sd->card_status &= ~APP_CMD;
  796. if (sd_cmd_type[req.cmd] == sd_ac
  797. || sd_cmd_type[req.cmd] == sd_adtc) {
  798. rca = req.arg >> 16;
  799. }
  800. /* CMD23 (set block count) must be immediately followed by CMD18 or CMD25
  801. * if not, its effects are cancelled */
  802. if (sd->multi_blk_cnt != 0 && !(req.cmd == 18 || req.cmd == 25)) {
  803. sd->multi_blk_cnt = 0;
  804. }
  805. switch (req.cmd) {
  806. /* Basic commands (Class 0 and Class 1) */
  807. case 0: /* CMD0: GO_IDLE_STATE */
  808. switch (sd->state) {
  809. case sd_inactive_state:
  810. return sd->spi ? sd_r1 : sd_r0;
  811. default:
  812. sd->state = sd_idle_state;
  813. sd_reset(DEVICE(sd));
  814. return sd->spi ? sd_r1 : sd_r0;
  815. }
  816. break;
  817. case 1: /* CMD1: SEND_OP_CMD */
  818. if (!sd->spi)
  819. goto bad_cmd;
  820. sd->state = sd_transfer_state;
  821. return sd_r1;
  822. case 2: /* CMD2: ALL_SEND_CID */
  823. if (sd->spi)
  824. goto bad_cmd;
  825. switch (sd->state) {
  826. case sd_ready_state:
  827. sd->state = sd_identification_state;
  828. return sd_r2_i;
  829. default:
  830. break;
  831. }
  832. break;
  833. case 3: /* CMD3: SEND_RELATIVE_ADDR */
  834. if (sd->spi)
  835. goto bad_cmd;
  836. switch (sd->state) {
  837. case sd_identification_state:
  838. case sd_standby_state:
  839. sd->state = sd_standby_state;
  840. sd_set_rca(sd);
  841. return sd_r6;
  842. default:
  843. break;
  844. }
  845. break;
  846. case 4: /* CMD4: SEND_DSR */
  847. if (sd->spi)
  848. goto bad_cmd;
  849. switch (sd->state) {
  850. case sd_standby_state:
  851. break;
  852. default:
  853. break;
  854. }
  855. break;
  856. case 5: /* CMD5: reserved for SDIO cards */
  857. return sd_illegal;
  858. case 6: /* CMD6: SWITCH_FUNCTION */
  859. switch (sd->mode) {
  860. case sd_data_transfer_mode:
  861. sd_function_switch(sd, req.arg);
  862. sd->state = sd_sendingdata_state;
  863. sd->data_start = 0;
  864. sd->data_offset = 0;
  865. return sd_r1;
  866. default:
  867. break;
  868. }
  869. break;
  870. case 7: /* CMD7: SELECT/DESELECT_CARD */
  871. if (sd->spi)
  872. goto bad_cmd;
  873. switch (sd->state) {
  874. case sd_standby_state:
  875. if (sd->rca != rca)
  876. return sd_r0;
  877. sd->state = sd_transfer_state;
  878. return sd_r1b;
  879. case sd_transfer_state:
  880. case sd_sendingdata_state:
  881. if (sd->rca == rca)
  882. break;
  883. sd->state = sd_standby_state;
  884. return sd_r1b;
  885. case sd_disconnect_state:
  886. if (sd->rca != rca)
  887. return sd_r0;
  888. sd->state = sd_programming_state;
  889. return sd_r1b;
  890. case sd_programming_state:
  891. if (sd->rca == rca)
  892. break;
  893. sd->state = sd_disconnect_state;
  894. return sd_r1b;
  895. default:
  896. break;
  897. }
  898. break;
  899. case 8: /* CMD8: SEND_IF_COND */
  900. if (sd->spec_version < SD_PHY_SPECv2_00_VERS) {
  901. break;
  902. }
  903. if (sd->state != sd_idle_state) {
  904. break;
  905. }
  906. sd->vhs = 0;
  907. /* No response if not exactly one VHS bit is set. */
  908. if (!(req.arg >> 8) || (req.arg >> (ctz32(req.arg & ~0xff) + 1))) {
  909. return sd->spi ? sd_r7 : sd_r0;
  910. }
  911. /* Accept. */
  912. sd->vhs = req.arg;
  913. return sd_r7;
  914. case 9: /* CMD9: SEND_CSD */
  915. switch (sd->state) {
  916. case sd_standby_state:
  917. if (sd->rca != rca)
  918. return sd_r0;
  919. return sd_r2_s;
  920. case sd_transfer_state:
  921. if (!sd->spi)
  922. break;
  923. sd->state = sd_sendingdata_state;
  924. memcpy(sd->data, sd->csd, 16);
  925. sd->data_start = addr;
  926. sd->data_offset = 0;
  927. return sd_r1;
  928. default:
  929. break;
  930. }
  931. break;
  932. case 10: /* CMD10: SEND_CID */
  933. switch (sd->state) {
  934. case sd_standby_state:
  935. if (sd->rca != rca)
  936. return sd_r0;
  937. return sd_r2_i;
  938. case sd_transfer_state:
  939. if (!sd->spi)
  940. break;
  941. sd->state = sd_sendingdata_state;
  942. memcpy(sd->data, sd->cid, 16);
  943. sd->data_start = addr;
  944. sd->data_offset = 0;
  945. return sd_r1;
  946. default:
  947. break;
  948. }
  949. break;
  950. case 12: /* CMD12: STOP_TRANSMISSION */
  951. switch (sd->state) {
  952. case sd_sendingdata_state:
  953. sd->state = sd_transfer_state;
  954. return sd_r1b;
  955. case sd_receivingdata_state:
  956. sd->state = sd_programming_state;
  957. /* Bzzzzzzztt .... Operation complete. */
  958. sd->state = sd_transfer_state;
  959. return sd_r1b;
  960. default:
  961. break;
  962. }
  963. break;
  964. case 13: /* CMD13: SEND_STATUS */
  965. switch (sd->mode) {
  966. case sd_data_transfer_mode:
  967. if (sd->rca != rca)
  968. return sd_r0;
  969. return sd_r1;
  970. default:
  971. break;
  972. }
  973. break;
  974. case 15: /* CMD15: GO_INACTIVE_STATE */
  975. if (sd->spi)
  976. goto bad_cmd;
  977. switch (sd->mode) {
  978. case sd_data_transfer_mode:
  979. if (sd->rca != rca)
  980. return sd_r0;
  981. sd->state = sd_inactive_state;
  982. return sd_r0;
  983. default:
  984. break;
  985. }
  986. break;
  987. /* Block read commands (Classs 2) */
  988. case 16: /* CMD16: SET_BLOCKLEN */
  989. switch (sd->state) {
  990. case sd_transfer_state:
  991. if (req.arg > (1 << HWBLOCK_SHIFT)) {
  992. sd->card_status |= BLOCK_LEN_ERROR;
  993. } else {
  994. trace_sdcard_set_blocklen(req.arg);
  995. sd->blk_len = req.arg;
  996. }
  997. return sd_r1;
  998. default:
  999. break;
  1000. }
  1001. break;
  1002. case 17: /* CMD17: READ_SINGLE_BLOCK */
  1003. switch (sd->state) {
  1004. case sd_transfer_state:
  1005. sd->state = sd_sendingdata_state;
  1006. sd->data_start = addr;
  1007. sd->data_offset = 0;
  1008. if (sd->data_start + sd->blk_len > sd->size)
  1009. sd->card_status |= ADDRESS_ERROR;
  1010. return sd_r1;
  1011. default:
  1012. break;
  1013. }
  1014. break;
  1015. case 18: /* CMD18: READ_MULTIPLE_BLOCK */
  1016. switch (sd->state) {
  1017. case sd_transfer_state:
  1018. sd->state = sd_sendingdata_state;
  1019. sd->data_start = addr;
  1020. sd->data_offset = 0;
  1021. if (sd->data_start + sd->blk_len > sd->size)
  1022. sd->card_status |= ADDRESS_ERROR;
  1023. return sd_r1;
  1024. default:
  1025. break;
  1026. }
  1027. break;
  1028. case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
  1029. if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
  1030. break;
  1031. }
  1032. if (sd->state == sd_transfer_state) {
  1033. sd->state = sd_sendingdata_state;
  1034. sd->data_offset = 0;
  1035. return sd_r1;
  1036. }
  1037. break;
  1038. case 23: /* CMD23: SET_BLOCK_COUNT */
  1039. if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
  1040. break;
  1041. }
  1042. switch (sd->state) {
  1043. case sd_transfer_state:
  1044. sd->multi_blk_cnt = req.arg;
  1045. return sd_r1;
  1046. default:
  1047. break;
  1048. }
  1049. break;
  1050. /* Block write commands (Class 4) */
  1051. case 24: /* CMD24: WRITE_SINGLE_BLOCK */
  1052. switch (sd->state) {
  1053. case sd_transfer_state:
  1054. /* Writing in SPI mode not implemented. */
  1055. if (sd->spi)
  1056. break;
  1057. sd->state = sd_receivingdata_state;
  1058. sd->data_start = addr;
  1059. sd->data_offset = 0;
  1060. sd->blk_written = 0;
  1061. if (sd->data_start + sd->blk_len > sd->size)
  1062. sd->card_status |= ADDRESS_ERROR;
  1063. if (sd_wp_addr(sd, sd->data_start))
  1064. sd->card_status |= WP_VIOLATION;
  1065. if (sd->csd[14] & 0x30)
  1066. sd->card_status |= WP_VIOLATION;
  1067. return sd_r1;
  1068. default:
  1069. break;
  1070. }
  1071. break;
  1072. case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
  1073. switch (sd->state) {
  1074. case sd_transfer_state:
  1075. /* Writing in SPI mode not implemented. */
  1076. if (sd->spi)
  1077. break;
  1078. sd->state = sd_receivingdata_state;
  1079. sd->data_start = addr;
  1080. sd->data_offset = 0;
  1081. sd->blk_written = 0;
  1082. if (sd->data_start + sd->blk_len > sd->size)
  1083. sd->card_status |= ADDRESS_ERROR;
  1084. if (sd_wp_addr(sd, sd->data_start))
  1085. sd->card_status |= WP_VIOLATION;
  1086. if (sd->csd[14] & 0x30)
  1087. sd->card_status |= WP_VIOLATION;
  1088. return sd_r1;
  1089. default:
  1090. break;
  1091. }
  1092. break;
  1093. case 26: /* CMD26: PROGRAM_CID */
  1094. if (sd->spi)
  1095. goto bad_cmd;
  1096. switch (sd->state) {
  1097. case sd_transfer_state:
  1098. sd->state = sd_receivingdata_state;
  1099. sd->data_start = 0;
  1100. sd->data_offset = 0;
  1101. return sd_r1;
  1102. default:
  1103. break;
  1104. }
  1105. break;
  1106. case 27: /* CMD27: PROGRAM_CSD */
  1107. switch (sd->state) {
  1108. case sd_transfer_state:
  1109. sd->state = sd_receivingdata_state;
  1110. sd->data_start = 0;
  1111. sd->data_offset = 0;
  1112. return sd_r1;
  1113. default:
  1114. break;
  1115. }
  1116. break;
  1117. /* Write protection (Class 6) */
  1118. case 28: /* CMD28: SET_WRITE_PROT */
  1119. switch (sd->state) {
  1120. case sd_transfer_state:
  1121. if (addr >= sd->size) {
  1122. sd->card_status |= ADDRESS_ERROR;
  1123. return sd_r1b;
  1124. }
  1125. sd->state = sd_programming_state;
  1126. set_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
  1127. /* Bzzzzzzztt .... Operation complete. */
  1128. sd->state = sd_transfer_state;
  1129. return sd_r1b;
  1130. default:
  1131. break;
  1132. }
  1133. break;
  1134. case 29: /* CMD29: CLR_WRITE_PROT */
  1135. switch (sd->state) {
  1136. case sd_transfer_state:
  1137. if (addr >= sd->size) {
  1138. sd->card_status |= ADDRESS_ERROR;
  1139. return sd_r1b;
  1140. }
  1141. sd->state = sd_programming_state;
  1142. clear_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
  1143. /* Bzzzzzzztt .... Operation complete. */
  1144. sd->state = sd_transfer_state;
  1145. return sd_r1b;
  1146. default:
  1147. break;
  1148. }
  1149. break;
  1150. case 30: /* CMD30: SEND_WRITE_PROT */
  1151. switch (sd->state) {
  1152. case sd_transfer_state:
  1153. sd->state = sd_sendingdata_state;
  1154. *(uint32_t *) sd->data = sd_wpbits(sd, req.arg);
  1155. sd->data_start = addr;
  1156. sd->data_offset = 0;
  1157. return sd_r1b;
  1158. default:
  1159. break;
  1160. }
  1161. break;
  1162. /* Erase commands (Class 5) */
  1163. case 32: /* CMD32: ERASE_WR_BLK_START */
  1164. switch (sd->state) {
  1165. case sd_transfer_state:
  1166. sd->erase_start = req.arg;
  1167. return sd_r1;
  1168. default:
  1169. break;
  1170. }
  1171. break;
  1172. case 33: /* CMD33: ERASE_WR_BLK_END */
  1173. switch (sd->state) {
  1174. case sd_transfer_state:
  1175. sd->erase_end = req.arg;
  1176. return sd_r1;
  1177. default:
  1178. break;
  1179. }
  1180. break;
  1181. case 38: /* CMD38: ERASE */
  1182. switch (sd->state) {
  1183. case sd_transfer_state:
  1184. if (sd->csd[14] & 0x30) {
  1185. sd->card_status |= WP_VIOLATION;
  1186. return sd_r1b;
  1187. }
  1188. sd->state = sd_programming_state;
  1189. sd_erase(sd);
  1190. /* Bzzzzzzztt .... Operation complete. */
  1191. sd->state = sd_transfer_state;
  1192. return sd_r1b;
  1193. default:
  1194. break;
  1195. }
  1196. break;
  1197. /* Lock card commands (Class 7) */
  1198. case 42: /* CMD42: LOCK_UNLOCK */
  1199. switch (sd->state) {
  1200. case sd_transfer_state:
  1201. sd->state = sd_receivingdata_state;
  1202. sd->data_start = 0;
  1203. sd->data_offset = 0;
  1204. return sd_r1;
  1205. default:
  1206. break;
  1207. }
  1208. break;
  1209. case 52 ... 54:
  1210. /* CMD52, CMD53, CMD54: reserved for SDIO cards
  1211. * (see the SDIO Simplified Specification V2.0)
  1212. * Handle as illegal command but do not complain
  1213. * on stderr, as some OSes may use these in their
  1214. * probing for presence of an SDIO card.
  1215. */
  1216. return sd_illegal;
  1217. /* Application specific commands (Class 8) */
  1218. case 55: /* CMD55: APP_CMD */
  1219. switch (sd->state) {
  1220. case sd_ready_state:
  1221. case sd_identification_state:
  1222. case sd_inactive_state:
  1223. return sd_illegal;
  1224. case sd_idle_state:
  1225. if (rca) {
  1226. qemu_log_mask(LOG_GUEST_ERROR,
  1227. "SD: illegal RCA 0x%04x for APP_CMD\n", req.cmd);
  1228. }
  1229. default:
  1230. break;
  1231. }
  1232. if (!sd->spi) {
  1233. if (sd->rca != rca) {
  1234. return sd_r0;
  1235. }
  1236. }
  1237. sd->expecting_acmd = true;
  1238. sd->card_status |= APP_CMD;
  1239. return sd_r1;
  1240. case 56: /* CMD56: GEN_CMD */
  1241. switch (sd->state) {
  1242. case sd_transfer_state:
  1243. sd->data_offset = 0;
  1244. if (req.arg & 1)
  1245. sd->state = sd_sendingdata_state;
  1246. else
  1247. sd->state = sd_receivingdata_state;
  1248. return sd_r1;
  1249. default:
  1250. break;
  1251. }
  1252. break;
  1253. case 58: /* CMD58: READ_OCR (SPI) */
  1254. if (!sd->spi) {
  1255. goto bad_cmd;
  1256. }
  1257. return sd_r3;
  1258. case 59: /* CMD59: CRC_ON_OFF (SPI) */
  1259. if (!sd->spi) {
  1260. goto bad_cmd;
  1261. }
  1262. goto unimplemented_spi_cmd;
  1263. default:
  1264. bad_cmd:
  1265. qemu_log_mask(LOG_GUEST_ERROR, "SD: Unknown CMD%i\n", req.cmd);
  1266. return sd_illegal;
  1267. unimplemented_spi_cmd:
  1268. /* Commands that are recognised but not yet implemented in SPI mode. */
  1269. qemu_log_mask(LOG_UNIMP, "SD: CMD%i not implemented in SPI mode\n",
  1270. req.cmd);
  1271. return sd_illegal;
  1272. }
  1273. qemu_log_mask(LOG_GUEST_ERROR, "SD: CMD%i in a wrong state\n", req.cmd);
  1274. return sd_illegal;
  1275. }
  1276. static sd_rsp_type_t sd_app_command(SDState *sd,
  1277. SDRequest req)
  1278. {
  1279. trace_sdcard_app_command(sd->proto_name, sd_acmd_name(req.cmd),
  1280. req.cmd, req.arg, sd_state_name(sd->state));
  1281. sd->card_status |= APP_CMD;
  1282. switch (req.cmd) {
  1283. case 6: /* ACMD6: SET_BUS_WIDTH */
  1284. if (sd->spi) {
  1285. goto unimplemented_spi_cmd;
  1286. }
  1287. switch (sd->state) {
  1288. case sd_transfer_state:
  1289. sd->sd_status[0] &= 0x3f;
  1290. sd->sd_status[0] |= (req.arg & 0x03) << 6;
  1291. return sd_r1;
  1292. default:
  1293. break;
  1294. }
  1295. break;
  1296. case 13: /* ACMD13: SD_STATUS */
  1297. switch (sd->state) {
  1298. case sd_transfer_state:
  1299. sd->state = sd_sendingdata_state;
  1300. sd->data_start = 0;
  1301. sd->data_offset = 0;
  1302. return sd_r1;
  1303. default:
  1304. break;
  1305. }
  1306. break;
  1307. case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */
  1308. switch (sd->state) {
  1309. case sd_transfer_state:
  1310. *(uint32_t *) sd->data = sd->blk_written;
  1311. sd->state = sd_sendingdata_state;
  1312. sd->data_start = 0;
  1313. sd->data_offset = 0;
  1314. return sd_r1;
  1315. default:
  1316. break;
  1317. }
  1318. break;
  1319. case 23: /* ACMD23: SET_WR_BLK_ERASE_COUNT */
  1320. switch (sd->state) {
  1321. case sd_transfer_state:
  1322. return sd_r1;
  1323. default:
  1324. break;
  1325. }
  1326. break;
  1327. case 41: /* ACMD41: SD_APP_OP_COND */
  1328. if (sd->spi) {
  1329. /* SEND_OP_CMD */
  1330. sd->state = sd_transfer_state;
  1331. return sd_r1;
  1332. }
  1333. if (sd->state != sd_idle_state) {
  1334. break;
  1335. }
  1336. /* If it's the first ACMD41 since reset, we need to decide
  1337. * whether to power up. If this is not an enquiry ACMD41,
  1338. * we immediately report power on and proceed below to the
  1339. * ready state, but if it is, we set a timer to model a
  1340. * delay for power up. This works around a bug in EDK2
  1341. * UEFI, which sends an initial enquiry ACMD41, but
  1342. * assumes that the card is in ready state as soon as it
  1343. * sees the power up bit set. */
  1344. if (!FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP)) {
  1345. if ((req.arg & ACMD41_ENQUIRY_MASK) != 0) {
  1346. timer_del(sd->ocr_power_timer);
  1347. sd_ocr_powerup(sd);
  1348. } else {
  1349. trace_sdcard_inquiry_cmd41();
  1350. if (!timer_pending(sd->ocr_power_timer)) {
  1351. timer_mod_ns(sd->ocr_power_timer,
  1352. (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
  1353. + OCR_POWER_DELAY_NS));
  1354. }
  1355. }
  1356. }
  1357. if (FIELD_EX32(sd->ocr & req.arg, OCR, VDD_VOLTAGE_WINDOW)) {
  1358. /* We accept any voltage. 10000 V is nothing.
  1359. *
  1360. * Once we're powered up, we advance straight to ready state
  1361. * unless it's an enquiry ACMD41 (bits 23:0 == 0).
  1362. */
  1363. sd->state = sd_ready_state;
  1364. }
  1365. return sd_r3;
  1366. case 42: /* ACMD42: SET_CLR_CARD_DETECT */
  1367. switch (sd->state) {
  1368. case sd_transfer_state:
  1369. /* Bringing in the 50KOhm pull-up resistor... Done. */
  1370. return sd_r1;
  1371. default:
  1372. break;
  1373. }
  1374. break;
  1375. case 51: /* ACMD51: SEND_SCR */
  1376. switch (sd->state) {
  1377. case sd_transfer_state:
  1378. sd->state = sd_sendingdata_state;
  1379. sd->data_start = 0;
  1380. sd->data_offset = 0;
  1381. return sd_r1;
  1382. default:
  1383. break;
  1384. }
  1385. break;
  1386. case 18: /* Reserved for SD security applications */
  1387. case 25:
  1388. case 26:
  1389. case 38:
  1390. case 43 ... 49:
  1391. /* Refer to the "SD Specifications Part3 Security Specification" for
  1392. * information about the SD Security Features.
  1393. */
  1394. qemu_log_mask(LOG_UNIMP, "SD: CMD%i Security not implemented\n",
  1395. req.cmd);
  1396. return sd_illegal;
  1397. default:
  1398. /* Fall back to standard commands. */
  1399. return sd_normal_command(sd, req);
  1400. unimplemented_spi_cmd:
  1401. /* Commands that are recognised but not yet implemented in SPI mode. */
  1402. qemu_log_mask(LOG_UNIMP, "SD: CMD%i not implemented in SPI mode\n",
  1403. req.cmd);
  1404. return sd_illegal;
  1405. }
  1406. qemu_log_mask(LOG_GUEST_ERROR, "SD: ACMD%i in a wrong state\n", req.cmd);
  1407. return sd_illegal;
  1408. }
  1409. static int cmd_valid_while_locked(SDState *sd, SDRequest *req)
  1410. {
  1411. /* Valid commands in locked state:
  1412. * basic class (0)
  1413. * lock card class (7)
  1414. * CMD16
  1415. * implicitly, the ACMD prefix CMD55
  1416. * ACMD41 and ACMD42
  1417. * Anything else provokes an "illegal command" response.
  1418. */
  1419. if (sd->expecting_acmd) {
  1420. return req->cmd == 41 || req->cmd == 42;
  1421. }
  1422. if (req->cmd == 16 || req->cmd == 55) {
  1423. return 1;
  1424. }
  1425. return sd_cmd_class[req->cmd] == 0
  1426. || sd_cmd_class[req->cmd] == 7;
  1427. }
  1428. int sd_do_command(SDState *sd, SDRequest *req,
  1429. uint8_t *response) {
  1430. int last_state;
  1431. sd_rsp_type_t rtype;
  1432. int rsplen;
  1433. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable) {
  1434. return 0;
  1435. }
  1436. if (sd_req_crc_validate(req)) {
  1437. sd->card_status |= COM_CRC_ERROR;
  1438. rtype = sd_illegal;
  1439. goto send_response;
  1440. }
  1441. if (req->cmd >= SDMMC_CMD_MAX) {
  1442. qemu_log_mask(LOG_GUEST_ERROR, "SD: incorrect command 0x%02x\n",
  1443. req->cmd);
  1444. req->cmd &= 0x3f;
  1445. }
  1446. if (sd->card_status & CARD_IS_LOCKED) {
  1447. if (!cmd_valid_while_locked(sd, req)) {
  1448. sd->card_status |= ILLEGAL_COMMAND;
  1449. sd->expecting_acmd = false;
  1450. qemu_log_mask(LOG_GUEST_ERROR, "SD: Card is locked\n");
  1451. rtype = sd_illegal;
  1452. goto send_response;
  1453. }
  1454. }
  1455. last_state = sd->state;
  1456. sd_set_mode(sd);
  1457. if (sd->expecting_acmd) {
  1458. sd->expecting_acmd = false;
  1459. rtype = sd_app_command(sd, *req);
  1460. } else {
  1461. rtype = sd_normal_command(sd, *req);
  1462. }
  1463. if (rtype == sd_illegal) {
  1464. sd->card_status |= ILLEGAL_COMMAND;
  1465. } else {
  1466. /* Valid command, we can update the 'state before command' bits.
  1467. * (Do this now so they appear in r1 responses.)
  1468. */
  1469. sd->current_cmd = req->cmd;
  1470. sd->card_status &= ~CURRENT_STATE;
  1471. sd->card_status |= (last_state << 9);
  1472. }
  1473. send_response:
  1474. switch (rtype) {
  1475. case sd_r1:
  1476. case sd_r1b:
  1477. sd_response_r1_make(sd, response);
  1478. rsplen = 4;
  1479. break;
  1480. case sd_r2_i:
  1481. memcpy(response, sd->cid, sizeof(sd->cid));
  1482. rsplen = 16;
  1483. break;
  1484. case sd_r2_s:
  1485. memcpy(response, sd->csd, sizeof(sd->csd));
  1486. rsplen = 16;
  1487. break;
  1488. case sd_r3:
  1489. sd_response_r3_make(sd, response);
  1490. rsplen = 4;
  1491. break;
  1492. case sd_r6:
  1493. sd_response_r6_make(sd, response);
  1494. rsplen = 4;
  1495. break;
  1496. case sd_r7:
  1497. sd_response_r7_make(sd, response);
  1498. rsplen = 4;
  1499. break;
  1500. case sd_r0:
  1501. case sd_illegal:
  1502. rsplen = 0;
  1503. break;
  1504. default:
  1505. g_assert_not_reached();
  1506. }
  1507. trace_sdcard_response(sd_response_name(rtype), rsplen);
  1508. if (rtype != sd_illegal) {
  1509. /* Clear the "clear on valid command" status bits now we've
  1510. * sent any response
  1511. */
  1512. sd->card_status &= ~CARD_STATUS_B;
  1513. }
  1514. #ifdef DEBUG_SD
  1515. qemu_hexdump((const char *)response, stderr, "Response", rsplen);
  1516. #endif
  1517. return rsplen;
  1518. }
  1519. static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len)
  1520. {
  1521. trace_sdcard_read_block(addr, len);
  1522. if (!sd->blk || blk_pread(sd->blk, addr, sd->data, len) < 0) {
  1523. fprintf(stderr, "sd_blk_read: read error on host side\n");
  1524. }
  1525. }
  1526. static void sd_blk_write(SDState *sd, uint64_t addr, uint32_t len)
  1527. {
  1528. trace_sdcard_write_block(addr, len);
  1529. if (!sd->blk || blk_pwrite(sd->blk, addr, sd->data, len, 0) < 0) {
  1530. fprintf(stderr, "sd_blk_write: write error on host side\n");
  1531. }
  1532. }
  1533. #define BLK_READ_BLOCK(a, len) sd_blk_read(sd, a, len)
  1534. #define BLK_WRITE_BLOCK(a, len) sd_blk_write(sd, a, len)
  1535. #define APP_READ_BLOCK(a, len) memset(sd->data, 0xec, len)
  1536. #define APP_WRITE_BLOCK(a, len)
  1537. void sd_write_data(SDState *sd, uint8_t value)
  1538. {
  1539. int i;
  1540. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable)
  1541. return;
  1542. if (sd->state != sd_receivingdata_state) {
  1543. qemu_log_mask(LOG_GUEST_ERROR,
  1544. "sd_write_data: not in Receiving-Data state\n");
  1545. return;
  1546. }
  1547. if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION))
  1548. return;
  1549. trace_sdcard_write_data(sd->proto_name,
  1550. sd_acmd_name(sd->current_cmd),
  1551. sd->current_cmd, value);
  1552. switch (sd->current_cmd) {
  1553. case 24: /* CMD24: WRITE_SINGLE_BLOCK */
  1554. sd->data[sd->data_offset ++] = value;
  1555. if (sd->data_offset >= sd->blk_len) {
  1556. /* TODO: Check CRC before committing */
  1557. sd->state = sd_programming_state;
  1558. BLK_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1559. sd->blk_written ++;
  1560. sd->csd[14] |= 0x40;
  1561. /* Bzzzzzzztt .... Operation complete. */
  1562. sd->state = sd_transfer_state;
  1563. }
  1564. break;
  1565. case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
  1566. if (sd->data_offset == 0) {
  1567. /* Start of the block - let's check the address is valid */
  1568. if (sd->data_start + sd->blk_len > sd->size) {
  1569. sd->card_status |= ADDRESS_ERROR;
  1570. break;
  1571. }
  1572. if (sd_wp_addr(sd, sd->data_start)) {
  1573. sd->card_status |= WP_VIOLATION;
  1574. break;
  1575. }
  1576. }
  1577. sd->data[sd->data_offset++] = value;
  1578. if (sd->data_offset >= sd->blk_len) {
  1579. /* TODO: Check CRC before committing */
  1580. sd->state = sd_programming_state;
  1581. BLK_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1582. sd->blk_written++;
  1583. sd->data_start += sd->blk_len;
  1584. sd->data_offset = 0;
  1585. sd->csd[14] |= 0x40;
  1586. /* Bzzzzzzztt .... Operation complete. */
  1587. if (sd->multi_blk_cnt != 0) {
  1588. if (--sd->multi_blk_cnt == 0) {
  1589. /* Stop! */
  1590. sd->state = sd_transfer_state;
  1591. break;
  1592. }
  1593. }
  1594. sd->state = sd_receivingdata_state;
  1595. }
  1596. break;
  1597. case 26: /* CMD26: PROGRAM_CID */
  1598. sd->data[sd->data_offset ++] = value;
  1599. if (sd->data_offset >= sizeof(sd->cid)) {
  1600. /* TODO: Check CRC before committing */
  1601. sd->state = sd_programming_state;
  1602. for (i = 0; i < sizeof(sd->cid); i ++)
  1603. if ((sd->cid[i] | 0x00) != sd->data[i])
  1604. sd->card_status |= CID_CSD_OVERWRITE;
  1605. if (!(sd->card_status & CID_CSD_OVERWRITE))
  1606. for (i = 0; i < sizeof(sd->cid); i ++) {
  1607. sd->cid[i] |= 0x00;
  1608. sd->cid[i] &= sd->data[i];
  1609. }
  1610. /* Bzzzzzzztt .... Operation complete. */
  1611. sd->state = sd_transfer_state;
  1612. }
  1613. break;
  1614. case 27: /* CMD27: PROGRAM_CSD */
  1615. sd->data[sd->data_offset ++] = value;
  1616. if (sd->data_offset >= sizeof(sd->csd)) {
  1617. /* TODO: Check CRC before committing */
  1618. sd->state = sd_programming_state;
  1619. for (i = 0; i < sizeof(sd->csd); i ++)
  1620. if ((sd->csd[i] | sd_csd_rw_mask[i]) !=
  1621. (sd->data[i] | sd_csd_rw_mask[i]))
  1622. sd->card_status |= CID_CSD_OVERWRITE;
  1623. /* Copy flag (OTP) & Permanent write protect */
  1624. if (sd->csd[14] & ~sd->data[14] & 0x60)
  1625. sd->card_status |= CID_CSD_OVERWRITE;
  1626. if (!(sd->card_status & CID_CSD_OVERWRITE))
  1627. for (i = 0; i < sizeof(sd->csd); i ++) {
  1628. sd->csd[i] |= sd_csd_rw_mask[i];
  1629. sd->csd[i] &= sd->data[i];
  1630. }
  1631. /* Bzzzzzzztt .... Operation complete. */
  1632. sd->state = sd_transfer_state;
  1633. }
  1634. break;
  1635. case 42: /* CMD42: LOCK_UNLOCK */
  1636. sd->data[sd->data_offset ++] = value;
  1637. if (sd->data_offset >= sd->blk_len) {
  1638. /* TODO: Check CRC before committing */
  1639. sd->state = sd_programming_state;
  1640. sd_lock_command(sd);
  1641. /* Bzzzzzzztt .... Operation complete. */
  1642. sd->state = sd_transfer_state;
  1643. }
  1644. break;
  1645. case 56: /* CMD56: GEN_CMD */
  1646. sd->data[sd->data_offset ++] = value;
  1647. if (sd->data_offset >= sd->blk_len) {
  1648. APP_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1649. sd->state = sd_transfer_state;
  1650. }
  1651. break;
  1652. default:
  1653. qemu_log_mask(LOG_GUEST_ERROR, "sd_write_data: unknown command\n");
  1654. break;
  1655. }
  1656. }
  1657. #define SD_TUNING_BLOCK_SIZE 64
  1658. static const uint8_t sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = {
  1659. /* See: Physical Layer Simplified Specification Version 3.01, Table 4-2 */
  1660. 0xff, 0x0f, 0xff, 0x00, 0x0f, 0xfc, 0xc3, 0xcc,
  1661. 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
  1662. 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
  1663. 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
  1664. 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
  1665. 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
  1666. 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
  1667. 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
  1668. };
  1669. uint8_t sd_read_data(SDState *sd)
  1670. {
  1671. /* TODO: Append CRCs */
  1672. uint8_t ret;
  1673. int io_len;
  1674. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable)
  1675. return 0x00;
  1676. if (sd->state != sd_sendingdata_state) {
  1677. qemu_log_mask(LOG_GUEST_ERROR,
  1678. "sd_read_data: not in Sending-Data state\n");
  1679. return 0x00;
  1680. }
  1681. if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION))
  1682. return 0x00;
  1683. io_len = (sd->ocr & (1 << 30)) ? 512 : sd->blk_len;
  1684. trace_sdcard_read_data(sd->proto_name,
  1685. sd_acmd_name(sd->current_cmd),
  1686. sd->current_cmd, io_len);
  1687. switch (sd->current_cmd) {
  1688. case 6: /* CMD6: SWITCH_FUNCTION */
  1689. ret = sd->data[sd->data_offset ++];
  1690. if (sd->data_offset >= 64)
  1691. sd->state = sd_transfer_state;
  1692. break;
  1693. case 9: /* CMD9: SEND_CSD */
  1694. case 10: /* CMD10: SEND_CID */
  1695. ret = sd->data[sd->data_offset ++];
  1696. if (sd->data_offset >= 16)
  1697. sd->state = sd_transfer_state;
  1698. break;
  1699. case 13: /* ACMD13: SD_STATUS */
  1700. ret = sd->sd_status[sd->data_offset ++];
  1701. if (sd->data_offset >= sizeof(sd->sd_status))
  1702. sd->state = sd_transfer_state;
  1703. break;
  1704. case 17: /* CMD17: READ_SINGLE_BLOCK */
  1705. if (sd->data_offset == 0)
  1706. BLK_READ_BLOCK(sd->data_start, io_len);
  1707. ret = sd->data[sd->data_offset ++];
  1708. if (sd->data_offset >= io_len)
  1709. sd->state = sd_transfer_state;
  1710. break;
  1711. case 18: /* CMD18: READ_MULTIPLE_BLOCK */
  1712. if (sd->data_offset == 0) {
  1713. if (sd->data_start + io_len > sd->size) {
  1714. sd->card_status |= ADDRESS_ERROR;
  1715. return 0x00;
  1716. }
  1717. BLK_READ_BLOCK(sd->data_start, io_len);
  1718. }
  1719. ret = sd->data[sd->data_offset ++];
  1720. if (sd->data_offset >= io_len) {
  1721. sd->data_start += io_len;
  1722. sd->data_offset = 0;
  1723. if (sd->multi_blk_cnt != 0) {
  1724. if (--sd->multi_blk_cnt == 0) {
  1725. /* Stop! */
  1726. sd->state = sd_transfer_state;
  1727. break;
  1728. }
  1729. }
  1730. }
  1731. break;
  1732. case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
  1733. if (sd->data_offset >= SD_TUNING_BLOCK_SIZE - 1) {
  1734. sd->state = sd_transfer_state;
  1735. }
  1736. ret = sd_tuning_block_pattern[sd->data_offset++];
  1737. break;
  1738. case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */
  1739. ret = sd->data[sd->data_offset ++];
  1740. if (sd->data_offset >= 4)
  1741. sd->state = sd_transfer_state;
  1742. break;
  1743. case 30: /* CMD30: SEND_WRITE_PROT */
  1744. ret = sd->data[sd->data_offset ++];
  1745. if (sd->data_offset >= 4)
  1746. sd->state = sd_transfer_state;
  1747. break;
  1748. case 51: /* ACMD51: SEND_SCR */
  1749. ret = sd->scr[sd->data_offset ++];
  1750. if (sd->data_offset >= sizeof(sd->scr))
  1751. sd->state = sd_transfer_state;
  1752. break;
  1753. case 56: /* CMD56: GEN_CMD */
  1754. if (sd->data_offset == 0)
  1755. APP_READ_BLOCK(sd->data_start, sd->blk_len);
  1756. ret = sd->data[sd->data_offset ++];
  1757. if (sd->data_offset >= sd->blk_len)
  1758. sd->state = sd_transfer_state;
  1759. break;
  1760. default:
  1761. qemu_log_mask(LOG_GUEST_ERROR, "sd_read_data: unknown command\n");
  1762. return 0x00;
  1763. }
  1764. return ret;
  1765. }
  1766. bool sd_data_ready(SDState *sd)
  1767. {
  1768. return sd->state == sd_sendingdata_state;
  1769. }
  1770. void sd_enable(SDState *sd, bool enable)
  1771. {
  1772. sd->enable = enable;
  1773. }
  1774. static void sd_instance_init(Object *obj)
  1775. {
  1776. SDState *sd = SD_CARD(obj);
  1777. sd->enable = true;
  1778. sd->ocr_power_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sd_ocr_powerup, sd);
  1779. }
  1780. static void sd_instance_finalize(Object *obj)
  1781. {
  1782. SDState *sd = SD_CARD(obj);
  1783. timer_del(sd->ocr_power_timer);
  1784. timer_free(sd->ocr_power_timer);
  1785. }
  1786. static void sd_realize(DeviceState *dev, Error **errp)
  1787. {
  1788. SDState *sd = SD_CARD(dev);
  1789. int ret;
  1790. sd->proto_name = sd->spi ? "SPI" : "SD";
  1791. switch (sd->spec_version) {
  1792. case SD_PHY_SPECv1_10_VERS
  1793. ... SD_PHY_SPECv3_01_VERS:
  1794. break;
  1795. default:
  1796. error_setg(errp, "Invalid SD card Spec version: %u", sd->spec_version);
  1797. return;
  1798. }
  1799. if (sd->blk && blk_is_read_only(sd->blk)) {
  1800. error_setg(errp, "Cannot use read-only drive as SD card");
  1801. return;
  1802. }
  1803. if (sd->blk) {
  1804. ret = blk_set_perm(sd->blk, BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE,
  1805. BLK_PERM_ALL, errp);
  1806. if (ret < 0) {
  1807. return;
  1808. }
  1809. blk_set_dev_ops(sd->blk, &sd_block_ops, sd);
  1810. }
  1811. }
  1812. static Property sd_properties[] = {
  1813. DEFINE_PROP_UINT8("spec_version", SDState,
  1814. spec_version, SD_PHY_SPECv2_00_VERS),
  1815. DEFINE_PROP_DRIVE("drive", SDState, blk),
  1816. /* We do not model the chip select pin, so allow the board to select
  1817. * whether card should be in SSI or MMC/SD mode. It is also up to the
  1818. * board to ensure that ssi transfers only occur when the chip select
  1819. * is asserted. */
  1820. DEFINE_PROP_BOOL("spi", SDState, spi, false),
  1821. DEFINE_PROP_END_OF_LIST()
  1822. };
  1823. static void sd_class_init(ObjectClass *klass, void *data)
  1824. {
  1825. DeviceClass *dc = DEVICE_CLASS(klass);
  1826. SDCardClass *sc = SD_CARD_CLASS(klass);
  1827. dc->realize = sd_realize;
  1828. dc->props = sd_properties;
  1829. dc->vmsd = &sd_vmstate;
  1830. dc->reset = sd_reset;
  1831. dc->bus_type = TYPE_SD_BUS;
  1832. set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
  1833. sc->set_voltage = sd_set_voltage;
  1834. sc->get_dat_lines = sd_get_dat_lines;
  1835. sc->get_cmd_line = sd_get_cmd_line;
  1836. sc->do_command = sd_do_command;
  1837. sc->write_data = sd_write_data;
  1838. sc->read_data = sd_read_data;
  1839. sc->data_ready = sd_data_ready;
  1840. sc->enable = sd_enable;
  1841. sc->get_inserted = sd_get_inserted;
  1842. sc->get_readonly = sd_get_readonly;
  1843. }
  1844. static const TypeInfo sd_info = {
  1845. .name = TYPE_SD_CARD,
  1846. .parent = TYPE_DEVICE,
  1847. .instance_size = sizeof(SDState),
  1848. .class_size = sizeof(SDCardClass),
  1849. .class_init = sd_class_init,
  1850. .instance_init = sd_instance_init,
  1851. .instance_finalize = sd_instance_finalize,
  1852. };
  1853. static void sd_register_types(void)
  1854. {
  1855. type_register_static(&sd_info);
  1856. }
  1857. type_init(sd_register_types)