macio.c 18 KB

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  1. /*
  2. * PowerMac MacIO device emulation
  3. *
  4. * Copyright (c) 2005-2007 Fabrice Bellard
  5. * Copyright (c) 2007 Jocelyn Mayer
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy
  8. * of this software and associated documentation files (the "Software"), to deal
  9. * in the Software without restriction, including without limitation the rights
  10. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11. * copies of the Software, and to permit persons to whom the Software is
  12. * furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23. * THE SOFTWARE.
  24. */
  25. #include "qemu/osdep.h"
  26. #include "qapi/error.h"
  27. #include "qemu/module.h"
  28. #include "hw/ppc/mac.h"
  29. #include "hw/misc/macio/cuda.h"
  30. #include "hw/pci/pci.h"
  31. #include "hw/ppc/mac_dbdma.h"
  32. #include "hw/qdev-properties.h"
  33. #include "migration/vmstate.h"
  34. #include "hw/char/escc.h"
  35. #include "hw/misc/macio/macio.h"
  36. #include "hw/intc/heathrow_pic.h"
  37. #include "sysemu/sysemu.h"
  38. #include "trace.h"
  39. /* Note: this code is strongly inspirated from the corresponding code
  40. * in PearPC */
  41. /*
  42. * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
  43. * while the other one is the normal, current ESCC interface.
  44. *
  45. * The magic below creates memory aliases to spawn the escc-legacy device
  46. * purely by rerouting the respective registers to our escc region. This
  47. * works because the only difference between the two memory regions is the
  48. * register layout, not their semantics.
  49. *
  50. * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
  51. */
  52. static void macio_escc_legacy_setup(MacIOState *s)
  53. {
  54. ESCCState *escc = ESCC(&s->escc);
  55. SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
  56. MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
  57. MemoryRegion *bar = &s->bar;
  58. int i;
  59. static const int maps[] = {
  60. 0x00, 0x00, /* Command B */
  61. 0x02, 0x20, /* Command A */
  62. 0x04, 0x10, /* Data B */
  63. 0x06, 0x30, /* Data A */
  64. 0x08, 0x40, /* Enhancement B */
  65. 0x0A, 0x50, /* Enhancement A */
  66. 0x80, 0x80, /* Recovery count */
  67. 0x90, 0x90, /* Start A */
  68. 0xa0, 0xa0, /* Start B */
  69. 0xb0, 0xb0, /* Detect AB */
  70. };
  71. memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256);
  72. for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
  73. MemoryRegion *port = g_new(MemoryRegion, 1);
  74. memory_region_init_alias(port, OBJECT(s), "escc-legacy-port",
  75. sysbus_mmio_get_region(sbd, 0),
  76. maps[i + 1], 0x2);
  77. memory_region_add_subregion(escc_legacy, maps[i], port);
  78. }
  79. memory_region_add_subregion(bar, 0x12000, escc_legacy);
  80. }
  81. static void macio_bar_setup(MacIOState *s)
  82. {
  83. ESCCState *escc = ESCC(&s->escc);
  84. SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
  85. MemoryRegion *bar = &s->bar;
  86. memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0));
  87. macio_escc_legacy_setup(s);
  88. }
  89. static void macio_init_child_obj(MacIOState *s, const char *childname,
  90. void *child, size_t childsize,
  91. const char *childtype)
  92. {
  93. object_initialize_child(OBJECT(s), childname, child, childsize, childtype,
  94. &error_abort, NULL);
  95. qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus));
  96. }
  97. static void macio_common_realize(PCIDevice *d, Error **errp)
  98. {
  99. MacIOState *s = MACIO(d);
  100. SysBusDevice *sysbus_dev;
  101. Error *err = NULL;
  102. object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err);
  103. if (err) {
  104. error_propagate(errp, err);
  105. return;
  106. }
  107. sysbus_dev = SYS_BUS_DEVICE(&s->dbdma);
  108. memory_region_add_subregion(&s->bar, 0x08000,
  109. sysbus_mmio_get_region(sysbus_dev, 0));
  110. qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0);
  111. qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK);
  112. qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4);
  113. qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0));
  114. qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1));
  115. qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial);
  116. qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial);
  117. object_property_set_bool(OBJECT(&s->escc), true, "realized", &err);
  118. if (err) {
  119. error_propagate(errp, err);
  120. return;
  121. }
  122. macio_bar_setup(s);
  123. pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
  124. }
  125. static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
  126. qemu_irq irq0, qemu_irq irq1, int dmaid,
  127. Error **errp)
  128. {
  129. SysBusDevice *sysbus_dev;
  130. sysbus_dev = SYS_BUS_DEVICE(ide);
  131. sysbus_connect_irq(sysbus_dev, 0, irq0);
  132. sysbus_connect_irq(sysbus_dev, 1, irq1);
  133. qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid);
  134. object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp);
  135. macio_ide_register_dma(ide);
  136. object_property_set_bool(OBJECT(ide), true, "realized", errp);
  137. }
  138. static void macio_oldworld_realize(PCIDevice *d, Error **errp)
  139. {
  140. MacIOState *s = MACIO(d);
  141. OldWorldMacIOState *os = OLDWORLD_MACIO(d);
  142. DeviceState *pic_dev = DEVICE(os->pic);
  143. Error *err = NULL;
  144. SysBusDevice *sysbus_dev;
  145. macio_common_realize(d, &err);
  146. if (err) {
  147. error_propagate(errp, err);
  148. return;
  149. }
  150. qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
  151. s->frequency);
  152. object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
  153. if (err) {
  154. error_propagate(errp, err);
  155. return;
  156. }
  157. sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
  158. memory_region_add_subregion(&s->bar, 0x16000,
  159. sysbus_mmio_get_region(sysbus_dev, 0));
  160. sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
  161. OLDWORLD_CUDA_IRQ));
  162. sysbus_dev = SYS_BUS_DEVICE(&s->escc);
  163. sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
  164. OLDWORLD_ESCCB_IRQ));
  165. sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
  166. OLDWORLD_ESCCA_IRQ));
  167. object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
  168. if (err) {
  169. error_propagate(errp, err);
  170. return;
  171. }
  172. sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
  173. memory_region_add_subregion(&s->bar, 0x60000,
  174. sysbus_mmio_get_region(sysbus_dev, 0));
  175. pmac_format_nvram_partition(&os->nvram, os->nvram.size);
  176. /* Heathrow PIC */
  177. sysbus_dev = SYS_BUS_DEVICE(os->pic);
  178. memory_region_add_subregion(&s->bar, 0x0,
  179. sysbus_mmio_get_region(sysbus_dev, 0));
  180. /* IDE buses */
  181. macio_realize_ide(s, &os->ide[0],
  182. qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ),
  183. qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ),
  184. 0x16, &err);
  185. if (err) {
  186. error_propagate(errp, err);
  187. return;
  188. }
  189. macio_realize_ide(s, &os->ide[1],
  190. qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ),
  191. qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ),
  192. 0x1a, &err);
  193. if (err) {
  194. error_propagate(errp, err);
  195. return;
  196. }
  197. }
  198. static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
  199. int index)
  200. {
  201. gchar *name = g_strdup_printf("ide[%i]", index);
  202. uint32_t addr = 0x1f000 + ((index + 1) * 0x1000);
  203. macio_init_child_obj(s, name, ide, ide_size, TYPE_MACIO_IDE);
  204. qdev_prop_set_uint32(DEVICE(ide), "addr", addr);
  205. memory_region_add_subregion(&s->bar, addr, &ide->mem);
  206. g_free(name);
  207. }
  208. static void macio_oldworld_init(Object *obj)
  209. {
  210. MacIOState *s = MACIO(obj);
  211. OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
  212. DeviceState *dev;
  213. int i;
  214. object_property_add_link(obj, "pic", TYPE_HEATHROW,
  215. (Object **) &os->pic,
  216. qdev_prop_allow_set_link_before_realize,
  217. 0, NULL);
  218. macio_init_child_obj(s, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA);
  219. object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
  220. dev = DEVICE(&os->nvram);
  221. qdev_prop_set_uint32(dev, "size", 0x2000);
  222. qdev_prop_set_uint32(dev, "it_shift", 4);
  223. for (i = 0; i < 2; i++) {
  224. macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
  225. }
  226. }
  227. static void timer_write(void *opaque, hwaddr addr, uint64_t value,
  228. unsigned size)
  229. {
  230. trace_macio_timer_write(addr, size, value);
  231. }
  232. static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
  233. {
  234. uint32_t value = 0;
  235. uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  236. uint64_t kltime;
  237. kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
  238. kltime = muldiv64(kltime, 18432000, 1048575);
  239. switch (addr) {
  240. case 0x38:
  241. value = kltime;
  242. break;
  243. case 0x3c:
  244. value = kltime >> 32;
  245. break;
  246. }
  247. trace_macio_timer_read(addr, size, value);
  248. return value;
  249. }
  250. static const MemoryRegionOps timer_ops = {
  251. .read = timer_read,
  252. .write = timer_write,
  253. .endianness = DEVICE_LITTLE_ENDIAN,
  254. };
  255. static void macio_newworld_realize(PCIDevice *d, Error **errp)
  256. {
  257. MacIOState *s = MACIO(d);
  258. NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
  259. DeviceState *pic_dev = DEVICE(ns->pic);
  260. Error *err = NULL;
  261. SysBusDevice *sysbus_dev;
  262. MemoryRegion *timer_memory = NULL;
  263. macio_common_realize(d, &err);
  264. if (err) {
  265. error_propagate(errp, err);
  266. return;
  267. }
  268. sysbus_dev = SYS_BUS_DEVICE(&s->escc);
  269. sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
  270. NEWWORLD_ESCCB_IRQ));
  271. sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
  272. NEWWORLD_ESCCA_IRQ));
  273. /* OpenPIC */
  274. sysbus_dev = SYS_BUS_DEVICE(ns->pic);
  275. memory_region_add_subregion(&s->bar, 0x40000,
  276. sysbus_mmio_get_region(sysbus_dev, 0));
  277. /* IDE buses */
  278. macio_realize_ide(s, &ns->ide[0],
  279. qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ),
  280. qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ),
  281. 0x16, &err);
  282. if (err) {
  283. error_propagate(errp, err);
  284. return;
  285. }
  286. macio_realize_ide(s, &ns->ide[1],
  287. qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ),
  288. qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ),
  289. 0x1a, &err);
  290. if (err) {
  291. error_propagate(errp, err);
  292. return;
  293. }
  294. /* Timer */
  295. timer_memory = g_new(MemoryRegion, 1);
  296. memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
  297. 0x1000);
  298. memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
  299. if (ns->has_pmu) {
  300. /* GPIOs */
  301. sysbus_dev = SYS_BUS_DEVICE(&ns->gpio);
  302. object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic",
  303. &error_abort);
  304. memory_region_add_subregion(&s->bar, 0x50,
  305. sysbus_mmio_get_region(sysbus_dev, 0));
  306. object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err);
  307. /* PMU */
  308. object_initialize_child(OBJECT(s), "pmu", &s->pmu, sizeof(s->pmu),
  309. TYPE_VIA_PMU, &error_abort, NULL);
  310. object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio",
  311. &error_abort);
  312. qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb);
  313. qdev_set_parent_bus(DEVICE(&s->pmu), BUS(&s->macio_bus));
  314. object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err);
  315. if (err) {
  316. error_propagate(errp, err);
  317. return;
  318. }
  319. sysbus_dev = SYS_BUS_DEVICE(&s->pmu);
  320. sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
  321. NEWWORLD_PMU_IRQ));
  322. memory_region_add_subregion(&s->bar, 0x16000,
  323. sysbus_mmio_get_region(sysbus_dev, 0));
  324. } else {
  325. /* CUDA */
  326. object_initialize_child(OBJECT(s), "cuda", &s->cuda, sizeof(s->cuda),
  327. TYPE_CUDA, &error_abort, NULL);
  328. qdev_set_parent_bus(DEVICE(&s->cuda), BUS(&s->macio_bus));
  329. qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
  330. s->frequency);
  331. object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
  332. if (err) {
  333. error_propagate(errp, err);
  334. return;
  335. }
  336. sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
  337. sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
  338. NEWWORLD_CUDA_IRQ));
  339. memory_region_add_subregion(&s->bar, 0x16000,
  340. sysbus_mmio_get_region(sysbus_dev, 0));
  341. }
  342. }
  343. static void macio_newworld_init(Object *obj)
  344. {
  345. MacIOState *s = MACIO(obj);
  346. NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
  347. int i;
  348. object_property_add_link(obj, "pic", TYPE_OPENPIC,
  349. (Object **) &ns->pic,
  350. qdev_prop_allow_set_link_before_realize,
  351. 0, NULL);
  352. macio_init_child_obj(s, "gpio", &ns->gpio, sizeof(ns->gpio),
  353. TYPE_MACIO_GPIO);
  354. for (i = 0; i < 2; i++) {
  355. macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
  356. }
  357. }
  358. static void macio_instance_init(Object *obj)
  359. {
  360. MacIOState *s = MACIO(obj);
  361. memory_region_init(&s->bar, obj, "macio", 0x80000);
  362. qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS,
  363. DEVICE(obj), "macio.0");
  364. macio_init_child_obj(s, "dbdma", &s->dbdma, sizeof(s->dbdma),
  365. TYPE_MAC_DBDMA);
  366. macio_init_child_obj(s, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC);
  367. }
  368. static const VMStateDescription vmstate_macio_oldworld = {
  369. .name = "macio-oldworld",
  370. .version_id = 0,
  371. .minimum_version_id = 0,
  372. .fields = (VMStateField[]) {
  373. VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
  374. VMSTATE_END_OF_LIST()
  375. }
  376. };
  377. static void macio_oldworld_class_init(ObjectClass *oc, void *data)
  378. {
  379. PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
  380. DeviceClass *dc = DEVICE_CLASS(oc);
  381. pdc->realize = macio_oldworld_realize;
  382. pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
  383. dc->vmsd = &vmstate_macio_oldworld;
  384. }
  385. static const VMStateDescription vmstate_macio_newworld = {
  386. .name = "macio-newworld",
  387. .version_id = 0,
  388. .minimum_version_id = 0,
  389. .fields = (VMStateField[]) {
  390. VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
  391. VMSTATE_END_OF_LIST()
  392. }
  393. };
  394. static Property macio_newworld_properties[] = {
  395. DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false),
  396. DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false),
  397. DEFINE_PROP_END_OF_LIST()
  398. };
  399. static void macio_newworld_class_init(ObjectClass *oc, void *data)
  400. {
  401. PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
  402. DeviceClass *dc = DEVICE_CLASS(oc);
  403. pdc->realize = macio_newworld_realize;
  404. pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
  405. dc->vmsd = &vmstate_macio_newworld;
  406. dc->props = macio_newworld_properties;
  407. }
  408. static Property macio_properties[] = {
  409. DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
  410. DEFINE_PROP_END_OF_LIST()
  411. };
  412. static void macio_class_init(ObjectClass *klass, void *data)
  413. {
  414. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  415. DeviceClass *dc = DEVICE_CLASS(klass);
  416. k->vendor_id = PCI_VENDOR_ID_APPLE;
  417. k->class_id = PCI_CLASS_OTHERS << 8;
  418. dc->props = macio_properties;
  419. set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
  420. /* Reason: Uses serial_hds in macio_instance_init */
  421. dc->user_creatable = false;
  422. }
  423. static const TypeInfo macio_bus_info = {
  424. .name = TYPE_MACIO_BUS,
  425. .parent = TYPE_BUS,
  426. .instance_size = sizeof(MacIOBusState),
  427. };
  428. static const TypeInfo macio_oldworld_type_info = {
  429. .name = TYPE_OLDWORLD_MACIO,
  430. .parent = TYPE_MACIO,
  431. .instance_size = sizeof(OldWorldMacIOState),
  432. .instance_init = macio_oldworld_init,
  433. .class_init = macio_oldworld_class_init,
  434. };
  435. static const TypeInfo macio_newworld_type_info = {
  436. .name = TYPE_NEWWORLD_MACIO,
  437. .parent = TYPE_MACIO,
  438. .instance_size = sizeof(NewWorldMacIOState),
  439. .instance_init = macio_newworld_init,
  440. .class_init = macio_newworld_class_init,
  441. };
  442. static const TypeInfo macio_type_info = {
  443. .name = TYPE_MACIO,
  444. .parent = TYPE_PCI_DEVICE,
  445. .instance_size = sizeof(MacIOState),
  446. .instance_init = macio_instance_init,
  447. .abstract = true,
  448. .class_init = macio_class_init,
  449. .interfaces = (InterfaceInfo[]) {
  450. { INTERFACE_CONVENTIONAL_PCI_DEVICE },
  451. { },
  452. },
  453. };
  454. static void macio_register_types(void)
  455. {
  456. type_register_static(&macio_bus_info);
  457. type_register_static(&macio_type_info);
  458. type_register_static(&macio_oldworld_type_info);
  459. type_register_static(&macio_newworld_type_info);
  460. }
  461. type_init(macio_register_types)