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ati_int.h 2.5 KB

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  1. /*
  2. * QEMU ATI SVGA emulation
  3. *
  4. * Copyright (c) 2019 BALATON Zoltan
  5. *
  6. * This work is licensed under the GNU GPL license version 2 or later.
  7. */
  8. #ifndef ATI_INT_H
  9. #define ATI_INT_H
  10. #include "qemu/timer.h"
  11. #include "hw/pci/pci.h"
  12. #include "hw/i2c/bitbang_i2c.h"
  13. #include "vga_int.h"
  14. /*#define DEBUG_ATI*/
  15. #ifdef DEBUG_ATI
  16. #define DPRINTF(fmt, ...) printf("%s: " fmt, __func__, ## __VA_ARGS__)
  17. #else
  18. #define DPRINTF(fmt, ...) do {} while (0)
  19. #endif
  20. #define PCI_VENDOR_ID_ATI 0x1002
  21. /* Rage128 Pro GL */
  22. #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046
  23. /* Radeon RV100 (VE) */
  24. #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
  25. #define TYPE_ATI_VGA "ati-vga"
  26. #define ATI_VGA(obj) OBJECT_CHECK(ATIVGAState, (obj), TYPE_ATI_VGA)
  27. typedef struct ATIVGARegs {
  28. uint32_t mm_index;
  29. uint32_t bios_scratch[8];
  30. uint32_t gen_int_cntl;
  31. uint32_t gen_int_status;
  32. uint32_t crtc_gen_cntl;
  33. uint32_t crtc_ext_cntl;
  34. uint32_t dac_cntl;
  35. uint32_t gpio_vga_ddc;
  36. uint32_t gpio_dvi_ddc;
  37. uint32_t gpio_monid;
  38. uint32_t config_cntl;
  39. uint32_t crtc_h_total_disp;
  40. uint32_t crtc_h_sync_strt_wid;
  41. uint32_t crtc_v_total_disp;
  42. uint32_t crtc_v_sync_strt_wid;
  43. uint32_t crtc_offset;
  44. uint32_t crtc_offset_cntl;
  45. uint32_t crtc_pitch;
  46. uint32_t cur_offset;
  47. uint32_t cur_hv_pos;
  48. uint32_t cur_hv_offs;
  49. uint32_t cur_color0;
  50. uint32_t cur_color1;
  51. uint32_t dst_offset;
  52. uint32_t dst_pitch;
  53. uint32_t dst_tile;
  54. uint32_t dst_width;
  55. uint32_t dst_height;
  56. uint32_t src_offset;
  57. uint32_t src_pitch;
  58. uint32_t src_tile;
  59. uint32_t src_x;
  60. uint32_t src_y;
  61. uint32_t dst_x;
  62. uint32_t dst_y;
  63. uint32_t dp_gui_master_cntl;
  64. uint32_t dp_brush_bkgd_clr;
  65. uint32_t dp_brush_frgd_clr;
  66. uint32_t dp_src_frgd_clr;
  67. uint32_t dp_src_bkgd_clr;
  68. uint32_t dp_cntl;
  69. uint32_t dp_datatype;
  70. uint32_t dp_mix;
  71. uint32_t dp_write_mask;
  72. uint32_t default_offset;
  73. uint32_t default_pitch;
  74. uint32_t default_tile;
  75. uint32_t default_sc_bottom_right;
  76. } ATIVGARegs;
  77. typedef struct ATIVGAState {
  78. PCIDevice dev;
  79. VGACommonState vga;
  80. char *model;
  81. uint16_t dev_id;
  82. uint8_t mode;
  83. bool cursor_guest_mode;
  84. uint16_t cursor_size;
  85. uint32_t cursor_offset;
  86. QEMUCursor *cursor;
  87. QEMUTimer vblank_timer;
  88. bitbang_i2c_interface bbi2c;
  89. MemoryRegion io;
  90. MemoryRegion mm;
  91. ATIVGARegs regs;
  92. } ATIVGAState;
  93. const char *ati_reg_name(int num);
  94. void ati_2d_blt(ATIVGAState *s);
  95. #endif /* ATI_INT_H */