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debugcon.c 4.5 KB

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  1. /*
  2. * QEMU Bochs-style debug console ("port E9") emulation
  3. *
  4. * Copyright (c) 2003-2004 Fabrice Bellard
  5. * Copyright (c) 2008 Citrix Systems, Inc.
  6. * Copyright (c) Intel Corporation; author: H. Peter Anvin
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include "qemu/osdep.h"
  27. #include "qapi/error.h"
  28. #include "qemu/module.h"
  29. #include "chardev/char-fe.h"
  30. #include "hw/isa/isa.h"
  31. #include "hw/qdev-properties.h"
  32. #define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon"
  33. #define ISA_DEBUGCON_DEVICE(obj) \
  34. OBJECT_CHECK(ISADebugconState, (obj), TYPE_ISA_DEBUGCON_DEVICE)
  35. //#define DEBUG_DEBUGCON
  36. typedef struct DebugconState {
  37. MemoryRegion io;
  38. CharBackend chr;
  39. uint32_t readback;
  40. } DebugconState;
  41. typedef struct ISADebugconState {
  42. ISADevice parent_obj;
  43. uint32_t iobase;
  44. DebugconState state;
  45. } ISADebugconState;
  46. static void debugcon_ioport_write(void *opaque, hwaddr addr, uint64_t val,
  47. unsigned width)
  48. {
  49. DebugconState *s = opaque;
  50. unsigned char ch = val;
  51. #ifdef DEBUG_DEBUGCON
  52. printf(" [debugcon: write addr=0x%04" HWADDR_PRIx " val=0x%02" PRIx64 "]\n", addr, val);
  53. #endif
  54. /* XXX this blocks entire thread. Rewrite to use
  55. * qemu_chr_fe_write and background I/O callbacks */
  56. qemu_chr_fe_write_all(&s->chr, &ch, 1);
  57. }
  58. static uint64_t debugcon_ioport_read(void *opaque, hwaddr addr, unsigned width)
  59. {
  60. DebugconState *s = opaque;
  61. #ifdef DEBUG_DEBUGCON
  62. printf("debugcon: read addr=0x%04" HWADDR_PRIx "\n", addr);
  63. #endif
  64. return s->readback;
  65. }
  66. static const MemoryRegionOps debugcon_ops = {
  67. .read = debugcon_ioport_read,
  68. .write = debugcon_ioport_write,
  69. .valid.min_access_size = 1,
  70. .valid.max_access_size = 1,
  71. .endianness = DEVICE_LITTLE_ENDIAN,
  72. };
  73. static void debugcon_realize_core(DebugconState *s, Error **errp)
  74. {
  75. if (!qemu_chr_fe_backend_connected(&s->chr)) {
  76. error_setg(errp, "Can't create debugcon device, empty char device");
  77. return;
  78. }
  79. qemu_chr_fe_set_handlers(&s->chr, NULL, NULL, NULL, NULL, s, NULL, true);
  80. }
  81. static void debugcon_isa_realizefn(DeviceState *dev, Error **errp)
  82. {
  83. ISADevice *d = ISA_DEVICE(dev);
  84. ISADebugconState *isa = ISA_DEBUGCON_DEVICE(dev);
  85. DebugconState *s = &isa->state;
  86. Error *err = NULL;
  87. debugcon_realize_core(s, &err);
  88. if (err != NULL) {
  89. error_propagate(errp, err);
  90. return;
  91. }
  92. memory_region_init_io(&s->io, OBJECT(dev), &debugcon_ops, s,
  93. TYPE_ISA_DEBUGCON_DEVICE, 1);
  94. memory_region_add_subregion(isa_address_space_io(d),
  95. isa->iobase, &s->io);
  96. }
  97. static Property debugcon_isa_properties[] = {
  98. DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9),
  99. DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr),
  100. DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9),
  101. DEFINE_PROP_END_OF_LIST(),
  102. };
  103. static void debugcon_isa_class_initfn(ObjectClass *klass, void *data)
  104. {
  105. DeviceClass *dc = DEVICE_CLASS(klass);
  106. dc->realize = debugcon_isa_realizefn;
  107. dc->props = debugcon_isa_properties;
  108. set_bit(DEVICE_CATEGORY_MISC, dc->categories);
  109. }
  110. static const TypeInfo debugcon_isa_info = {
  111. .name = TYPE_ISA_DEBUGCON_DEVICE,
  112. .parent = TYPE_ISA_DEVICE,
  113. .instance_size = sizeof(ISADebugconState),
  114. .class_init = debugcon_isa_class_initfn,
  115. };
  116. static void debugcon_register_types(void)
  117. {
  118. type_register_static(&debugcon_isa_info);
  119. }
  120. type_init(debugcon_register_types)