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spitz.c 34 KB

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  1. /*
  2. * PXA270-based Clamshell PDA platforms.
  3. *
  4. * Copyright (c) 2006 Openedhand Ltd.
  5. * Written by Andrzej Zaborowski <balrog@zabor.org>
  6. *
  7. * This code is licensed under the GNU GPL v2.
  8. *
  9. * Contributions after 2012-01-13 are licensed under the terms of the
  10. * GNU GPL, version 2 or (at your option) any later version.
  11. */
  12. #include "qemu/osdep.h"
  13. #include "qapi/error.h"
  14. #include "hw/arm/pxa.h"
  15. #include "hw/arm/boot.h"
  16. #include "sysemu/runstate.h"
  17. #include "sysemu/sysemu.h"
  18. #include "hw/pcmcia.h"
  19. #include "hw/qdev-properties.h"
  20. #include "hw/i2c/i2c.h"
  21. #include "hw/irq.h"
  22. #include "hw/ssi/ssi.h"
  23. #include "hw/block/flash.h"
  24. #include "qemu/timer.h"
  25. #include "hw/arm/sharpsl.h"
  26. #include "ui/console.h"
  27. #include "hw/audio/wm8750.h"
  28. #include "audio/audio.h"
  29. #include "hw/boards.h"
  30. #include "hw/sysbus.h"
  31. #include "migration/vmstate.h"
  32. #include "exec/address-spaces.h"
  33. #include "cpu.h"
  34. #undef REG_FMT
  35. #define REG_FMT "0x%02lx"
  36. /* Spitz Flash */
  37. #define FLASH_BASE 0x0c000000
  38. #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
  39. #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
  40. #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
  41. #define FLASH_ECCCNTR 0x0c /* ECC byte counter */
  42. #define FLASH_ECCCLRR 0x10 /* Clear ECC */
  43. #define FLASH_FLASHIO 0x14 /* Flash I/O */
  44. #define FLASH_FLASHCTL 0x18 /* Flash Control */
  45. #define FLASHCTL_CE0 (1 << 0)
  46. #define FLASHCTL_CLE (1 << 1)
  47. #define FLASHCTL_ALE (1 << 2)
  48. #define FLASHCTL_WP (1 << 3)
  49. #define FLASHCTL_CE1 (1 << 4)
  50. #define FLASHCTL_RYBY (1 << 5)
  51. #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
  52. #define TYPE_SL_NAND "sl-nand"
  53. #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  54. typedef struct {
  55. SysBusDevice parent_obj;
  56. MemoryRegion iomem;
  57. DeviceState *nand;
  58. uint8_t ctl;
  59. uint8_t manf_id;
  60. uint8_t chip_id;
  61. ECCState ecc;
  62. } SLNANDState;
  63. static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  64. {
  65. SLNANDState *s = (SLNANDState *) opaque;
  66. int ryby;
  67. switch (addr) {
  68. #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  69. case FLASH_ECCLPLB:
  70. return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  71. BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  72. #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  73. case FLASH_ECCLPUB:
  74. return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  75. BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  76. case FLASH_ECCCP:
  77. return s->ecc.cp;
  78. case FLASH_ECCCNTR:
  79. return s->ecc.count & 0xff;
  80. case FLASH_FLASHCTL:
  81. nand_getpins(s->nand, &ryby);
  82. if (ryby)
  83. return s->ctl | FLASHCTL_RYBY;
  84. else
  85. return s->ctl;
  86. case FLASH_FLASHIO:
  87. if (size == 4) {
  88. return ecc_digest(&s->ecc, nand_getio(s->nand)) |
  89. (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
  90. }
  91. return ecc_digest(&s->ecc, nand_getio(s->nand));
  92. default:
  93. zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
  94. }
  95. return 0;
  96. }
  97. static void sl_write(void *opaque, hwaddr addr,
  98. uint64_t value, unsigned size)
  99. {
  100. SLNANDState *s = (SLNANDState *) opaque;
  101. switch (addr) {
  102. case FLASH_ECCCLRR:
  103. /* Value is ignored. */
  104. ecc_reset(&s->ecc);
  105. break;
  106. case FLASH_FLASHCTL:
  107. s->ctl = value & 0xff & ~FLASHCTL_RYBY;
  108. nand_setpins(s->nand,
  109. s->ctl & FLASHCTL_CLE,
  110. s->ctl & FLASHCTL_ALE,
  111. s->ctl & FLASHCTL_NCE,
  112. s->ctl & FLASHCTL_WP,
  113. 0);
  114. break;
  115. case FLASH_FLASHIO:
  116. nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
  117. break;
  118. default:
  119. zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
  120. }
  121. }
  122. enum {
  123. FLASH_128M,
  124. FLASH_1024M,
  125. };
  126. static const MemoryRegionOps sl_ops = {
  127. .read = sl_read,
  128. .write = sl_write,
  129. .endianness = DEVICE_NATIVE_ENDIAN,
  130. };
  131. static void sl_flash_register(PXA2xxState *cpu, int size)
  132. {
  133. DeviceState *dev;
  134. dev = qdev_create(NULL, TYPE_SL_NAND);
  135. qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
  136. if (size == FLASH_128M)
  137. qdev_prop_set_uint8(dev, "chip_id", 0x73);
  138. else if (size == FLASH_1024M)
  139. qdev_prop_set_uint8(dev, "chip_id", 0xf1);
  140. qdev_init_nofail(dev);
  141. sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
  142. }
  143. static void sl_nand_init(Object *obj)
  144. {
  145. SLNANDState *s = SL_NAND(obj);
  146. SysBusDevice *dev = SYS_BUS_DEVICE(obj);
  147. s->ctl = 0;
  148. memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
  149. sysbus_init_mmio(dev, &s->iomem);
  150. }
  151. static void sl_nand_realize(DeviceState *dev, Error **errp)
  152. {
  153. SLNANDState *s = SL_NAND(dev);
  154. DriveInfo *nand;
  155. /* FIXME use a qdev drive property instead of drive_get() */
  156. nand = drive_get(IF_MTD, 0, 0);
  157. s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
  158. s->manf_id, s->chip_id);
  159. }
  160. /* Spitz Keyboard */
  161. #define SPITZ_KEY_STROBE_NUM 11
  162. #define SPITZ_KEY_SENSE_NUM 7
  163. static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
  164. 12, 17, 91, 34, 36, 38, 39
  165. };
  166. static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
  167. 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
  168. };
  169. /* Eighth additional row maps the special keys */
  170. static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
  171. { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
  172. { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
  173. { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
  174. { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
  175. { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
  176. { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
  177. { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
  178. { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
  179. };
  180. #define SPITZ_GPIO_AK_INT 13 /* Remote control */
  181. #define SPITZ_GPIO_SYNC 16 /* Sync button */
  182. #define SPITZ_GPIO_ON_KEY 95 /* Power button */
  183. #define SPITZ_GPIO_SWA 97 /* Lid */
  184. #define SPITZ_GPIO_SWB 96 /* Tablet mode */
  185. /* The special buttons are mapped to unused keys */
  186. static const int spitz_gpiomap[5] = {
  187. SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
  188. SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
  189. };
  190. #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
  191. #define SPITZ_KEYBOARD(obj) \
  192. OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
  193. typedef struct {
  194. SysBusDevice parent_obj;
  195. qemu_irq sense[SPITZ_KEY_SENSE_NUM];
  196. qemu_irq gpiomap[5];
  197. int keymap[0x80];
  198. uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
  199. uint16_t strobe_state;
  200. uint16_t sense_state;
  201. uint16_t pre_map[0x100];
  202. uint16_t modifiers;
  203. uint16_t imodifiers;
  204. uint8_t fifo[16];
  205. int fifopos, fifolen;
  206. QEMUTimer *kbdtimer;
  207. } SpitzKeyboardState;
  208. static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
  209. {
  210. int i;
  211. uint16_t strobe, sense = 0;
  212. for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
  213. strobe = s->keyrow[i] & s->strobe_state;
  214. if (strobe) {
  215. sense |= 1 << i;
  216. if (!(s->sense_state & (1 << i)))
  217. qemu_irq_raise(s->sense[i]);
  218. } else if (s->sense_state & (1 << i))
  219. qemu_irq_lower(s->sense[i]);
  220. }
  221. s->sense_state = sense;
  222. }
  223. static void spitz_keyboard_strobe(void *opaque, int line, int level)
  224. {
  225. SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
  226. if (level)
  227. s->strobe_state |= 1 << line;
  228. else
  229. s->strobe_state &= ~(1 << line);
  230. spitz_keyboard_sense_update(s);
  231. }
  232. static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
  233. {
  234. int spitz_keycode = s->keymap[keycode & 0x7f];
  235. if (spitz_keycode == -1)
  236. return;
  237. /* Handle the additional keys */
  238. if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
  239. qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
  240. return;
  241. }
  242. if (keycode & 0x80)
  243. s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
  244. else
  245. s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
  246. spitz_keyboard_sense_update(s);
  247. }
  248. #define SPITZ_MOD_SHIFT (1 << 7)
  249. #define SPITZ_MOD_CTRL (1 << 8)
  250. #define SPITZ_MOD_FN (1 << 9)
  251. #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
  252. static void spitz_keyboard_handler(void *opaque, int keycode)
  253. {
  254. SpitzKeyboardState *s = opaque;
  255. uint16_t code;
  256. int mapcode;
  257. switch (keycode) {
  258. case 0x2a: /* Left Shift */
  259. s->modifiers |= 1;
  260. break;
  261. case 0xaa:
  262. s->modifiers &= ~1;
  263. break;
  264. case 0x36: /* Right Shift */
  265. s->modifiers |= 2;
  266. break;
  267. case 0xb6:
  268. s->modifiers &= ~2;
  269. break;
  270. case 0x1d: /* Control */
  271. s->modifiers |= 4;
  272. break;
  273. case 0x9d:
  274. s->modifiers &= ~4;
  275. break;
  276. case 0x38: /* Alt */
  277. s->modifiers |= 8;
  278. break;
  279. case 0xb8:
  280. s->modifiers &= ~8;
  281. break;
  282. }
  283. code = s->pre_map[mapcode = ((s->modifiers & 3) ?
  284. (keycode | SPITZ_MOD_SHIFT) :
  285. (keycode & ~SPITZ_MOD_SHIFT))];
  286. if (code != mapcode) {
  287. #if 0
  288. if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
  289. QUEUE_KEY(0x2a | (keycode & 0x80));
  290. }
  291. if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
  292. QUEUE_KEY(0x1d | (keycode & 0x80));
  293. }
  294. if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
  295. QUEUE_KEY(0x38 | (keycode & 0x80));
  296. }
  297. if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
  298. QUEUE_KEY(0x2a | (~keycode & 0x80));
  299. }
  300. if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
  301. QUEUE_KEY(0x36 | (~keycode & 0x80));
  302. }
  303. #else
  304. if (keycode & 0x80) {
  305. if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
  306. QUEUE_KEY(0x2a | 0x80);
  307. if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
  308. QUEUE_KEY(0x1d | 0x80);
  309. if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
  310. QUEUE_KEY(0x38 | 0x80);
  311. if ((s->imodifiers & 0x10) && (s->modifiers & 1))
  312. QUEUE_KEY(0x2a);
  313. if ((s->imodifiers & 0x20) && (s->modifiers & 2))
  314. QUEUE_KEY(0x36);
  315. s->imodifiers = 0;
  316. } else {
  317. if ((code & SPITZ_MOD_SHIFT) &&
  318. !((s->modifiers | s->imodifiers) & 1)) {
  319. QUEUE_KEY(0x2a);
  320. s->imodifiers |= 1;
  321. }
  322. if ((code & SPITZ_MOD_CTRL) &&
  323. !((s->modifiers | s->imodifiers) & 4)) {
  324. QUEUE_KEY(0x1d);
  325. s->imodifiers |= 4;
  326. }
  327. if ((code & SPITZ_MOD_FN) &&
  328. !((s->modifiers | s->imodifiers) & 8)) {
  329. QUEUE_KEY(0x38);
  330. s->imodifiers |= 8;
  331. }
  332. if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
  333. !(s->imodifiers & 0x10)) {
  334. QUEUE_KEY(0x2a | 0x80);
  335. s->imodifiers |= 0x10;
  336. }
  337. if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
  338. !(s->imodifiers & 0x20)) {
  339. QUEUE_KEY(0x36 | 0x80);
  340. s->imodifiers |= 0x20;
  341. }
  342. }
  343. #endif
  344. }
  345. QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
  346. }
  347. static void spitz_keyboard_tick(void *opaque)
  348. {
  349. SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
  350. if (s->fifolen) {
  351. spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
  352. s->fifolen --;
  353. if (s->fifopos >= 16)
  354. s->fifopos = 0;
  355. }
  356. timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
  357. NANOSECONDS_PER_SECOND / 32);
  358. }
  359. static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
  360. {
  361. int i;
  362. for (i = 0; i < 0x100; i ++)
  363. s->pre_map[i] = i;
  364. s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
  365. s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
  366. s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
  367. s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
  368. s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
  369. s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
  370. s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */
  371. s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
  372. s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
  373. s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
  374. s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
  375. s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */
  376. s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */
  377. s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */
  378. s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */
  379. s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */
  380. s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */
  381. s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */
  382. s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */
  383. s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */
  384. s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */
  385. s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */
  386. s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */
  387. s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */
  388. s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */
  389. s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */
  390. s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */
  391. s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */
  392. s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */
  393. s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
  394. s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */
  395. s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */
  396. s->modifiers = 0;
  397. s->imodifiers = 0;
  398. s->fifopos = 0;
  399. s->fifolen = 0;
  400. }
  401. #undef SPITZ_MOD_SHIFT
  402. #undef SPITZ_MOD_CTRL
  403. #undef SPITZ_MOD_FN
  404. static int spitz_keyboard_post_load(void *opaque, int version_id)
  405. {
  406. SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
  407. /* Release all pressed keys */
  408. memset(s->keyrow, 0, sizeof(s->keyrow));
  409. spitz_keyboard_sense_update(s);
  410. s->modifiers = 0;
  411. s->imodifiers = 0;
  412. s->fifopos = 0;
  413. s->fifolen = 0;
  414. return 0;
  415. }
  416. static void spitz_keyboard_register(PXA2xxState *cpu)
  417. {
  418. int i;
  419. DeviceState *dev;
  420. SpitzKeyboardState *s;
  421. dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
  422. s = SPITZ_KEYBOARD(dev);
  423. for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
  424. qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
  425. for (i = 0; i < 5; i ++)
  426. s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
  427. if (!graphic_rotate)
  428. s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
  429. for (i = 0; i < 5; i++)
  430. qemu_set_irq(s->gpiomap[i], 0);
  431. for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
  432. qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
  433. qdev_get_gpio_in(dev, i));
  434. timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
  435. qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
  436. }
  437. static void spitz_keyboard_init(Object *obj)
  438. {
  439. DeviceState *dev = DEVICE(obj);
  440. SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
  441. int i, j;
  442. for (i = 0; i < 0x80; i ++)
  443. s->keymap[i] = -1;
  444. for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
  445. for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
  446. if (spitz_keymap[i][j] != -1)
  447. s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
  448. spitz_keyboard_pre_map(s);
  449. s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
  450. qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
  451. qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
  452. }
  453. /* LCD backlight controller */
  454. #define LCDTG_RESCTL 0x00
  455. #define LCDTG_PHACTRL 0x01
  456. #define LCDTG_DUTYCTRL 0x02
  457. #define LCDTG_POWERREG0 0x03
  458. #define LCDTG_POWERREG1 0x04
  459. #define LCDTG_GPOR3 0x05
  460. #define LCDTG_PICTRL 0x06
  461. #define LCDTG_POLCTRL 0x07
  462. typedef struct {
  463. SSISlave ssidev;
  464. uint32_t bl_intensity;
  465. uint32_t bl_power;
  466. } SpitzLCDTG;
  467. static void spitz_bl_update(SpitzLCDTG *s)
  468. {
  469. if (s->bl_power && s->bl_intensity)
  470. zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
  471. else
  472. zaurus_printf("LCD Backlight now off\n");
  473. }
  474. /* FIXME: Implement GPIO properly and remove this hack. */
  475. static SpitzLCDTG *spitz_lcdtg;
  476. static inline void spitz_bl_bit5(void *opaque, int line, int level)
  477. {
  478. SpitzLCDTG *s = spitz_lcdtg;
  479. int prev = s->bl_intensity;
  480. if (level)
  481. s->bl_intensity &= ~0x20;
  482. else
  483. s->bl_intensity |= 0x20;
  484. if (s->bl_power && prev != s->bl_intensity)
  485. spitz_bl_update(s);
  486. }
  487. static inline void spitz_bl_power(void *opaque, int line, int level)
  488. {
  489. SpitzLCDTG *s = spitz_lcdtg;
  490. s->bl_power = !!level;
  491. spitz_bl_update(s);
  492. }
  493. static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
  494. {
  495. SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
  496. int addr;
  497. addr = value >> 5;
  498. value &= 0x1f;
  499. switch (addr) {
  500. case LCDTG_RESCTL:
  501. if (value)
  502. zaurus_printf("LCD in QVGA mode\n");
  503. else
  504. zaurus_printf("LCD in VGA mode\n");
  505. break;
  506. case LCDTG_DUTYCTRL:
  507. s->bl_intensity &= ~0x1f;
  508. s->bl_intensity |= value;
  509. if (s->bl_power)
  510. spitz_bl_update(s);
  511. break;
  512. case LCDTG_POWERREG0:
  513. /* Set common voltage to M62332FP */
  514. break;
  515. }
  516. return 0;
  517. }
  518. static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
  519. {
  520. SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
  521. spitz_lcdtg = s;
  522. s->bl_power = 0;
  523. s->bl_intensity = 0x20;
  524. }
  525. /* SSP devices */
  526. #define CORGI_SSP_PORT 2
  527. #define SPITZ_GPIO_LCDCON_CS 53
  528. #define SPITZ_GPIO_ADS7846_CS 14
  529. #define SPITZ_GPIO_MAX1111_CS 20
  530. #define SPITZ_GPIO_TP_INT 11
  531. static DeviceState *max1111;
  532. /* "Demux" the signal based on current chipselect */
  533. typedef struct {
  534. SSISlave ssidev;
  535. SSIBus *bus[3];
  536. uint32_t enable[3];
  537. } CorgiSSPState;
  538. static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
  539. {
  540. CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
  541. int i;
  542. for (i = 0; i < 3; i++) {
  543. if (s->enable[i]) {
  544. return ssi_transfer(s->bus[i], value);
  545. }
  546. }
  547. return 0;
  548. }
  549. static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
  550. {
  551. CorgiSSPState *s = (CorgiSSPState *)opaque;
  552. assert(line >= 0 && line < 3);
  553. s->enable[line] = !level;
  554. }
  555. #define MAX1111_BATT_VOLT 1
  556. #define MAX1111_BATT_TEMP 2
  557. #define MAX1111_ACIN_VOLT 3
  558. #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
  559. #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
  560. #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
  561. static void spitz_adc_temp_on(void *opaque, int line, int level)
  562. {
  563. if (!max1111)
  564. return;
  565. if (level)
  566. max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
  567. else
  568. max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
  569. }
  570. static void corgi_ssp_realize(SSISlave *d, Error **errp)
  571. {
  572. DeviceState *dev = DEVICE(d);
  573. CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
  574. qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
  575. s->bus[0] = ssi_create_bus(dev, "ssi0");
  576. s->bus[1] = ssi_create_bus(dev, "ssi1");
  577. s->bus[2] = ssi_create_bus(dev, "ssi2");
  578. }
  579. static void spitz_ssp_attach(PXA2xxState *cpu)
  580. {
  581. DeviceState *mux;
  582. DeviceState *dev;
  583. void *bus;
  584. mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
  585. bus = qdev_get_child_bus(mux, "ssi0");
  586. ssi_create_slave(bus, "spitz-lcdtg");
  587. bus = qdev_get_child_bus(mux, "ssi1");
  588. dev = ssi_create_slave(bus, "ads7846");
  589. qdev_connect_gpio_out(dev, 0,
  590. qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
  591. bus = qdev_get_child_bus(mux, "ssi2");
  592. max1111 = ssi_create_slave(bus, "max1111");
  593. max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
  594. max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
  595. max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
  596. qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
  597. qdev_get_gpio_in(mux, 0));
  598. qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
  599. qdev_get_gpio_in(mux, 1));
  600. qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
  601. qdev_get_gpio_in(mux, 2));
  602. }
  603. /* CF Microdrive */
  604. static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
  605. {
  606. PCMCIACardState *md;
  607. DriveInfo *dinfo;
  608. dinfo = drive_get(IF_IDE, 0, 0);
  609. if (!dinfo || dinfo->media_cd)
  610. return;
  611. md = dscm1xxxx_init(dinfo);
  612. pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
  613. }
  614. /* Wm8750 and Max7310 on I2C */
  615. #define AKITA_MAX_ADDR 0x18
  616. #define SPITZ_WM_ADDRL 0x1b
  617. #define SPITZ_WM_ADDRH 0x1a
  618. #define SPITZ_GPIO_WM 5
  619. static void spitz_wm8750_addr(void *opaque, int line, int level)
  620. {
  621. I2CSlave *wm = (I2CSlave *) opaque;
  622. if (level)
  623. i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
  624. else
  625. i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
  626. }
  627. static void spitz_i2c_setup(PXA2xxState *cpu)
  628. {
  629. /* Attach the CPU on one end of our I2C bus. */
  630. I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
  631. DeviceState *wm;
  632. /* Attach a WM8750 to the bus */
  633. wm = i2c_create_slave(bus, TYPE_WM8750, 0);
  634. spitz_wm8750_addr(wm, 0, 0);
  635. qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
  636. qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
  637. /* .. and to the sound interface. */
  638. cpu->i2s->opaque = wm;
  639. cpu->i2s->codec_out = wm8750_dac_dat;
  640. cpu->i2s->codec_in = wm8750_adc_dat;
  641. wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
  642. }
  643. static void spitz_akita_i2c_setup(PXA2xxState *cpu)
  644. {
  645. /* Attach a Max7310 to Akita I2C bus. */
  646. i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
  647. AKITA_MAX_ADDR);
  648. }
  649. /* Other peripherals */
  650. static void spitz_out_switch(void *opaque, int line, int level)
  651. {
  652. switch (line) {
  653. case 0:
  654. zaurus_printf("Charging %s.\n", level ? "off" : "on");
  655. break;
  656. case 1:
  657. zaurus_printf("Discharging %s.\n", level ? "on" : "off");
  658. break;
  659. case 2:
  660. zaurus_printf("Green LED %s.\n", level ? "on" : "off");
  661. break;
  662. case 3:
  663. zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
  664. break;
  665. case 4:
  666. spitz_bl_bit5(opaque, line, level);
  667. break;
  668. case 5:
  669. spitz_bl_power(opaque, line, level);
  670. break;
  671. case 6:
  672. spitz_adc_temp_on(opaque, line, level);
  673. break;
  674. }
  675. }
  676. #define SPITZ_SCP_LED_GREEN 1
  677. #define SPITZ_SCP_JK_B 2
  678. #define SPITZ_SCP_CHRG_ON 3
  679. #define SPITZ_SCP_MUTE_L 4
  680. #define SPITZ_SCP_MUTE_R 5
  681. #define SPITZ_SCP_CF_POWER 6
  682. #define SPITZ_SCP_LED_ORANGE 7
  683. #define SPITZ_SCP_JK_A 8
  684. #define SPITZ_SCP_ADC_TEMP_ON 9
  685. #define SPITZ_SCP2_IR_ON 1
  686. #define SPITZ_SCP2_AKIN_PULLUP 2
  687. #define SPITZ_SCP2_BACKLIGHT_CONT 7
  688. #define SPITZ_SCP2_BACKLIGHT_ON 8
  689. #define SPITZ_SCP2_MIC_BIAS 9
  690. static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
  691. DeviceState *scp0, DeviceState *scp1)
  692. {
  693. qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
  694. qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
  695. qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
  696. qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
  697. qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
  698. if (scp1) {
  699. qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
  700. qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
  701. }
  702. qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
  703. }
  704. #define SPITZ_GPIO_HSYNC 22
  705. #define SPITZ_GPIO_SD_DETECT 9
  706. #define SPITZ_GPIO_SD_WP 81
  707. #define SPITZ_GPIO_ON_RESET 89
  708. #define SPITZ_GPIO_BAT_COVER 90
  709. #define SPITZ_GPIO_CF1_IRQ 105
  710. #define SPITZ_GPIO_CF1_CD 94
  711. #define SPITZ_GPIO_CF2_IRQ 106
  712. #define SPITZ_GPIO_CF2_CD 93
  713. static int spitz_hsync;
  714. static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
  715. {
  716. PXA2xxState *cpu = (PXA2xxState *) opaque;
  717. qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
  718. spitz_hsync ^= 1;
  719. }
  720. static void spitz_reset(void *opaque, int line, int level)
  721. {
  722. if (level) {
  723. qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
  724. }
  725. }
  726. static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
  727. {
  728. qemu_irq lcd_hsync;
  729. qemu_irq reset;
  730. /*
  731. * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
  732. * read to satisfy broken guests that poll-wait for hsync.
  733. * Simulating a real hsync event would be less practical and
  734. * wouldn't guarantee that a guest ever exits the loop.
  735. */
  736. spitz_hsync = 0;
  737. lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
  738. pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
  739. pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
  740. /* MMC/SD host */
  741. pxa2xx_mmci_handlers(cpu->mmc,
  742. qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
  743. qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
  744. /* Battery lock always closed */
  745. qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
  746. /* Handle reset */
  747. reset = qemu_allocate_irq(spitz_reset, cpu, 0);
  748. qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
  749. /* PCMCIA signals: card's IRQ and Card-Detect */
  750. if (slots >= 1)
  751. pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
  752. qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
  753. qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
  754. if (slots >= 2)
  755. pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
  756. qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
  757. qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
  758. }
  759. /* Board init. */
  760. enum spitz_model_e { spitz, akita, borzoi, terrier };
  761. #define SPITZ_RAM 0x04000000
  762. #define SPITZ_ROM 0x00800000
  763. static struct arm_boot_info spitz_binfo = {
  764. .loader_start = PXA2XX_SDRAM_BASE,
  765. .ram_size = 0x04000000,
  766. };
  767. static void spitz_common_init(MachineState *machine,
  768. enum spitz_model_e model, int arm_id)
  769. {
  770. PXA2xxState *mpu;
  771. DeviceState *scp0, *scp1 = NULL;
  772. MemoryRegion *address_space_mem = get_system_memory();
  773. MemoryRegion *rom = g_new(MemoryRegion, 1);
  774. /* Setup CPU & memory */
  775. mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
  776. machine->cpu_type);
  777. sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
  778. memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
  779. memory_region_set_readonly(rom, true);
  780. memory_region_add_subregion(address_space_mem, 0, rom);
  781. /* Setup peripherals */
  782. spitz_keyboard_register(mpu);
  783. spitz_ssp_attach(mpu);
  784. scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
  785. if (model != akita) {
  786. scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
  787. }
  788. spitz_scoop_gpio_setup(mpu, scp0, scp1);
  789. spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
  790. spitz_i2c_setup(mpu);
  791. if (model == akita)
  792. spitz_akita_i2c_setup(mpu);
  793. if (model == terrier)
  794. /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
  795. spitz_microdrive_attach(mpu, 1);
  796. else if (model != akita)
  797. /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
  798. spitz_microdrive_attach(mpu, 0);
  799. spitz_binfo.board_id = arm_id;
  800. arm_load_kernel(mpu->cpu, machine, &spitz_binfo);
  801. sl_bootparam_write(SL_PXA_PARAM_BASE);
  802. }
  803. static void spitz_init(MachineState *machine)
  804. {
  805. spitz_common_init(machine, spitz, 0x2c9);
  806. }
  807. static void borzoi_init(MachineState *machine)
  808. {
  809. spitz_common_init(machine, borzoi, 0x33f);
  810. }
  811. static void akita_init(MachineState *machine)
  812. {
  813. spitz_common_init(machine, akita, 0x2e8);
  814. }
  815. static void terrier_init(MachineState *machine)
  816. {
  817. spitz_common_init(machine, terrier, 0x33f);
  818. }
  819. static void akitapda_class_init(ObjectClass *oc, void *data)
  820. {
  821. MachineClass *mc = MACHINE_CLASS(oc);
  822. mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
  823. mc->init = akita_init;
  824. mc->ignore_memory_transaction_failures = true;
  825. mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
  826. }
  827. static const TypeInfo akitapda_type = {
  828. .name = MACHINE_TYPE_NAME("akita"),
  829. .parent = TYPE_MACHINE,
  830. .class_init = akitapda_class_init,
  831. };
  832. static void spitzpda_class_init(ObjectClass *oc, void *data)
  833. {
  834. MachineClass *mc = MACHINE_CLASS(oc);
  835. mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
  836. mc->init = spitz_init;
  837. mc->block_default_type = IF_IDE;
  838. mc->ignore_memory_transaction_failures = true;
  839. mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
  840. }
  841. static const TypeInfo spitzpda_type = {
  842. .name = MACHINE_TYPE_NAME("spitz"),
  843. .parent = TYPE_MACHINE,
  844. .class_init = spitzpda_class_init,
  845. };
  846. static void borzoipda_class_init(ObjectClass *oc, void *data)
  847. {
  848. MachineClass *mc = MACHINE_CLASS(oc);
  849. mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
  850. mc->init = borzoi_init;
  851. mc->block_default_type = IF_IDE;
  852. mc->ignore_memory_transaction_failures = true;
  853. mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
  854. }
  855. static const TypeInfo borzoipda_type = {
  856. .name = MACHINE_TYPE_NAME("borzoi"),
  857. .parent = TYPE_MACHINE,
  858. .class_init = borzoipda_class_init,
  859. };
  860. static void terrierpda_class_init(ObjectClass *oc, void *data)
  861. {
  862. MachineClass *mc = MACHINE_CLASS(oc);
  863. mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
  864. mc->init = terrier_init;
  865. mc->block_default_type = IF_IDE;
  866. mc->ignore_memory_transaction_failures = true;
  867. mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
  868. }
  869. static const TypeInfo terrierpda_type = {
  870. .name = MACHINE_TYPE_NAME("terrier"),
  871. .parent = TYPE_MACHINE,
  872. .class_init = terrierpda_class_init,
  873. };
  874. static void spitz_machine_init(void)
  875. {
  876. type_register_static(&akitapda_type);
  877. type_register_static(&spitzpda_type);
  878. type_register_static(&borzoipda_type);
  879. type_register_static(&terrierpda_type);
  880. }
  881. type_init(spitz_machine_init)
  882. static bool is_version_0(void *opaque, int version_id)
  883. {
  884. return version_id == 0;
  885. }
  886. static VMStateDescription vmstate_sl_nand_info = {
  887. .name = "sl-nand",
  888. .version_id = 0,
  889. .minimum_version_id = 0,
  890. .fields = (VMStateField[]) {
  891. VMSTATE_UINT8(ctl, SLNANDState),
  892. VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
  893. VMSTATE_END_OF_LIST(),
  894. },
  895. };
  896. static Property sl_nand_properties[] = {
  897. DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
  898. DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
  899. DEFINE_PROP_END_OF_LIST(),
  900. };
  901. static void sl_nand_class_init(ObjectClass *klass, void *data)
  902. {
  903. DeviceClass *dc = DEVICE_CLASS(klass);
  904. dc->vmsd = &vmstate_sl_nand_info;
  905. dc->props = sl_nand_properties;
  906. dc->realize = sl_nand_realize;
  907. /* Reason: init() method uses drive_get() */
  908. dc->user_creatable = false;
  909. }
  910. static const TypeInfo sl_nand_info = {
  911. .name = TYPE_SL_NAND,
  912. .parent = TYPE_SYS_BUS_DEVICE,
  913. .instance_size = sizeof(SLNANDState),
  914. .instance_init = sl_nand_init,
  915. .class_init = sl_nand_class_init,
  916. };
  917. static VMStateDescription vmstate_spitz_kbd = {
  918. .name = "spitz-keyboard",
  919. .version_id = 1,
  920. .minimum_version_id = 0,
  921. .post_load = spitz_keyboard_post_load,
  922. .fields = (VMStateField[]) {
  923. VMSTATE_UINT16(sense_state, SpitzKeyboardState),
  924. VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
  925. VMSTATE_UNUSED_TEST(is_version_0, 5),
  926. VMSTATE_END_OF_LIST(),
  927. },
  928. };
  929. static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
  930. {
  931. DeviceClass *dc = DEVICE_CLASS(klass);
  932. dc->vmsd = &vmstate_spitz_kbd;
  933. }
  934. static const TypeInfo spitz_keyboard_info = {
  935. .name = TYPE_SPITZ_KEYBOARD,
  936. .parent = TYPE_SYS_BUS_DEVICE,
  937. .instance_size = sizeof(SpitzKeyboardState),
  938. .instance_init = spitz_keyboard_init,
  939. .class_init = spitz_keyboard_class_init,
  940. };
  941. static const VMStateDescription vmstate_corgi_ssp_regs = {
  942. .name = "corgi-ssp",
  943. .version_id = 2,
  944. .minimum_version_id = 2,
  945. .fields = (VMStateField[]) {
  946. VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
  947. VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
  948. VMSTATE_END_OF_LIST(),
  949. }
  950. };
  951. static void corgi_ssp_class_init(ObjectClass *klass, void *data)
  952. {
  953. DeviceClass *dc = DEVICE_CLASS(klass);
  954. SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
  955. k->realize = corgi_ssp_realize;
  956. k->transfer = corgi_ssp_transfer;
  957. dc->vmsd = &vmstate_corgi_ssp_regs;
  958. }
  959. static const TypeInfo corgi_ssp_info = {
  960. .name = "corgi-ssp",
  961. .parent = TYPE_SSI_SLAVE,
  962. .instance_size = sizeof(CorgiSSPState),
  963. .class_init = corgi_ssp_class_init,
  964. };
  965. static const VMStateDescription vmstate_spitz_lcdtg_regs = {
  966. .name = "spitz-lcdtg",
  967. .version_id = 1,
  968. .minimum_version_id = 1,
  969. .fields = (VMStateField[]) {
  970. VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
  971. VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
  972. VMSTATE_UINT32(bl_power, SpitzLCDTG),
  973. VMSTATE_END_OF_LIST(),
  974. }
  975. };
  976. static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
  977. {
  978. DeviceClass *dc = DEVICE_CLASS(klass);
  979. SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
  980. k->realize = spitz_lcdtg_realize;
  981. k->transfer = spitz_lcdtg_transfer;
  982. dc->vmsd = &vmstate_spitz_lcdtg_regs;
  983. }
  984. static const TypeInfo spitz_lcdtg_info = {
  985. .name = "spitz-lcdtg",
  986. .parent = TYPE_SSI_SLAVE,
  987. .instance_size = sizeof(SpitzLCDTG),
  988. .class_init = spitz_lcdtg_class_init,
  989. };
  990. static void spitz_register_types(void)
  991. {
  992. type_register_static(&corgi_ssp_info);
  993. type_register_static(&spitz_lcdtg_info);
  994. type_register_static(&spitz_keyboard_info);
  995. type_register_static(&sl_nand_info);
  996. }
  997. type_init(spitz_register_types)