memory.rst 16 KB

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  1. ==============
  2. The memory API
  3. ==============
  4. The memory API models the memory and I/O buses and controllers of a QEMU
  5. machine. It attempts to allow modelling of:
  6. - ordinary RAM
  7. - memory-mapped I/O (MMIO)
  8. - memory controllers that can dynamically reroute physical memory regions
  9. to different destinations
  10. The memory model provides support for
  11. - tracking RAM changes by the guest
  12. - setting up coalesced memory for kvm
  13. - setting up ioeventfd regions for kvm
  14. Memory is modelled as an acyclic graph of MemoryRegion objects. Sinks
  15. (leaves) are RAM and MMIO regions, while other nodes represent
  16. buses, memory controllers, and memory regions that have been rerouted.
  17. In addition to MemoryRegion objects, the memory API provides AddressSpace
  18. objects for every root and possibly for intermediate MemoryRegions too.
  19. These represent memory as seen from the CPU or a device's viewpoint.
  20. Types of regions
  21. ----------------
  22. There are multiple types of memory regions (all represented by a single C type
  23. MemoryRegion):
  24. - RAM: a RAM region is simply a range of host memory that can be made available
  25. to the guest.
  26. You typically initialize these with memory_region_init_ram(). Some special
  27. purposes require the variants memory_region_init_resizeable_ram(),
  28. memory_region_init_ram_from_file(), or memory_region_init_ram_ptr().
  29. - MMIO: a range of guest memory that is implemented by host callbacks;
  30. each read or write causes a callback to be called on the host.
  31. You initialize these with memory_region_init_io(), passing it a
  32. MemoryRegionOps structure describing the callbacks.
  33. - ROM: a ROM memory region works like RAM for reads (directly accessing
  34. a region of host memory), and forbids writes. You initialize these with
  35. memory_region_init_rom().
  36. - ROM device: a ROM device memory region works like RAM for reads
  37. (directly accessing a region of host memory), but like MMIO for
  38. writes (invoking a callback). You initialize these with
  39. memory_region_init_rom_device().
  40. - IOMMU region: an IOMMU region translates addresses of accesses made to it
  41. and forwards them to some other target memory region. As the name suggests,
  42. these are only needed for modelling an IOMMU, not for simple devices.
  43. You initialize these with memory_region_init_iommu().
  44. - container: a container simply includes other memory regions, each at
  45. a different offset. Containers are useful for grouping several regions
  46. into one unit. For example, a PCI BAR may be composed of a RAM region
  47. and an MMIO region.
  48. A container's subregions are usually non-overlapping. In some cases it is
  49. useful to have overlapping regions; for example a memory controller that
  50. can overlay a subregion of RAM with MMIO or ROM, or a PCI controller
  51. that does not prevent card from claiming overlapping BARs.
  52. You initialize a pure container with memory_region_init().
  53. - alias: a subsection of another region. Aliases allow a region to be
  54. split apart into discontiguous regions. Examples of uses are memory banks
  55. used when the guest address space is smaller than the amount of RAM
  56. addressed, or a memory controller that splits main memory to expose a "PCI
  57. hole". Aliases may point to any type of region, including other aliases,
  58. but an alias may not point back to itself, directly or indirectly.
  59. You initialize these with memory_region_init_alias().
  60. - reservation region: a reservation region is primarily for debugging.
  61. It claims I/O space that is not supposed to be handled by QEMU itself.
  62. The typical use is to track parts of the address space which will be
  63. handled by the host kernel when KVM is enabled. You initialize these
  64. by passing a NULL callback parameter to memory_region_init_io().
  65. It is valid to add subregions to a region which is not a pure container
  66. (that is, to an MMIO, RAM or ROM region). This means that the region
  67. will act like a container, except that any addresses within the container's
  68. region which are not claimed by any subregion are handled by the
  69. container itself (ie by its MMIO callbacks or RAM backing). However
  70. it is generally possible to achieve the same effect with a pure container
  71. one of whose subregions is a low priority "background" region covering
  72. the whole address range; this is often clearer and is preferred.
  73. Subregions cannot be added to an alias region.
  74. Migration
  75. ---------
  76. Where the memory region is backed by host memory (RAM, ROM and
  77. ROM device memory region types), this host memory needs to be
  78. copied to the destination on migration. These APIs which allocate
  79. the host memory for you will also register the memory so it is
  80. migrated:
  81. - memory_region_init_ram()
  82. - memory_region_init_rom()
  83. - memory_region_init_rom_device()
  84. For most devices and boards this is the correct thing. If you
  85. have a special case where you need to manage the migration of
  86. the backing memory yourself, you can call the functions:
  87. - memory_region_init_ram_nomigrate()
  88. - memory_region_init_rom_nomigrate()
  89. - memory_region_init_rom_device_nomigrate()
  90. which only initialize the MemoryRegion and leave handling
  91. migration to the caller.
  92. The functions:
  93. - memory_region_init_resizeable_ram()
  94. - memory_region_init_ram_from_file()
  95. - memory_region_init_ram_from_fd()
  96. - memory_region_init_ram_ptr()
  97. - memory_region_init_ram_device_ptr()
  98. are for special cases only, and so they do not automatically
  99. register the backing memory for migration; the caller must
  100. manage migration if necessary.
  101. Region names
  102. ------------
  103. Regions are assigned names by the constructor. For most regions these are
  104. only used for debugging purposes, but RAM regions also use the name to identify
  105. live migration sections. This means that RAM region names need to have ABI
  106. stability.
  107. Region lifecycle
  108. ----------------
  109. A region is created by one of the memory_region_init*() functions and
  110. attached to an object, which acts as its owner or parent. QEMU ensures
  111. that the owner object remains alive as long as the region is visible to
  112. the guest, or as long as the region is in use by a virtual CPU or another
  113. device. For example, the owner object will not die between an
  114. address_space_map operation and the corresponding address_space_unmap.
  115. After creation, a region can be added to an address space or a
  116. container with memory_region_add_subregion(), and removed using
  117. memory_region_del_subregion().
  118. Various region attributes (read-only, dirty logging, coalesced mmio,
  119. ioeventfd) can be changed during the region lifecycle. They take effect
  120. as soon as the region is made visible. This can be immediately, later,
  121. or never.
  122. Destruction of a memory region happens automatically when the owner
  123. object dies.
  124. If however the memory region is part of a dynamically allocated data
  125. structure, you should call object_unparent() to destroy the memory region
  126. before the data structure is freed. For an example see VFIOMSIXInfo
  127. and VFIOQuirk in hw/vfio/pci.c.
  128. You must not destroy a memory region as long as it may be in use by a
  129. device or CPU. In order to do this, as a general rule do not create or
  130. destroy memory regions dynamically during a device's lifetime, and only
  131. call object_unparent() in the memory region owner's instance_finalize
  132. callback. The dynamically allocated data structure that contains the
  133. memory region then should obviously be freed in the instance_finalize
  134. callback as well.
  135. If you break this rule, the following situation can happen:
  136. - the memory region's owner had a reference taken via memory_region_ref
  137. (for example by address_space_map)
  138. - the region is unparented, and has no owner anymore
  139. - when address_space_unmap is called, the reference to the memory region's
  140. owner is leaked.
  141. There is an exception to the above rule: it is okay to call
  142. object_unparent at any time for an alias or a container region. It is
  143. therefore also okay to create or destroy alias and container regions
  144. dynamically during a device's lifetime.
  145. This exceptional usage is valid because aliases and containers only help
  146. QEMU building the guest's memory map; they are never accessed directly.
  147. memory_region_ref and memory_region_unref are never called on aliases
  148. or containers, and the above situation then cannot happen. Exploiting
  149. this exception is rarely necessary, and therefore it is discouraged,
  150. but nevertheless it is used in a few places.
  151. For regions that "have no owner" (NULL is passed at creation time), the
  152. machine object is actually used as the owner. Since instance_finalize is
  153. never called for the machine object, you must never call object_unparent
  154. on regions that have no owner, unless they are aliases or containers.
  155. Overlapping regions and priority
  156. --------------------------------
  157. Usually, regions may not overlap each other; a memory address decodes into
  158. exactly one target. In some cases it is useful to allow regions to overlap,
  159. and sometimes to control which of an overlapping regions is visible to the
  160. guest. This is done with memory_region_add_subregion_overlap(), which
  161. allows the region to overlap any other region in the same container, and
  162. specifies a priority that allows the core to decide which of two regions at
  163. the same address are visible (highest wins).
  164. Priority values are signed, and the default value is zero. This means that
  165. you can use memory_region_add_subregion_overlap() both to specify a region
  166. that must sit 'above' any others (with a positive priority) and also a
  167. background region that sits 'below' others (with a negative priority).
  168. If the higher priority region in an overlap is a container or alias, then
  169. the lower priority region will appear in any "holes" that the higher priority
  170. region has left by not mapping subregions to that area of its address range.
  171. (This applies recursively -- if the subregions are themselves containers or
  172. aliases that leave holes then the lower priority region will appear in these
  173. holes too.)
  174. For example, suppose we have a container A of size 0x8000 with two subregions
  175. B and C. B is a container mapped at 0x2000, size 0x4000, priority 2; C is
  176. an MMIO region mapped at 0x0, size 0x6000, priority 1. B currently has two
  177. of its own subregions: D of size 0x1000 at offset 0 and E of size 0x1000 at
  178. offset 0x2000. As a diagram::
  179. 0 1000 2000 3000 4000 5000 6000 7000 8000
  180. |------|------|------|------|------|------|------|------|
  181. A: [ ]
  182. C: [CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC]
  183. B: [ ]
  184. D: [DDDDD]
  185. E: [EEEEE]
  186. The regions that will be seen within this address range then are::
  187. [CCCCCCCCCCCC][DDDDD][CCCCC][EEEEE][CCCCC]
  188. Since B has higher priority than C, its subregions appear in the flat map
  189. even where they overlap with C. In ranges where B has not mapped anything
  190. C's region appears.
  191. If B had provided its own MMIO operations (ie it was not a pure container)
  192. then these would be used for any addresses in its range not handled by
  193. D or E, and the result would be::
  194. [CCCCCCCCCCCC][DDDDD][BBBBB][EEEEE][BBBBB]
  195. Priority values are local to a container, because the priorities of two
  196. regions are only compared when they are both children of the same container.
  197. This means that the device in charge of the container (typically modelling
  198. a bus or a memory controller) can use them to manage the interaction of
  199. its child regions without any side effects on other parts of the system.
  200. In the example above, the priorities of D and E are unimportant because
  201. they do not overlap each other. It is the relative priority of B and C
  202. that causes D and E to appear on top of C: D and E's priorities are never
  203. compared against the priority of C.
  204. Visibility
  205. ----------
  206. The memory core uses the following rules to select a memory region when the
  207. guest accesses an address:
  208. - all direct subregions of the root region are matched against the address, in
  209. descending priority order
  210. - if the address lies outside the region offset/size, the subregion is
  211. discarded
  212. - if the subregion is a leaf (RAM or MMIO), the search terminates, returning
  213. this leaf region
  214. - if the subregion is a container, the same algorithm is used within the
  215. subregion (after the address is adjusted by the subregion offset)
  216. - if the subregion is an alias, the search is continued at the alias target
  217. (after the address is adjusted by the subregion offset and alias offset)
  218. - if a recursive search within a container or alias subregion does not
  219. find a match (because of a "hole" in the container's coverage of its
  220. address range), then if this is a container with its own MMIO or RAM
  221. backing the search terminates, returning the container itself. Otherwise
  222. we continue with the next subregion in priority order
  223. - if none of the subregions match the address then the search terminates
  224. with no match found
  225. Example memory map
  226. ------------------
  227. ::
  228. system_memory: container@0-2^48-1
  229. |
  230. +---- lomem: alias@0-0xdfffffff ---> #ram (0-0xdfffffff)
  231. |
  232. +---- himem: alias@0x100000000-0x11fffffff ---> #ram (0xe0000000-0xffffffff)
  233. |
  234. +---- vga-window: alias@0xa0000-0xbffff ---> #pci (0xa0000-0xbffff)
  235. | (prio 1)
  236. |
  237. +---- pci-hole: alias@0xe0000000-0xffffffff ---> #pci (0xe0000000-0xffffffff)
  238. pci (0-2^32-1)
  239. |
  240. +--- vga-area: container@0xa0000-0xbffff
  241. | |
  242. | +--- alias@0x00000-0x7fff ---> #vram (0x010000-0x017fff)
  243. | |
  244. | +--- alias@0x08000-0xffff ---> #vram (0x020000-0x027fff)
  245. |
  246. +---- vram: ram@0xe1000000-0xe1ffffff
  247. |
  248. +---- vga-mmio: mmio@0xe2000000-0xe200ffff
  249. ram: ram@0x00000000-0xffffffff
  250. This is a (simplified) PC memory map. The 4GB RAM block is mapped into the
  251. system address space via two aliases: "lomem" is a 1:1 mapping of the first
  252. 3.5GB; "himem" maps the last 0.5GB at address 4GB. This leaves 0.5GB for the
  253. so-called PCI hole, that allows a 32-bit PCI bus to exist in a system with
  254. 4GB of memory.
  255. The memory controller diverts addresses in the range 640K-768K to the PCI
  256. address space. This is modelled using the "vga-window" alias, mapped at a
  257. higher priority so it obscures the RAM at the same addresses. The vga window
  258. can be removed by programming the memory controller; this is modelled by
  259. removing the alias and exposing the RAM underneath.
  260. The pci address space is not a direct child of the system address space, since
  261. we only want parts of it to be visible (we accomplish this using aliases).
  262. It has two subregions: vga-area models the legacy vga window and is occupied
  263. by two 32K memory banks pointing at two sections of the framebuffer.
  264. In addition the vram is mapped as a BAR at address e1000000, and an additional
  265. BAR containing MMIO registers is mapped after it.
  266. Note that if the guest maps a BAR outside the PCI hole, it would not be
  267. visible as the pci-hole alias clips it to a 0.5GB range.
  268. MMIO Operations
  269. ---------------
  270. MMIO regions are provided with ->read() and ->write() callbacks,
  271. which are sufficient for most devices. Some devices change behaviour
  272. based on the attributes used for the memory transaction, or need
  273. to be able to respond that the access should provoke a bus error
  274. rather than completing successfully; those devices can use the
  275. ->read_with_attrs() and ->write_with_attrs() callbacks instead.
  276. In addition various constraints can be supplied to control how these
  277. callbacks are called:
  278. - .valid.min_access_size, .valid.max_access_size define the access sizes
  279. (in bytes) which the device accepts; accesses outside this range will
  280. have device and bus specific behaviour (ignored, or machine check)
  281. - .valid.unaligned specifies that the *device being modelled* supports
  282. unaligned accesses; if false, unaligned accesses will invoke the
  283. appropriate bus or CPU specific behaviour.
  284. - .impl.min_access_size, .impl.max_access_size define the access sizes
  285. (in bytes) supported by the *implementation*; other access sizes will be
  286. emulated using the ones available. For example a 4-byte write will be
  287. emulated using four 1-byte writes, if .impl.max_access_size = 1.
  288. - .impl.unaligned specifies that the *implementation* supports unaligned
  289. accesses; if false, unaligned accesses will be emulated by two aligned
  290. accesses.