bcm2835_gpio.c 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344
  1. /*
  2. * Raspberry Pi (BCM2835) GPIO Controller
  3. *
  4. * Copyright (c) 2017 Antfield SAS
  5. *
  6. * Authors:
  7. * Clement Deschamps <clement.deschamps@antfield.fr>
  8. * Luc Michel <luc.michel@antfield.fr>
  9. *
  10. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  11. * See the COPYING file in the top-level directory.
  12. */
  13. #include "qemu/osdep.h"
  14. #include "qemu/log.h"
  15. #include "qemu/module.h"
  16. #include "qemu/timer.h"
  17. #include "qapi/error.h"
  18. #include "hw/sysbus.h"
  19. #include "migration/vmstate.h"
  20. #include "hw/sd/sd.h"
  21. #include "hw/gpio/bcm2835_gpio.h"
  22. #include "hw/irq.h"
  23. #define GPFSEL0 0x00
  24. #define GPFSEL1 0x04
  25. #define GPFSEL2 0x08
  26. #define GPFSEL3 0x0C
  27. #define GPFSEL4 0x10
  28. #define GPFSEL5 0x14
  29. #define GPSET0 0x1C
  30. #define GPSET1 0x20
  31. #define GPCLR0 0x28
  32. #define GPCLR1 0x2C
  33. #define GPLEV0 0x34
  34. #define GPLEV1 0x38
  35. #define GPEDS0 0x40
  36. #define GPEDS1 0x44
  37. #define GPREN0 0x4C
  38. #define GPREN1 0x50
  39. #define GPFEN0 0x58
  40. #define GPFEN1 0x5C
  41. #define GPHEN0 0x64
  42. #define GPHEN1 0x68
  43. #define GPLEN0 0x70
  44. #define GPLEN1 0x74
  45. #define GPAREN0 0x7C
  46. #define GPAREN1 0x80
  47. #define GPAFEN0 0x88
  48. #define GPAFEN1 0x8C
  49. #define GPPUD 0x94
  50. #define GPPUDCLK0 0x98
  51. #define GPPUDCLK1 0x9C
  52. static uint32_t gpfsel_get(BCM2835GpioState *s, uint8_t reg)
  53. {
  54. int i;
  55. uint32_t value = 0;
  56. for (i = 0; i < 10; i++) {
  57. uint32_t index = 10 * reg + i;
  58. if (index < sizeof(s->fsel)) {
  59. value |= (s->fsel[index] & 0x7) << (3 * i);
  60. }
  61. }
  62. return value;
  63. }
  64. static void gpfsel_set(BCM2835GpioState *s, uint8_t reg, uint32_t value)
  65. {
  66. int i;
  67. for (i = 0; i < 10; i++) {
  68. uint32_t index = 10 * reg + i;
  69. if (index < sizeof(s->fsel)) {
  70. int fsel = (value >> (3 * i)) & 0x7;
  71. s->fsel[index] = fsel;
  72. }
  73. }
  74. /* SD controller selection (48-53) */
  75. if (s->sd_fsel != 0
  76. && (s->fsel[48] == 0) /* SD_CLK_R */
  77. && (s->fsel[49] == 0) /* SD_CMD_R */
  78. && (s->fsel[50] == 0) /* SD_DATA0_R */
  79. && (s->fsel[51] == 0) /* SD_DATA1_R */
  80. && (s->fsel[52] == 0) /* SD_DATA2_R */
  81. && (s->fsel[53] == 0) /* SD_DATA3_R */
  82. ) {
  83. /* SDHCI controller selected */
  84. sdbus_reparent_card(s->sdbus_sdhost, s->sdbus_sdhci);
  85. s->sd_fsel = 0;
  86. } else if (s->sd_fsel != 4
  87. && (s->fsel[48] == 4) /* SD_CLK_R */
  88. && (s->fsel[49] == 4) /* SD_CMD_R */
  89. && (s->fsel[50] == 4) /* SD_DATA0_R */
  90. && (s->fsel[51] == 4) /* SD_DATA1_R */
  91. && (s->fsel[52] == 4) /* SD_DATA2_R */
  92. && (s->fsel[53] == 4) /* SD_DATA3_R */
  93. ) {
  94. /* SDHost controller selected */
  95. sdbus_reparent_card(s->sdbus_sdhci, s->sdbus_sdhost);
  96. s->sd_fsel = 4;
  97. }
  98. }
  99. static int gpfsel_is_out(BCM2835GpioState *s, int index)
  100. {
  101. if (index >= 0 && index < 54) {
  102. return s->fsel[index] == 1;
  103. }
  104. return 0;
  105. }
  106. static void gpset(BCM2835GpioState *s,
  107. uint32_t val, uint8_t start, uint8_t count, uint32_t *lev)
  108. {
  109. uint32_t changes = val & ~*lev;
  110. uint32_t cur = 1;
  111. int i;
  112. for (i = 0; i < count; i++) {
  113. if ((changes & cur) && (gpfsel_is_out(s, start + i))) {
  114. qemu_set_irq(s->out[start + i], 1);
  115. }
  116. cur <<= 1;
  117. }
  118. *lev |= val;
  119. }
  120. static void gpclr(BCM2835GpioState *s,
  121. uint32_t val, uint8_t start, uint8_t count, uint32_t *lev)
  122. {
  123. uint32_t changes = val & *lev;
  124. uint32_t cur = 1;
  125. int i;
  126. for (i = 0; i < count; i++) {
  127. if ((changes & cur) && (gpfsel_is_out(s, start + i))) {
  128. qemu_set_irq(s->out[start + i], 0);
  129. }
  130. cur <<= 1;
  131. }
  132. *lev &= ~val;
  133. }
  134. static uint64_t bcm2835_gpio_read(void *opaque, hwaddr offset,
  135. unsigned size)
  136. {
  137. BCM2835GpioState *s = (BCM2835GpioState *)opaque;
  138. switch (offset) {
  139. case GPFSEL0:
  140. case GPFSEL1:
  141. case GPFSEL2:
  142. case GPFSEL3:
  143. case GPFSEL4:
  144. case GPFSEL5:
  145. return gpfsel_get(s, offset / 4);
  146. case GPSET0:
  147. case GPSET1:
  148. /* Write Only */
  149. return 0;
  150. case GPCLR0:
  151. case GPCLR1:
  152. /* Write Only */
  153. return 0;
  154. case GPLEV0:
  155. return s->lev0;
  156. case GPLEV1:
  157. return s->lev1;
  158. case GPEDS0:
  159. case GPEDS1:
  160. case GPREN0:
  161. case GPREN1:
  162. case GPFEN0:
  163. case GPFEN1:
  164. case GPHEN0:
  165. case GPHEN1:
  166. case GPLEN0:
  167. case GPLEN1:
  168. case GPAREN0:
  169. case GPAREN1:
  170. case GPAFEN0:
  171. case GPAFEN1:
  172. case GPPUD:
  173. case GPPUDCLK0:
  174. case GPPUDCLK1:
  175. /* Not implemented */
  176. return 0;
  177. default:
  178. qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
  179. __func__, offset);
  180. break;
  181. }
  182. return 0;
  183. }
  184. static void bcm2835_gpio_write(void *opaque, hwaddr offset,
  185. uint64_t value, unsigned size)
  186. {
  187. BCM2835GpioState *s = (BCM2835GpioState *)opaque;
  188. switch (offset) {
  189. case GPFSEL0:
  190. case GPFSEL1:
  191. case GPFSEL2:
  192. case GPFSEL3:
  193. case GPFSEL4:
  194. case GPFSEL5:
  195. gpfsel_set(s, offset / 4, value);
  196. break;
  197. case GPSET0:
  198. gpset(s, value, 0, 32, &s->lev0);
  199. break;
  200. case GPSET1:
  201. gpset(s, value, 32, 22, &s->lev1);
  202. break;
  203. case GPCLR0:
  204. gpclr(s, value, 0, 32, &s->lev0);
  205. break;
  206. case GPCLR1:
  207. gpclr(s, value, 32, 22, &s->lev1);
  208. break;
  209. case GPLEV0:
  210. case GPLEV1:
  211. /* Read Only */
  212. break;
  213. case GPEDS0:
  214. case GPEDS1:
  215. case GPREN0:
  216. case GPREN1:
  217. case GPFEN0:
  218. case GPFEN1:
  219. case GPHEN0:
  220. case GPHEN1:
  221. case GPLEN0:
  222. case GPLEN1:
  223. case GPAREN0:
  224. case GPAREN1:
  225. case GPAFEN0:
  226. case GPAFEN1:
  227. case GPPUD:
  228. case GPPUDCLK0:
  229. case GPPUDCLK1:
  230. /* Not implemented */
  231. break;
  232. default:
  233. goto err_out;
  234. }
  235. return;
  236. err_out:
  237. qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
  238. __func__, offset);
  239. }
  240. static void bcm2835_gpio_reset(DeviceState *dev)
  241. {
  242. BCM2835GpioState *s = BCM2835_GPIO(dev);
  243. int i;
  244. for (i = 0; i < 6; i++) {
  245. gpfsel_set(s, i, 0);
  246. }
  247. s->sd_fsel = 0;
  248. /* SDHCI is selected by default */
  249. sdbus_reparent_card(&s->sdbus, s->sdbus_sdhci);
  250. s->lev0 = 0;
  251. s->lev1 = 0;
  252. }
  253. static const MemoryRegionOps bcm2835_gpio_ops = {
  254. .read = bcm2835_gpio_read,
  255. .write = bcm2835_gpio_write,
  256. .endianness = DEVICE_NATIVE_ENDIAN,
  257. };
  258. static const VMStateDescription vmstate_bcm2835_gpio = {
  259. .name = "bcm2835_gpio",
  260. .version_id = 1,
  261. .minimum_version_id = 1,
  262. .fields = (const VMStateField[]) {
  263. VMSTATE_UINT8_ARRAY(fsel, BCM2835GpioState, 54),
  264. VMSTATE_UINT32(lev0, BCM2835GpioState),
  265. VMSTATE_UINT32(lev1, BCM2835GpioState),
  266. VMSTATE_UINT8(sd_fsel, BCM2835GpioState),
  267. VMSTATE_END_OF_LIST()
  268. }
  269. };
  270. static void bcm2835_gpio_init(Object *obj)
  271. {
  272. BCM2835GpioState *s = BCM2835_GPIO(obj);
  273. DeviceState *dev = DEVICE(obj);
  274. SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
  275. qbus_init(&s->sdbus, sizeof(s->sdbus), TYPE_SD_BUS, DEVICE(s), "sd-bus");
  276. memory_region_init_io(&s->iomem, obj,
  277. &bcm2835_gpio_ops, s, "bcm2835_gpio", 0x1000);
  278. sysbus_init_mmio(sbd, &s->iomem);
  279. qdev_init_gpio_out(dev, s->out, 54);
  280. }
  281. static void bcm2835_gpio_realize(DeviceState *dev, Error **errp)
  282. {
  283. BCM2835GpioState *s = BCM2835_GPIO(dev);
  284. Object *obj;
  285. obj = object_property_get_link(OBJECT(dev), "sdbus-sdhci", &error_abort);
  286. s->sdbus_sdhci = SD_BUS(obj);
  287. obj = object_property_get_link(OBJECT(dev), "sdbus-sdhost", &error_abort);
  288. s->sdbus_sdhost = SD_BUS(obj);
  289. }
  290. static void bcm2835_gpio_class_init(ObjectClass *klass, void *data)
  291. {
  292. DeviceClass *dc = DEVICE_CLASS(klass);
  293. dc->vmsd = &vmstate_bcm2835_gpio;
  294. dc->realize = &bcm2835_gpio_realize;
  295. device_class_set_legacy_reset(dc, bcm2835_gpio_reset);
  296. }
  297. static const TypeInfo bcm2835_gpio_info = {
  298. .name = TYPE_BCM2835_GPIO,
  299. .parent = TYPE_SYS_BUS_DEVICE,
  300. .instance_size = sizeof(BCM2835GpioState),
  301. .instance_init = bcm2835_gpio_init,
  302. .class_init = bcm2835_gpio_class_init,
  303. };
  304. static void bcm2835_gpio_register_types(void)
  305. {
  306. type_register_static(&bcm2835_gpio_info);
  307. }
  308. type_init(bcm2835_gpio_register_types)