css.c 63 KB

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  1. /*
  2. * Channel subsystem base support.
  3. *
  4. * Copyright 2012 IBM Corp.
  5. * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
  6. *
  7. * This work is licensed under the terms of the GNU GPL, version 2 or (at
  8. * your option) any later version. See the COPYING file in the top-level
  9. * directory.
  10. */
  11. #include "qemu/osdep.h"
  12. #include "qapi/error.h"
  13. #include "qapi/visitor.h"
  14. #include "hw/qdev.h"
  15. #include "qemu/error-report.h"
  16. #include "qemu/bitops.h"
  17. #include "exec/address-spaces.h"
  18. #include "cpu.h"
  19. #include "hw/s390x/ioinst.h"
  20. #include "hw/s390x/css.h"
  21. #include "trace.h"
  22. #include "hw/s390x/s390_flic.h"
  23. typedef struct CrwContainer {
  24. CRW crw;
  25. QTAILQ_ENTRY(CrwContainer) sibling;
  26. } CrwContainer;
  27. typedef struct ChpInfo {
  28. uint8_t in_use;
  29. uint8_t type;
  30. uint8_t is_virtual;
  31. } ChpInfo;
  32. typedef struct SubchSet {
  33. SubchDev *sch[MAX_SCHID + 1];
  34. unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
  35. unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
  36. } SubchSet;
  37. typedef struct CssImage {
  38. SubchSet *sch_set[MAX_SSID + 1];
  39. ChpInfo chpids[MAX_CHPID + 1];
  40. } CssImage;
  41. typedef struct IoAdapter {
  42. uint32_t id;
  43. uint8_t type;
  44. uint8_t isc;
  45. } IoAdapter;
  46. typedef struct ChannelSubSys {
  47. QTAILQ_HEAD(, CrwContainer) pending_crws;
  48. bool sei_pending;
  49. bool do_crw_mchk;
  50. bool crws_lost;
  51. uint8_t max_cssid;
  52. uint8_t max_ssid;
  53. bool chnmon_active;
  54. uint64_t chnmon_area;
  55. CssImage *css[MAX_CSSID + 1];
  56. uint8_t default_cssid;
  57. IoAdapter *io_adapters[CSS_IO_ADAPTER_TYPE_NUMS][MAX_ISC + 1];
  58. QTAILQ_HEAD(, IndAddr) indicator_addresses;
  59. } ChannelSubSys;
  60. static ChannelSubSys channel_subsys = {
  61. .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws),
  62. .do_crw_mchk = true,
  63. .sei_pending = false,
  64. .do_crw_mchk = true,
  65. .crws_lost = false,
  66. .chnmon_active = false,
  67. .indicator_addresses =
  68. QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
  69. };
  70. IndAddr *get_indicator(hwaddr ind_addr, int len)
  71. {
  72. IndAddr *indicator;
  73. QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) {
  74. if (indicator->addr == ind_addr) {
  75. indicator->refcnt++;
  76. return indicator;
  77. }
  78. }
  79. indicator = g_new0(IndAddr, 1);
  80. indicator->addr = ind_addr;
  81. indicator->len = len;
  82. indicator->refcnt = 1;
  83. QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses,
  84. indicator, sibling);
  85. return indicator;
  86. }
  87. static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr,
  88. bool do_map)
  89. {
  90. S390FLICState *fs = s390_get_flic();
  91. S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
  92. return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map);
  93. }
  94. void release_indicator(AdapterInfo *adapter, IndAddr *indicator)
  95. {
  96. assert(indicator->refcnt > 0);
  97. indicator->refcnt--;
  98. if (indicator->refcnt > 0) {
  99. return;
  100. }
  101. QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling);
  102. if (indicator->map) {
  103. s390_io_adapter_map(adapter, indicator->map, false);
  104. }
  105. g_free(indicator);
  106. }
  107. int map_indicator(AdapterInfo *adapter, IndAddr *indicator)
  108. {
  109. int ret;
  110. if (indicator->map) {
  111. return 0; /* already mapped is not an error */
  112. }
  113. indicator->map = indicator->addr;
  114. ret = s390_io_adapter_map(adapter, indicator->map, true);
  115. if ((ret != 0) && (ret != -ENOSYS)) {
  116. goto out_err;
  117. }
  118. return 0;
  119. out_err:
  120. indicator->map = 0;
  121. return ret;
  122. }
  123. int css_create_css_image(uint8_t cssid, bool default_image)
  124. {
  125. trace_css_new_image(cssid, default_image ? "(default)" : "");
  126. /* 255 is reserved */
  127. if (cssid == 255) {
  128. return -EINVAL;
  129. }
  130. if (channel_subsys.css[cssid]) {
  131. return -EBUSY;
  132. }
  133. channel_subsys.css[cssid] = g_malloc0(sizeof(CssImage));
  134. if (default_image) {
  135. channel_subsys.default_cssid = cssid;
  136. }
  137. return 0;
  138. }
  139. uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc)
  140. {
  141. if (type >= CSS_IO_ADAPTER_TYPE_NUMS || isc > MAX_ISC ||
  142. !channel_subsys.io_adapters[type][isc]) {
  143. return -1;
  144. }
  145. return channel_subsys.io_adapters[type][isc]->id;
  146. }
  147. /**
  148. * css_register_io_adapters: Register I/O adapters per ISC during init
  149. *
  150. * @swap: an indication if byte swap is needed.
  151. * @maskable: an indication if the adapter is subject to the mask operation.
  152. * @errp: location to store error information.
  153. */
  154. void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
  155. Error **errp)
  156. {
  157. uint32_t id;
  158. int ret, isc;
  159. IoAdapter *adapter;
  160. S390FLICState *fs = s390_get_flic();
  161. S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
  162. /*
  163. * Disallow multiple registrations for the same device type.
  164. * Report an error if registering for an already registered type.
  165. */
  166. if (channel_subsys.io_adapters[type][0]) {
  167. error_setg(errp, "Adapters for type %d already registered", type);
  168. }
  169. for (isc = 0; isc <= MAX_ISC; isc++) {
  170. id = (type << 3) | isc;
  171. ret = fsc->register_io_adapter(fs, id, isc, swap, maskable);
  172. if (ret == 0) {
  173. adapter = g_new0(IoAdapter, 1);
  174. adapter->id = id;
  175. adapter->isc = isc;
  176. adapter->type = type;
  177. channel_subsys.io_adapters[type][isc] = adapter;
  178. } else {
  179. error_setg_errno(errp, -ret, "Unexpected error %d when "
  180. "registering adapter %d", ret, id);
  181. break;
  182. }
  183. }
  184. /*
  185. * No need to free registered adapters in kvm: kvm will clean up
  186. * when the machine goes away.
  187. */
  188. if (ret) {
  189. for (isc--; isc >= 0; isc--) {
  190. g_free(channel_subsys.io_adapters[type][isc]);
  191. channel_subsys.io_adapters[type][isc] = NULL;
  192. }
  193. }
  194. }
  195. static void css_clear_io_interrupt(uint16_t subchannel_id,
  196. uint16_t subchannel_nr)
  197. {
  198. Error *err = NULL;
  199. static bool no_clear_irq;
  200. S390FLICState *fs = s390_get_flic();
  201. S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
  202. int r;
  203. if (unlikely(no_clear_irq)) {
  204. return;
  205. }
  206. r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr);
  207. switch (r) {
  208. case 0:
  209. break;
  210. case -ENOSYS:
  211. no_clear_irq = true;
  212. /*
  213. * Ignore unavailability, as the user can't do anything
  214. * about it anyway.
  215. */
  216. break;
  217. default:
  218. error_setg_errno(&err, -r, "unexpected error condition");
  219. error_propagate(&error_abort, err);
  220. }
  221. }
  222. static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid)
  223. {
  224. if (channel_subsys.max_cssid > 0) {
  225. return (cssid << 8) | (1 << 3) | (ssid << 1) | 1;
  226. }
  227. return (ssid << 1) | 1;
  228. }
  229. uint16_t css_build_subchannel_id(SubchDev *sch)
  230. {
  231. return css_do_build_subchannel_id(sch->cssid, sch->ssid);
  232. }
  233. void css_inject_io_interrupt(SubchDev *sch)
  234. {
  235. uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
  236. trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
  237. sch->curr_status.pmcw.intparm, isc, "");
  238. s390_io_interrupt(css_build_subchannel_id(sch),
  239. sch->schid,
  240. sch->curr_status.pmcw.intparm,
  241. isc << 27);
  242. }
  243. void css_conditional_io_interrupt(SubchDev *sch)
  244. {
  245. /*
  246. * If the subchannel is not currently status pending, make it pending
  247. * with alert status.
  248. */
  249. if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
  250. uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
  251. trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
  252. sch->curr_status.pmcw.intparm, isc,
  253. "(unsolicited)");
  254. sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
  255. sch->curr_status.scsw.ctrl |=
  256. SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
  257. /* Inject an I/O interrupt. */
  258. s390_io_interrupt(css_build_subchannel_id(sch),
  259. sch->schid,
  260. sch->curr_status.pmcw.intparm,
  261. isc << 27);
  262. }
  263. }
  264. void css_adapter_interrupt(uint8_t isc)
  265. {
  266. uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
  267. trace_css_adapter_interrupt(isc);
  268. s390_io_interrupt(0, 0, 0, io_int_word);
  269. }
  270. static void sch_handle_clear_func(SubchDev *sch)
  271. {
  272. PMCW *p = &sch->curr_status.pmcw;
  273. SCSW *s = &sch->curr_status.scsw;
  274. int path;
  275. /* Path management: In our simple css, we always choose the only path. */
  276. path = 0x80;
  277. /* Reset values prior to 'issuing the clear signal'. */
  278. p->lpum = 0;
  279. p->pom = 0xff;
  280. s->flags &= ~SCSW_FLAGS_MASK_PNO;
  281. /* We always 'attempt to issue the clear signal', and we always succeed. */
  282. sch->channel_prog = 0x0;
  283. sch->last_cmd_valid = false;
  284. s->ctrl &= ~SCSW_ACTL_CLEAR_PEND;
  285. s->ctrl |= SCSW_STCTL_STATUS_PEND;
  286. s->dstat = 0;
  287. s->cstat = 0;
  288. p->lpum = path;
  289. }
  290. static void sch_handle_halt_func(SubchDev *sch)
  291. {
  292. PMCW *p = &sch->curr_status.pmcw;
  293. SCSW *s = &sch->curr_status.scsw;
  294. hwaddr curr_ccw = sch->channel_prog;
  295. int path;
  296. /* Path management: In our simple css, we always choose the only path. */
  297. path = 0x80;
  298. /* We always 'attempt to issue the halt signal', and we always succeed. */
  299. sch->channel_prog = 0x0;
  300. sch->last_cmd_valid = false;
  301. s->ctrl &= ~SCSW_ACTL_HALT_PEND;
  302. s->ctrl |= SCSW_STCTL_STATUS_PEND;
  303. if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
  304. !((s->ctrl & SCSW_ACTL_START_PEND) ||
  305. (s->ctrl & SCSW_ACTL_SUSP))) {
  306. s->dstat = SCSW_DSTAT_DEVICE_END;
  307. }
  308. if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
  309. (s->ctrl & SCSW_ACTL_SUSP)) {
  310. s->cpa = curr_ccw + 8;
  311. }
  312. s->cstat = 0;
  313. p->lpum = path;
  314. }
  315. static void copy_sense_id_to_guest(SenseId *dest, SenseId *src)
  316. {
  317. int i;
  318. dest->reserved = src->reserved;
  319. dest->cu_type = cpu_to_be16(src->cu_type);
  320. dest->cu_model = src->cu_model;
  321. dest->dev_type = cpu_to_be16(src->dev_type);
  322. dest->dev_model = src->dev_model;
  323. dest->unused = src->unused;
  324. for (i = 0; i < ARRAY_SIZE(dest->ciw); i++) {
  325. dest->ciw[i].type = src->ciw[i].type;
  326. dest->ciw[i].command = src->ciw[i].command;
  327. dest->ciw[i].count = cpu_to_be16(src->ciw[i].count);
  328. }
  329. }
  330. static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
  331. {
  332. CCW0 tmp0;
  333. CCW1 tmp1;
  334. CCW1 ret;
  335. if (fmt1) {
  336. cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
  337. ret.cmd_code = tmp1.cmd_code;
  338. ret.flags = tmp1.flags;
  339. ret.count = be16_to_cpu(tmp1.count);
  340. ret.cda = be32_to_cpu(tmp1.cda);
  341. } else {
  342. cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
  343. if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) {
  344. ret.cmd_code = CCW_CMD_TIC;
  345. ret.flags = 0;
  346. ret.count = 0;
  347. } else {
  348. ret.cmd_code = tmp0.cmd_code;
  349. ret.flags = tmp0.flags;
  350. ret.count = be16_to_cpu(tmp0.count);
  351. }
  352. ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
  353. }
  354. return ret;
  355. }
  356. static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
  357. bool suspend_allowed)
  358. {
  359. int ret;
  360. bool check_len;
  361. int len;
  362. CCW1 ccw;
  363. if (!ccw_addr) {
  364. return -EIO;
  365. }
  366. /* Translate everything to format-1 ccws - the information is the same. */
  367. ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
  368. /* Check for invalid command codes. */
  369. if ((ccw.cmd_code & 0x0f) == 0) {
  370. return -EINVAL;
  371. }
  372. if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
  373. ((ccw.cmd_code & 0xf0) != 0)) {
  374. return -EINVAL;
  375. }
  376. if (!sch->ccw_fmt_1 && (ccw.count == 0) &&
  377. (ccw.cmd_code != CCW_CMD_TIC)) {
  378. return -EINVAL;
  379. }
  380. if (ccw.flags & CCW_FLAG_SUSPEND) {
  381. return suspend_allowed ? -EINPROGRESS : -EINVAL;
  382. }
  383. check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
  384. if (!ccw.cda) {
  385. if (sch->ccw_no_data_cnt == 255) {
  386. return -EINVAL;
  387. }
  388. sch->ccw_no_data_cnt++;
  389. }
  390. /* Look at the command. */
  391. switch (ccw.cmd_code) {
  392. case CCW_CMD_NOOP:
  393. /* Nothing to do. */
  394. ret = 0;
  395. break;
  396. case CCW_CMD_BASIC_SENSE:
  397. if (check_len) {
  398. if (ccw.count != sizeof(sch->sense_data)) {
  399. ret = -EINVAL;
  400. break;
  401. }
  402. }
  403. len = MIN(ccw.count, sizeof(sch->sense_data));
  404. cpu_physical_memory_write(ccw.cda, sch->sense_data, len);
  405. sch->curr_status.scsw.count = ccw.count - len;
  406. memset(sch->sense_data, 0, sizeof(sch->sense_data));
  407. ret = 0;
  408. break;
  409. case CCW_CMD_SENSE_ID:
  410. {
  411. SenseId sense_id;
  412. copy_sense_id_to_guest(&sense_id, &sch->id);
  413. /* Sense ID information is device specific. */
  414. if (check_len) {
  415. if (ccw.count != sizeof(sense_id)) {
  416. ret = -EINVAL;
  417. break;
  418. }
  419. }
  420. len = MIN(ccw.count, sizeof(sense_id));
  421. /*
  422. * Only indicate 0xff in the first sense byte if we actually
  423. * have enough place to store at least bytes 0-3.
  424. */
  425. if (len >= 4) {
  426. sense_id.reserved = 0xff;
  427. } else {
  428. sense_id.reserved = 0;
  429. }
  430. cpu_physical_memory_write(ccw.cda, &sense_id, len);
  431. sch->curr_status.scsw.count = ccw.count - len;
  432. ret = 0;
  433. break;
  434. }
  435. case CCW_CMD_TIC:
  436. if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
  437. ret = -EINVAL;
  438. break;
  439. }
  440. if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) {
  441. ret = -EINVAL;
  442. break;
  443. }
  444. sch->channel_prog = ccw.cda;
  445. ret = -EAGAIN;
  446. break;
  447. default:
  448. if (sch->ccw_cb) {
  449. /* Handle device specific commands. */
  450. ret = sch->ccw_cb(sch, ccw);
  451. } else {
  452. ret = -ENOSYS;
  453. }
  454. break;
  455. }
  456. sch->last_cmd = ccw;
  457. sch->last_cmd_valid = true;
  458. if (ret == 0) {
  459. if (ccw.flags & CCW_FLAG_CC) {
  460. sch->channel_prog += 8;
  461. ret = -EAGAIN;
  462. }
  463. }
  464. return ret;
  465. }
  466. static void sch_handle_start_func_virtual(SubchDev *sch, ORB *orb)
  467. {
  468. PMCW *p = &sch->curr_status.pmcw;
  469. SCSW *s = &sch->curr_status.scsw;
  470. int path;
  471. int ret;
  472. bool suspend_allowed;
  473. /* Path management: In our simple css, we always choose the only path. */
  474. path = 0x80;
  475. if (!(s->ctrl & SCSW_ACTL_SUSP)) {
  476. /* Start Function triggered via ssch, i.e. we have an ORB */
  477. s->cstat = 0;
  478. s->dstat = 0;
  479. /* Look at the orb and try to execute the channel program. */
  480. assert(orb != NULL); /* resume does not pass an orb */
  481. p->intparm = orb->intparm;
  482. if (!(orb->lpm & path)) {
  483. /* Generate a deferred cc 3 condition. */
  484. s->flags |= SCSW_FLAGS_MASK_CC;
  485. s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
  486. s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
  487. return;
  488. }
  489. sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
  490. s->flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0;
  491. sch->ccw_no_data_cnt = 0;
  492. suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND);
  493. } else {
  494. /* Start Function resumed via rsch, i.e. we don't have an
  495. * ORB */
  496. s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
  497. /* The channel program had been suspended before. */
  498. suspend_allowed = true;
  499. }
  500. sch->last_cmd_valid = false;
  501. do {
  502. ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed);
  503. switch (ret) {
  504. case -EAGAIN:
  505. /* ccw chain, continue processing */
  506. break;
  507. case 0:
  508. /* success */
  509. s->ctrl &= ~SCSW_ACTL_START_PEND;
  510. s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
  511. s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
  512. SCSW_STCTL_STATUS_PEND;
  513. s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
  514. s->cpa = sch->channel_prog + 8;
  515. break;
  516. case -EIO:
  517. /* I/O errors, status depends on specific devices */
  518. break;
  519. case -ENOSYS:
  520. /* unsupported command, generate unit check (command reject) */
  521. s->ctrl &= ~SCSW_ACTL_START_PEND;
  522. s->dstat = SCSW_DSTAT_UNIT_CHECK;
  523. /* Set sense bit 0 in ecw0. */
  524. sch->sense_data[0] = 0x80;
  525. s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
  526. s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
  527. SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
  528. s->cpa = sch->channel_prog + 8;
  529. break;
  530. case -EFAULT:
  531. /* memory problem, generate channel data check */
  532. s->ctrl &= ~SCSW_ACTL_START_PEND;
  533. s->cstat = SCSW_CSTAT_DATA_CHECK;
  534. s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
  535. s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
  536. SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
  537. s->cpa = sch->channel_prog + 8;
  538. break;
  539. case -EBUSY:
  540. /* subchannel busy, generate deferred cc 1 */
  541. s->flags &= ~SCSW_FLAGS_MASK_CC;
  542. s->flags |= (1 << 8);
  543. s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
  544. s->ctrl |= SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
  545. break;
  546. case -EINPROGRESS:
  547. /* channel program has been suspended */
  548. s->ctrl &= ~SCSW_ACTL_START_PEND;
  549. s->ctrl |= SCSW_ACTL_SUSP;
  550. break;
  551. default:
  552. /* error, generate channel program check */
  553. s->ctrl &= ~SCSW_ACTL_START_PEND;
  554. s->cstat = SCSW_CSTAT_PROG_CHECK;
  555. s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
  556. s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
  557. SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
  558. s->cpa = sch->channel_prog + 8;
  559. break;
  560. }
  561. } while (ret == -EAGAIN);
  562. }
  563. static int sch_handle_start_func_passthrough(SubchDev *sch, ORB *orb)
  564. {
  565. PMCW *p = &sch->curr_status.pmcw;
  566. SCSW *s = &sch->curr_status.scsw;
  567. int ret;
  568. if (!(s->ctrl & SCSW_ACTL_SUSP)) {
  569. assert(orb != NULL);
  570. p->intparm = orb->intparm;
  571. }
  572. /*
  573. * Only support prefetch enable mode.
  574. * Only support 64bit addressing idal.
  575. */
  576. if (!(orb->ctrl0 & ORB_CTRL0_MASK_PFCH) ||
  577. !(orb->ctrl0 & ORB_CTRL0_MASK_C64)) {
  578. return -EINVAL;
  579. }
  580. ret = s390_ccw_cmd_request(orb, s, sch->driver_data);
  581. switch (ret) {
  582. /* Currently we don't update control block and just return the cc code. */
  583. case 0:
  584. break;
  585. case -EBUSY:
  586. break;
  587. case -ENODEV:
  588. break;
  589. case -EACCES:
  590. /* Let's reflect an inaccessible host device by cc 3. */
  591. ret = -ENODEV;
  592. break;
  593. default:
  594. /*
  595. * All other return codes will trigger a program check,
  596. * or set cc to 1.
  597. */
  598. break;
  599. };
  600. return ret;
  601. }
  602. /*
  603. * On real machines, this would run asynchronously to the main vcpus.
  604. * We might want to make some parts of the ssch handling (interpreting
  605. * read/writes) asynchronous later on if we start supporting more than
  606. * our current very simple devices.
  607. */
  608. int do_subchannel_work_virtual(SubchDev *sch, ORB *orb)
  609. {
  610. SCSW *s = &sch->curr_status.scsw;
  611. if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
  612. sch_handle_clear_func(sch);
  613. } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
  614. sch_handle_halt_func(sch);
  615. } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
  616. /* Triggered by both ssch and rsch. */
  617. sch_handle_start_func_virtual(sch, orb);
  618. } else {
  619. /* Cannot happen. */
  620. return 0;
  621. }
  622. css_inject_io_interrupt(sch);
  623. return 0;
  624. }
  625. int do_subchannel_work_passthrough(SubchDev *sch, ORB *orb)
  626. {
  627. int ret;
  628. SCSW *s = &sch->curr_status.scsw;
  629. if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
  630. /* TODO: Clear handling */
  631. sch_handle_clear_func(sch);
  632. ret = 0;
  633. } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
  634. /* TODO: Halt handling */
  635. sch_handle_halt_func(sch);
  636. ret = 0;
  637. } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
  638. ret = sch_handle_start_func_passthrough(sch, orb);
  639. } else {
  640. /* Cannot happen. */
  641. return -ENODEV;
  642. }
  643. return ret;
  644. }
  645. static int do_subchannel_work(SubchDev *sch, ORB *orb)
  646. {
  647. if (sch->do_subchannel_work) {
  648. return sch->do_subchannel_work(sch, orb);
  649. } else {
  650. return -EINVAL;
  651. }
  652. }
  653. static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
  654. {
  655. int i;
  656. dest->intparm = cpu_to_be32(src->intparm);
  657. dest->flags = cpu_to_be16(src->flags);
  658. dest->devno = cpu_to_be16(src->devno);
  659. dest->lpm = src->lpm;
  660. dest->pnom = src->pnom;
  661. dest->lpum = src->lpum;
  662. dest->pim = src->pim;
  663. dest->mbi = cpu_to_be16(src->mbi);
  664. dest->pom = src->pom;
  665. dest->pam = src->pam;
  666. for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
  667. dest->chpid[i] = src->chpid[i];
  668. }
  669. dest->chars = cpu_to_be32(src->chars);
  670. }
  671. void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
  672. {
  673. dest->flags = cpu_to_be16(src->flags);
  674. dest->ctrl = cpu_to_be16(src->ctrl);
  675. dest->cpa = cpu_to_be32(src->cpa);
  676. dest->dstat = src->dstat;
  677. dest->cstat = src->cstat;
  678. dest->count = cpu_to_be16(src->count);
  679. }
  680. static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
  681. {
  682. int i;
  683. copy_pmcw_to_guest(&dest->pmcw, &src->pmcw);
  684. copy_scsw_to_guest(&dest->scsw, &src->scsw);
  685. dest->mba = cpu_to_be64(src->mba);
  686. for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
  687. dest->mda[i] = src->mda[i];
  688. }
  689. }
  690. int css_do_stsch(SubchDev *sch, SCHIB *schib)
  691. {
  692. /* Use current status. */
  693. copy_schib_to_guest(schib, &sch->curr_status);
  694. return 0;
  695. }
  696. static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
  697. {
  698. int i;
  699. dest->intparm = be32_to_cpu(src->intparm);
  700. dest->flags = be16_to_cpu(src->flags);
  701. dest->devno = be16_to_cpu(src->devno);
  702. dest->lpm = src->lpm;
  703. dest->pnom = src->pnom;
  704. dest->lpum = src->lpum;
  705. dest->pim = src->pim;
  706. dest->mbi = be16_to_cpu(src->mbi);
  707. dest->pom = src->pom;
  708. dest->pam = src->pam;
  709. for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
  710. dest->chpid[i] = src->chpid[i];
  711. }
  712. dest->chars = be32_to_cpu(src->chars);
  713. }
  714. static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
  715. {
  716. dest->flags = be16_to_cpu(src->flags);
  717. dest->ctrl = be16_to_cpu(src->ctrl);
  718. dest->cpa = be32_to_cpu(src->cpa);
  719. dest->dstat = src->dstat;
  720. dest->cstat = src->cstat;
  721. dest->count = be16_to_cpu(src->count);
  722. }
  723. static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
  724. {
  725. int i;
  726. copy_pmcw_from_guest(&dest->pmcw, &src->pmcw);
  727. copy_scsw_from_guest(&dest->scsw, &src->scsw);
  728. dest->mba = be64_to_cpu(src->mba);
  729. for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
  730. dest->mda[i] = src->mda[i];
  731. }
  732. }
  733. int css_do_msch(SubchDev *sch, const SCHIB *orig_schib)
  734. {
  735. SCSW *s = &sch->curr_status.scsw;
  736. PMCW *p = &sch->curr_status.pmcw;
  737. uint16_t oldflags;
  738. int ret;
  739. SCHIB schib;
  740. if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
  741. ret = 0;
  742. goto out;
  743. }
  744. if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
  745. ret = -EINPROGRESS;
  746. goto out;
  747. }
  748. if (s->ctrl &
  749. (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
  750. ret = -EBUSY;
  751. goto out;
  752. }
  753. copy_schib_from_guest(&schib, orig_schib);
  754. /* Only update the program-modifiable fields. */
  755. p->intparm = schib.pmcw.intparm;
  756. oldflags = p->flags;
  757. p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
  758. PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
  759. PMCW_FLAGS_MASK_MP);
  760. p->flags |= schib.pmcw.flags &
  761. (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
  762. PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
  763. PMCW_FLAGS_MASK_MP);
  764. p->lpm = schib.pmcw.lpm;
  765. p->mbi = schib.pmcw.mbi;
  766. p->pom = schib.pmcw.pom;
  767. p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
  768. p->chars |= schib.pmcw.chars &
  769. (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
  770. sch->curr_status.mba = schib.mba;
  771. /* Has the channel been disabled? */
  772. if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0
  773. && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) {
  774. sch->disable_cb(sch);
  775. }
  776. ret = 0;
  777. out:
  778. return ret;
  779. }
  780. int css_do_xsch(SubchDev *sch)
  781. {
  782. SCSW *s = &sch->curr_status.scsw;
  783. PMCW *p = &sch->curr_status.pmcw;
  784. int ret;
  785. if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
  786. ret = -ENODEV;
  787. goto out;
  788. }
  789. if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) ||
  790. ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
  791. (!(s->ctrl &
  792. (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
  793. (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
  794. ret = -EINPROGRESS;
  795. goto out;
  796. }
  797. if (s->ctrl & SCSW_CTRL_MASK_STCTL) {
  798. ret = -EBUSY;
  799. goto out;
  800. }
  801. /* Cancel the current operation. */
  802. s->ctrl &= ~(SCSW_FCTL_START_FUNC |
  803. SCSW_ACTL_RESUME_PEND |
  804. SCSW_ACTL_START_PEND |
  805. SCSW_ACTL_SUSP);
  806. sch->channel_prog = 0x0;
  807. sch->last_cmd_valid = false;
  808. s->dstat = 0;
  809. s->cstat = 0;
  810. ret = 0;
  811. out:
  812. return ret;
  813. }
  814. int css_do_csch(SubchDev *sch)
  815. {
  816. SCSW *s = &sch->curr_status.scsw;
  817. PMCW *p = &sch->curr_status.pmcw;
  818. int ret;
  819. if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
  820. ret = -ENODEV;
  821. goto out;
  822. }
  823. /* Trigger the clear function. */
  824. s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
  825. s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND;
  826. do_subchannel_work(sch, NULL);
  827. ret = 0;
  828. out:
  829. return ret;
  830. }
  831. int css_do_hsch(SubchDev *sch)
  832. {
  833. SCSW *s = &sch->curr_status.scsw;
  834. PMCW *p = &sch->curr_status.pmcw;
  835. int ret;
  836. if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
  837. ret = -ENODEV;
  838. goto out;
  839. }
  840. if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
  841. (s->ctrl & (SCSW_STCTL_PRIMARY |
  842. SCSW_STCTL_SECONDARY |
  843. SCSW_STCTL_ALERT))) {
  844. ret = -EINPROGRESS;
  845. goto out;
  846. }
  847. if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
  848. ret = -EBUSY;
  849. goto out;
  850. }
  851. /* Trigger the halt function. */
  852. s->ctrl |= SCSW_FCTL_HALT_FUNC;
  853. s->ctrl &= ~SCSW_FCTL_START_FUNC;
  854. if (((s->ctrl & SCSW_CTRL_MASK_ACTL) ==
  855. (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
  856. ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) {
  857. s->ctrl &= ~SCSW_STCTL_STATUS_PEND;
  858. }
  859. s->ctrl |= SCSW_ACTL_HALT_PEND;
  860. do_subchannel_work(sch, NULL);
  861. ret = 0;
  862. out:
  863. return ret;
  864. }
  865. static void css_update_chnmon(SubchDev *sch)
  866. {
  867. if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
  868. /* Not active. */
  869. return;
  870. }
  871. /* The counter is conveniently located at the beginning of the struct. */
  872. if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
  873. /* Format 1, per-subchannel area. */
  874. uint32_t count;
  875. count = address_space_ldl(&address_space_memory,
  876. sch->curr_status.mba,
  877. MEMTXATTRS_UNSPECIFIED,
  878. NULL);
  879. count++;
  880. address_space_stl(&address_space_memory, sch->curr_status.mba, count,
  881. MEMTXATTRS_UNSPECIFIED, NULL);
  882. } else {
  883. /* Format 0, global area. */
  884. uint32_t offset;
  885. uint16_t count;
  886. offset = sch->curr_status.pmcw.mbi << 5;
  887. count = address_space_lduw(&address_space_memory,
  888. channel_subsys.chnmon_area + offset,
  889. MEMTXATTRS_UNSPECIFIED,
  890. NULL);
  891. count++;
  892. address_space_stw(&address_space_memory,
  893. channel_subsys.chnmon_area + offset, count,
  894. MEMTXATTRS_UNSPECIFIED, NULL);
  895. }
  896. }
  897. int css_do_ssch(SubchDev *sch, ORB *orb)
  898. {
  899. SCSW *s = &sch->curr_status.scsw;
  900. PMCW *p = &sch->curr_status.pmcw;
  901. int ret;
  902. if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
  903. ret = -ENODEV;
  904. goto out;
  905. }
  906. if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
  907. ret = -EINPROGRESS;
  908. goto out;
  909. }
  910. if (s->ctrl & (SCSW_FCTL_START_FUNC |
  911. SCSW_FCTL_HALT_FUNC |
  912. SCSW_FCTL_CLEAR_FUNC)) {
  913. ret = -EBUSY;
  914. goto out;
  915. }
  916. /* If monitoring is active, update counter. */
  917. if (channel_subsys.chnmon_active) {
  918. css_update_chnmon(sch);
  919. }
  920. sch->channel_prog = orb->cpa;
  921. /* Trigger the start function. */
  922. s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
  923. s->flags &= ~SCSW_FLAGS_MASK_PNO;
  924. ret = do_subchannel_work(sch, orb);
  925. out:
  926. return ret;
  927. }
  928. static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw,
  929. int *irb_len)
  930. {
  931. int i;
  932. uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
  933. uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
  934. copy_scsw_to_guest(&dest->scsw, &src->scsw);
  935. for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
  936. dest->esw[i] = cpu_to_be32(src->esw[i]);
  937. }
  938. for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
  939. dest->ecw[i] = cpu_to_be32(src->ecw[i]);
  940. }
  941. *irb_len = sizeof(*dest) - sizeof(dest->emw);
  942. /* extended measurements enabled? */
  943. if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
  944. !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
  945. !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
  946. return;
  947. }
  948. /* extended measurements pending? */
  949. if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
  950. return;
  951. }
  952. if ((stctl & SCSW_STCTL_PRIMARY) ||
  953. (stctl == SCSW_STCTL_SECONDARY) ||
  954. ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
  955. for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
  956. dest->emw[i] = cpu_to_be32(src->emw[i]);
  957. }
  958. }
  959. *irb_len = sizeof(*dest);
  960. }
  961. int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
  962. {
  963. SCSW *s = &sch->curr_status.scsw;
  964. PMCW *p = &sch->curr_status.pmcw;
  965. uint16_t stctl;
  966. IRB irb;
  967. if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
  968. return 3;
  969. }
  970. stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
  971. /* Prepare the irb for the guest. */
  972. memset(&irb, 0, sizeof(IRB));
  973. /* Copy scsw from current status. */
  974. memcpy(&irb.scsw, s, sizeof(SCSW));
  975. if (stctl & SCSW_STCTL_STATUS_PEND) {
  976. if (s->cstat & (SCSW_CSTAT_DATA_CHECK |
  977. SCSW_CSTAT_CHN_CTRL_CHK |
  978. SCSW_CSTAT_INTF_CTRL_CHK)) {
  979. irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
  980. irb.esw[0] = 0x04804000;
  981. } else {
  982. irb.esw[0] = 0x00800000;
  983. }
  984. /* If a unit check is pending, copy sense data. */
  985. if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
  986. (p->chars & PMCW_CHARS_MASK_CSENSE)) {
  987. int i;
  988. irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
  989. /* Attention: sense_data is already BE! */
  990. memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
  991. for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
  992. irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
  993. }
  994. irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
  995. }
  996. }
  997. /* Store the irb to the guest. */
  998. copy_irb_to_guest(target_irb, &irb, p, irb_len);
  999. return ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
  1000. }
  1001. void css_do_tsch_update_subch(SubchDev *sch)
  1002. {
  1003. SCSW *s = &sch->curr_status.scsw;
  1004. PMCW *p = &sch->curr_status.pmcw;
  1005. uint16_t stctl;
  1006. uint16_t fctl;
  1007. uint16_t actl;
  1008. stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
  1009. fctl = s->ctrl & SCSW_CTRL_MASK_FCTL;
  1010. actl = s->ctrl & SCSW_CTRL_MASK_ACTL;
  1011. /* Clear conditions on subchannel, if applicable. */
  1012. if (stctl & SCSW_STCTL_STATUS_PEND) {
  1013. s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
  1014. if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
  1015. ((fctl & SCSW_FCTL_HALT_FUNC) &&
  1016. (actl & SCSW_ACTL_SUSP))) {
  1017. s->ctrl &= ~SCSW_CTRL_MASK_FCTL;
  1018. }
  1019. if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
  1020. s->flags &= ~SCSW_FLAGS_MASK_PNO;
  1021. s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
  1022. SCSW_ACTL_START_PEND |
  1023. SCSW_ACTL_HALT_PEND |
  1024. SCSW_ACTL_CLEAR_PEND |
  1025. SCSW_ACTL_SUSP);
  1026. } else {
  1027. if ((actl & SCSW_ACTL_SUSP) &&
  1028. (fctl & SCSW_FCTL_START_FUNC)) {
  1029. s->flags &= ~SCSW_FLAGS_MASK_PNO;
  1030. if (fctl & SCSW_FCTL_HALT_FUNC) {
  1031. s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
  1032. SCSW_ACTL_START_PEND |
  1033. SCSW_ACTL_HALT_PEND |
  1034. SCSW_ACTL_CLEAR_PEND |
  1035. SCSW_ACTL_SUSP);
  1036. } else {
  1037. s->ctrl &= ~SCSW_ACTL_RESUME_PEND;
  1038. }
  1039. }
  1040. }
  1041. /* Clear pending sense data. */
  1042. if (p->chars & PMCW_CHARS_MASK_CSENSE) {
  1043. memset(sch->sense_data, 0 , sizeof(sch->sense_data));
  1044. }
  1045. }
  1046. }
  1047. static void copy_crw_to_guest(CRW *dest, const CRW *src)
  1048. {
  1049. dest->flags = cpu_to_be16(src->flags);
  1050. dest->rsid = cpu_to_be16(src->rsid);
  1051. }
  1052. int css_do_stcrw(CRW *crw)
  1053. {
  1054. CrwContainer *crw_cont;
  1055. int ret;
  1056. crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws);
  1057. if (crw_cont) {
  1058. QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
  1059. copy_crw_to_guest(crw, &crw_cont->crw);
  1060. g_free(crw_cont);
  1061. ret = 0;
  1062. } else {
  1063. /* List was empty, turn crw machine checks on again. */
  1064. memset(crw, 0, sizeof(*crw));
  1065. channel_subsys.do_crw_mchk = true;
  1066. ret = 1;
  1067. }
  1068. return ret;
  1069. }
  1070. static void copy_crw_from_guest(CRW *dest, const CRW *src)
  1071. {
  1072. dest->flags = be16_to_cpu(src->flags);
  1073. dest->rsid = be16_to_cpu(src->rsid);
  1074. }
  1075. void css_undo_stcrw(CRW *crw)
  1076. {
  1077. CrwContainer *crw_cont;
  1078. crw_cont = g_try_malloc0(sizeof(CrwContainer));
  1079. if (!crw_cont) {
  1080. channel_subsys.crws_lost = true;
  1081. return;
  1082. }
  1083. copy_crw_from_guest(&crw_cont->crw, crw);
  1084. QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling);
  1085. }
  1086. int css_do_tpi(IOIntCode *int_code, int lowcore)
  1087. {
  1088. /* No pending interrupts for !KVM. */
  1089. return 0;
  1090. }
  1091. int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
  1092. int rfmt, void *buf)
  1093. {
  1094. int i, desc_size;
  1095. uint32_t words[8];
  1096. uint32_t chpid_type_word;
  1097. CssImage *css;
  1098. if (!m && !cssid) {
  1099. css = channel_subsys.css[channel_subsys.default_cssid];
  1100. } else {
  1101. css = channel_subsys.css[cssid];
  1102. }
  1103. if (!css) {
  1104. return 0;
  1105. }
  1106. desc_size = 0;
  1107. for (i = f_chpid; i <= l_chpid; i++) {
  1108. if (css->chpids[i].in_use) {
  1109. chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
  1110. if (rfmt == 0) {
  1111. words[0] = cpu_to_be32(chpid_type_word);
  1112. words[1] = 0;
  1113. memcpy(buf + desc_size, words, 8);
  1114. desc_size += 8;
  1115. } else if (rfmt == 1) {
  1116. words[0] = cpu_to_be32(chpid_type_word);
  1117. words[1] = 0;
  1118. words[2] = 0;
  1119. words[3] = 0;
  1120. words[4] = 0;
  1121. words[5] = 0;
  1122. words[6] = 0;
  1123. words[7] = 0;
  1124. memcpy(buf + desc_size, words, 32);
  1125. desc_size += 32;
  1126. }
  1127. }
  1128. }
  1129. return desc_size;
  1130. }
  1131. void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
  1132. {
  1133. /* dct is currently ignored (not really meaningful for our devices) */
  1134. /* TODO: Don't ignore mbk. */
  1135. if (update && !channel_subsys.chnmon_active) {
  1136. /* Enable measuring. */
  1137. channel_subsys.chnmon_area = mbo;
  1138. channel_subsys.chnmon_active = true;
  1139. }
  1140. if (!update && channel_subsys.chnmon_active) {
  1141. /* Disable measuring. */
  1142. channel_subsys.chnmon_area = 0;
  1143. channel_subsys.chnmon_active = false;
  1144. }
  1145. }
  1146. int css_do_rsch(SubchDev *sch)
  1147. {
  1148. SCSW *s = &sch->curr_status.scsw;
  1149. PMCW *p = &sch->curr_status.pmcw;
  1150. int ret;
  1151. if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
  1152. ret = -ENODEV;
  1153. goto out;
  1154. }
  1155. if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
  1156. ret = -EINPROGRESS;
  1157. goto out;
  1158. }
  1159. if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
  1160. (s->ctrl & SCSW_ACTL_RESUME_PEND) ||
  1161. (!(s->ctrl & SCSW_ACTL_SUSP))) {
  1162. ret = -EINVAL;
  1163. goto out;
  1164. }
  1165. /* If monitoring is active, update counter. */
  1166. if (channel_subsys.chnmon_active) {
  1167. css_update_chnmon(sch);
  1168. }
  1169. s->ctrl |= SCSW_ACTL_RESUME_PEND;
  1170. do_subchannel_work(sch, NULL);
  1171. ret = 0;
  1172. out:
  1173. return ret;
  1174. }
  1175. int css_do_rchp(uint8_t cssid, uint8_t chpid)
  1176. {
  1177. uint8_t real_cssid;
  1178. if (cssid > channel_subsys.max_cssid) {
  1179. return -EINVAL;
  1180. }
  1181. if (channel_subsys.max_cssid == 0) {
  1182. real_cssid = channel_subsys.default_cssid;
  1183. } else {
  1184. real_cssid = cssid;
  1185. }
  1186. if (!channel_subsys.css[real_cssid]) {
  1187. return -EINVAL;
  1188. }
  1189. if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) {
  1190. return -ENODEV;
  1191. }
  1192. if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) {
  1193. fprintf(stderr,
  1194. "rchp unsupported for non-virtual chpid %x.%02x!\n",
  1195. real_cssid, chpid);
  1196. return -ENODEV;
  1197. }
  1198. /* We don't really use a channel path, so we're done here. */
  1199. css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT,
  1200. channel_subsys.max_cssid > 0 ? 1 : 0, chpid);
  1201. if (channel_subsys.max_cssid > 0) {
  1202. css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 0, real_cssid << 8);
  1203. }
  1204. return 0;
  1205. }
  1206. bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
  1207. {
  1208. SubchSet *set;
  1209. uint8_t real_cssid;
  1210. real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
  1211. if (ssid > MAX_SSID ||
  1212. !channel_subsys.css[real_cssid] ||
  1213. !channel_subsys.css[real_cssid]->sch_set[ssid]) {
  1214. return true;
  1215. }
  1216. set = channel_subsys.css[real_cssid]->sch_set[ssid];
  1217. return schid > find_last_bit(set->schids_used,
  1218. (MAX_SCHID + 1) / sizeof(unsigned long));
  1219. }
  1220. unsigned int css_find_free_chpid(uint8_t cssid)
  1221. {
  1222. CssImage *css = channel_subsys.css[cssid];
  1223. unsigned int chpid;
  1224. if (!css) {
  1225. return MAX_CHPID + 1;
  1226. }
  1227. for (chpid = 0; chpid <= MAX_CHPID; chpid++) {
  1228. /* skip reserved chpid */
  1229. if (chpid == VIRTIO_CCW_CHPID) {
  1230. continue;
  1231. }
  1232. if (!css->chpids[chpid].in_use) {
  1233. return chpid;
  1234. }
  1235. }
  1236. return MAX_CHPID + 1;
  1237. }
  1238. static int css_add_chpid(uint8_t cssid, uint8_t chpid, uint8_t type,
  1239. bool is_virt)
  1240. {
  1241. CssImage *css;
  1242. trace_css_chpid_add(cssid, chpid, type);
  1243. css = channel_subsys.css[cssid];
  1244. if (!css) {
  1245. return -EINVAL;
  1246. }
  1247. if (css->chpids[chpid].in_use) {
  1248. return -EEXIST;
  1249. }
  1250. css->chpids[chpid].in_use = 1;
  1251. css->chpids[chpid].type = type;
  1252. css->chpids[chpid].is_virtual = is_virt;
  1253. css_generate_chp_crws(cssid, chpid);
  1254. return 0;
  1255. }
  1256. void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
  1257. {
  1258. PMCW *p = &sch->curr_status.pmcw;
  1259. SCSW *s = &sch->curr_status.scsw;
  1260. int i;
  1261. CssImage *css = channel_subsys.css[sch->cssid];
  1262. assert(css != NULL);
  1263. memset(p, 0, sizeof(PMCW));
  1264. p->flags |= PMCW_FLAGS_MASK_DNV;
  1265. p->devno = sch->devno;
  1266. /* single path */
  1267. p->pim = 0x80;
  1268. p->pom = 0xff;
  1269. p->pam = 0x80;
  1270. p->chpid[0] = chpid;
  1271. if (!css->chpids[chpid].in_use) {
  1272. css_add_chpid(sch->cssid, chpid, type, true);
  1273. }
  1274. memset(s, 0, sizeof(SCSW));
  1275. sch->curr_status.mba = 0;
  1276. for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
  1277. sch->curr_status.mda[i] = 0;
  1278. }
  1279. }
  1280. SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
  1281. {
  1282. uint8_t real_cssid;
  1283. real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
  1284. if (!channel_subsys.css[real_cssid]) {
  1285. return NULL;
  1286. }
  1287. if (!channel_subsys.css[real_cssid]->sch_set[ssid]) {
  1288. return NULL;
  1289. }
  1290. return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid];
  1291. }
  1292. /**
  1293. * Return free device number in subchannel set.
  1294. *
  1295. * Return index of the first free device number in the subchannel set
  1296. * identified by @p cssid and @p ssid, beginning the search at @p
  1297. * start and wrapping around at MAX_DEVNO. Return a value exceeding
  1298. * MAX_SCHID if there are no free device numbers in the subchannel
  1299. * set.
  1300. */
  1301. static uint32_t css_find_free_devno(uint8_t cssid, uint8_t ssid,
  1302. uint16_t start)
  1303. {
  1304. uint32_t round;
  1305. for (round = 0; round <= MAX_DEVNO; round++) {
  1306. uint16_t devno = (start + round) % MAX_DEVNO;
  1307. if (!css_devno_used(cssid, ssid, devno)) {
  1308. return devno;
  1309. }
  1310. }
  1311. return MAX_DEVNO + 1;
  1312. }
  1313. /**
  1314. * Return first free subchannel (id) in subchannel set.
  1315. *
  1316. * Return index of the first free subchannel in the subchannel set
  1317. * identified by @p cssid and @p ssid, if there is any. Return a value
  1318. * exceeding MAX_SCHID if there are no free subchannels in the
  1319. * subchannel set.
  1320. */
  1321. static uint32_t css_find_free_subch(uint8_t cssid, uint8_t ssid)
  1322. {
  1323. uint32_t schid;
  1324. for (schid = 0; schid <= MAX_SCHID; schid++) {
  1325. if (!css_find_subch(1, cssid, ssid, schid)) {
  1326. return schid;
  1327. }
  1328. }
  1329. return MAX_SCHID + 1;
  1330. }
  1331. /**
  1332. * Return first free subchannel (id) in subchannel set for a device number
  1333. *
  1334. * Verify the device number @p devno is not used yet in the subchannel
  1335. * set identified by @p cssid and @p ssid. Set @p schid to the index
  1336. * of the first free subchannel in the subchannel set, if there is
  1337. * any. Return true if everything succeeded and false otherwise.
  1338. */
  1339. static bool css_find_free_subch_for_devno(uint8_t cssid, uint8_t ssid,
  1340. uint16_t devno, uint16_t *schid,
  1341. Error **errp)
  1342. {
  1343. uint32_t free_schid;
  1344. assert(schid);
  1345. if (css_devno_used(cssid, ssid, devno)) {
  1346. error_setg(errp, "Device %x.%x.%04x already exists",
  1347. cssid, ssid, devno);
  1348. return false;
  1349. }
  1350. free_schid = css_find_free_subch(cssid, ssid);
  1351. if (free_schid > MAX_SCHID) {
  1352. error_setg(errp, "No free subchannel found for %x.%x.%04x",
  1353. cssid, ssid, devno);
  1354. return false;
  1355. }
  1356. *schid = free_schid;
  1357. return true;
  1358. }
  1359. /**
  1360. * Return first free subchannel (id) and device number
  1361. *
  1362. * Locate the first free subchannel and first free device number in
  1363. * any of the subchannel sets of the channel subsystem identified by
  1364. * @p cssid. Return false if no free subchannel / device number could
  1365. * be found. Otherwise set @p ssid, @p devno and @p schid to identify
  1366. * the available subchannel and device number and return true.
  1367. *
  1368. * May modify @p ssid, @p devno and / or @p schid even if no free
  1369. * subchannel / device number could be found.
  1370. */
  1371. static bool css_find_free_subch_and_devno(uint8_t cssid, uint8_t *ssid,
  1372. uint16_t *devno, uint16_t *schid,
  1373. Error **errp)
  1374. {
  1375. uint32_t free_schid, free_devno;
  1376. assert(ssid && devno && schid);
  1377. for (*ssid = 0; *ssid <= MAX_SSID; (*ssid)++) {
  1378. free_schid = css_find_free_subch(cssid, *ssid);
  1379. if (free_schid > MAX_SCHID) {
  1380. continue;
  1381. }
  1382. free_devno = css_find_free_devno(cssid, *ssid, free_schid);
  1383. if (free_devno > MAX_DEVNO) {
  1384. continue;
  1385. }
  1386. *schid = free_schid;
  1387. *devno = free_devno;
  1388. return true;
  1389. }
  1390. error_setg(errp, "Virtual channel subsystem is full!");
  1391. return false;
  1392. }
  1393. bool css_subch_visible(SubchDev *sch)
  1394. {
  1395. if (sch->ssid > channel_subsys.max_ssid) {
  1396. return false;
  1397. }
  1398. if (sch->cssid != channel_subsys.default_cssid) {
  1399. return (channel_subsys.max_cssid > 0);
  1400. }
  1401. return true;
  1402. }
  1403. bool css_present(uint8_t cssid)
  1404. {
  1405. return (channel_subsys.css[cssid] != NULL);
  1406. }
  1407. bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
  1408. {
  1409. if (!channel_subsys.css[cssid]) {
  1410. return false;
  1411. }
  1412. if (!channel_subsys.css[cssid]->sch_set[ssid]) {
  1413. return false;
  1414. }
  1415. return !!test_bit(devno,
  1416. channel_subsys.css[cssid]->sch_set[ssid]->devnos_used);
  1417. }
  1418. void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
  1419. uint16_t devno, SubchDev *sch)
  1420. {
  1421. CssImage *css;
  1422. SubchSet *s_set;
  1423. trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
  1424. devno);
  1425. if (!channel_subsys.css[cssid]) {
  1426. fprintf(stderr,
  1427. "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
  1428. __func__, cssid, ssid, schid);
  1429. return;
  1430. }
  1431. css = channel_subsys.css[cssid];
  1432. if (!css->sch_set[ssid]) {
  1433. css->sch_set[ssid] = g_malloc0(sizeof(SubchSet));
  1434. }
  1435. s_set = css->sch_set[ssid];
  1436. s_set->sch[schid] = sch;
  1437. if (sch) {
  1438. set_bit(schid, s_set->schids_used);
  1439. set_bit(devno, s_set->devnos_used);
  1440. } else {
  1441. clear_bit(schid, s_set->schids_used);
  1442. clear_bit(devno, s_set->devnos_used);
  1443. }
  1444. }
  1445. void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid)
  1446. {
  1447. CrwContainer *crw_cont;
  1448. trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : "");
  1449. /* TODO: Maybe use a static crw pool? */
  1450. crw_cont = g_try_malloc0(sizeof(CrwContainer));
  1451. if (!crw_cont) {
  1452. channel_subsys.crws_lost = true;
  1453. return;
  1454. }
  1455. crw_cont->crw.flags = (rsc << 8) | erc;
  1456. if (chain) {
  1457. crw_cont->crw.flags |= CRW_FLAGS_MASK_C;
  1458. }
  1459. crw_cont->crw.rsid = rsid;
  1460. if (channel_subsys.crws_lost) {
  1461. crw_cont->crw.flags |= CRW_FLAGS_MASK_R;
  1462. channel_subsys.crws_lost = false;
  1463. }
  1464. QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling);
  1465. if (channel_subsys.do_crw_mchk) {
  1466. channel_subsys.do_crw_mchk = false;
  1467. /* Inject crw pending machine check. */
  1468. s390_crw_mchk();
  1469. }
  1470. }
  1471. void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
  1472. int hotplugged, int add)
  1473. {
  1474. uint8_t guest_cssid;
  1475. bool chain_crw;
  1476. if (add && !hotplugged) {
  1477. return;
  1478. }
  1479. if (channel_subsys.max_cssid == 0) {
  1480. /* Default cssid shows up as 0. */
  1481. guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid;
  1482. } else {
  1483. /* Show real cssid to the guest. */
  1484. guest_cssid = cssid;
  1485. }
  1486. /*
  1487. * Only notify for higher subchannel sets/channel subsystems if the
  1488. * guest has enabled it.
  1489. */
  1490. if ((ssid > channel_subsys.max_ssid) ||
  1491. (guest_cssid > channel_subsys.max_cssid) ||
  1492. ((channel_subsys.max_cssid == 0) &&
  1493. (cssid != channel_subsys.default_cssid))) {
  1494. return;
  1495. }
  1496. chain_crw = (channel_subsys.max_ssid > 0) ||
  1497. (channel_subsys.max_cssid > 0);
  1498. css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, chain_crw ? 1 : 0, schid);
  1499. if (chain_crw) {
  1500. css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0,
  1501. (guest_cssid << 8) | (ssid << 4));
  1502. }
  1503. /* RW_ERC_IPI --> clear pending interrupts */
  1504. css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid);
  1505. }
  1506. void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
  1507. {
  1508. /* TODO */
  1509. }
  1510. void css_generate_css_crws(uint8_t cssid)
  1511. {
  1512. if (!channel_subsys.sei_pending) {
  1513. css_queue_crw(CRW_RSC_CSS, 0, 0, cssid);
  1514. }
  1515. channel_subsys.sei_pending = true;
  1516. }
  1517. void css_clear_sei_pending(void)
  1518. {
  1519. channel_subsys.sei_pending = false;
  1520. }
  1521. int css_enable_mcsse(void)
  1522. {
  1523. trace_css_enable_facility("mcsse");
  1524. channel_subsys.max_cssid = MAX_CSSID;
  1525. return 0;
  1526. }
  1527. int css_enable_mss(void)
  1528. {
  1529. trace_css_enable_facility("mss");
  1530. channel_subsys.max_ssid = MAX_SSID;
  1531. return 0;
  1532. }
  1533. void subch_device_save(SubchDev *s, QEMUFile *f)
  1534. {
  1535. int i;
  1536. qemu_put_byte(f, s->cssid);
  1537. qemu_put_byte(f, s->ssid);
  1538. qemu_put_be16(f, s->schid);
  1539. qemu_put_be16(f, s->devno);
  1540. qemu_put_byte(f, s->thinint_active);
  1541. /* SCHIB */
  1542. /* PMCW */
  1543. qemu_put_be32(f, s->curr_status.pmcw.intparm);
  1544. qemu_put_be16(f, s->curr_status.pmcw.flags);
  1545. qemu_put_be16(f, s->curr_status.pmcw.devno);
  1546. qemu_put_byte(f, s->curr_status.pmcw.lpm);
  1547. qemu_put_byte(f, s->curr_status.pmcw.pnom);
  1548. qemu_put_byte(f, s->curr_status.pmcw.lpum);
  1549. qemu_put_byte(f, s->curr_status.pmcw.pim);
  1550. qemu_put_be16(f, s->curr_status.pmcw.mbi);
  1551. qemu_put_byte(f, s->curr_status.pmcw.pom);
  1552. qemu_put_byte(f, s->curr_status.pmcw.pam);
  1553. qemu_put_buffer(f, s->curr_status.pmcw.chpid, 8);
  1554. qemu_put_be32(f, s->curr_status.pmcw.chars);
  1555. /* SCSW */
  1556. qemu_put_be16(f, s->curr_status.scsw.flags);
  1557. qemu_put_be16(f, s->curr_status.scsw.ctrl);
  1558. qemu_put_be32(f, s->curr_status.scsw.cpa);
  1559. qemu_put_byte(f, s->curr_status.scsw.dstat);
  1560. qemu_put_byte(f, s->curr_status.scsw.cstat);
  1561. qemu_put_be16(f, s->curr_status.scsw.count);
  1562. qemu_put_be64(f, s->curr_status.mba);
  1563. qemu_put_buffer(f, s->curr_status.mda, 4);
  1564. /* end SCHIB */
  1565. qemu_put_buffer(f, s->sense_data, 32);
  1566. qemu_put_be64(f, s->channel_prog);
  1567. /* last cmd */
  1568. qemu_put_byte(f, s->last_cmd.cmd_code);
  1569. qemu_put_byte(f, s->last_cmd.flags);
  1570. qemu_put_be16(f, s->last_cmd.count);
  1571. qemu_put_be32(f, s->last_cmd.cda);
  1572. qemu_put_byte(f, s->last_cmd_valid);
  1573. qemu_put_byte(f, s->id.reserved);
  1574. qemu_put_be16(f, s->id.cu_type);
  1575. qemu_put_byte(f, s->id.cu_model);
  1576. qemu_put_be16(f, s->id.dev_type);
  1577. qemu_put_byte(f, s->id.dev_model);
  1578. qemu_put_byte(f, s->id.unused);
  1579. for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
  1580. qemu_put_byte(f, s->id.ciw[i].type);
  1581. qemu_put_byte(f, s->id.ciw[i].command);
  1582. qemu_put_be16(f, s->id.ciw[i].count);
  1583. }
  1584. qemu_put_byte(f, s->ccw_fmt_1);
  1585. qemu_put_byte(f, s->ccw_no_data_cnt);
  1586. }
  1587. int subch_device_load(SubchDev *s, QEMUFile *f)
  1588. {
  1589. SubchDev *old_s;
  1590. uint16_t old_schid = s->schid;
  1591. int i;
  1592. s->cssid = qemu_get_byte(f);
  1593. s->ssid = qemu_get_byte(f);
  1594. s->schid = qemu_get_be16(f);
  1595. s->devno = qemu_get_be16(f);
  1596. /* Re-assign subch. */
  1597. if (old_schid != s->schid) {
  1598. old_s = channel_subsys.css[s->cssid]->sch_set[s->ssid]->sch[old_schid];
  1599. /*
  1600. * (old_s != s) means that some other device has its correct
  1601. * subchannel already assigned (in load).
  1602. */
  1603. if (old_s == s) {
  1604. css_subch_assign(s->cssid, s->ssid, old_schid, s->devno, NULL);
  1605. }
  1606. /* It's OK to re-assign without a prior de-assign. */
  1607. css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, s);
  1608. }
  1609. s->thinint_active = qemu_get_byte(f);
  1610. /* SCHIB */
  1611. /* PMCW */
  1612. s->curr_status.pmcw.intparm = qemu_get_be32(f);
  1613. s->curr_status.pmcw.flags = qemu_get_be16(f);
  1614. s->curr_status.pmcw.devno = qemu_get_be16(f);
  1615. s->curr_status.pmcw.lpm = qemu_get_byte(f);
  1616. s->curr_status.pmcw.pnom = qemu_get_byte(f);
  1617. s->curr_status.pmcw.lpum = qemu_get_byte(f);
  1618. s->curr_status.pmcw.pim = qemu_get_byte(f);
  1619. s->curr_status.pmcw.mbi = qemu_get_be16(f);
  1620. s->curr_status.pmcw.pom = qemu_get_byte(f);
  1621. s->curr_status.pmcw.pam = qemu_get_byte(f);
  1622. qemu_get_buffer(f, s->curr_status.pmcw.chpid, 8);
  1623. s->curr_status.pmcw.chars = qemu_get_be32(f);
  1624. /* SCSW */
  1625. s->curr_status.scsw.flags = qemu_get_be16(f);
  1626. s->curr_status.scsw.ctrl = qemu_get_be16(f);
  1627. s->curr_status.scsw.cpa = qemu_get_be32(f);
  1628. s->curr_status.scsw.dstat = qemu_get_byte(f);
  1629. s->curr_status.scsw.cstat = qemu_get_byte(f);
  1630. s->curr_status.scsw.count = qemu_get_be16(f);
  1631. s->curr_status.mba = qemu_get_be64(f);
  1632. qemu_get_buffer(f, s->curr_status.mda, 4);
  1633. /* end SCHIB */
  1634. qemu_get_buffer(f, s->sense_data, 32);
  1635. s->channel_prog = qemu_get_be64(f);
  1636. /* last cmd */
  1637. s->last_cmd.cmd_code = qemu_get_byte(f);
  1638. s->last_cmd.flags = qemu_get_byte(f);
  1639. s->last_cmd.count = qemu_get_be16(f);
  1640. s->last_cmd.cda = qemu_get_be32(f);
  1641. s->last_cmd_valid = qemu_get_byte(f);
  1642. s->id.reserved = qemu_get_byte(f);
  1643. s->id.cu_type = qemu_get_be16(f);
  1644. s->id.cu_model = qemu_get_byte(f);
  1645. s->id.dev_type = qemu_get_be16(f);
  1646. s->id.dev_model = qemu_get_byte(f);
  1647. s->id.unused = qemu_get_byte(f);
  1648. for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
  1649. s->id.ciw[i].type = qemu_get_byte(f);
  1650. s->id.ciw[i].command = qemu_get_byte(f);
  1651. s->id.ciw[i].count = qemu_get_be16(f);
  1652. }
  1653. s->ccw_fmt_1 = qemu_get_byte(f);
  1654. s->ccw_no_data_cnt = qemu_get_byte(f);
  1655. /*
  1656. * Hack alert. We don't migrate the channel subsystem status (no
  1657. * device!), but we need to find out if the guest enabled mss/mcss-e.
  1658. * If the subchannel is enabled, it certainly was able to access it,
  1659. * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
  1660. * values. This is not watertight, but better than nothing.
  1661. */
  1662. if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) {
  1663. if (s->ssid) {
  1664. channel_subsys.max_ssid = MAX_SSID;
  1665. }
  1666. if (s->cssid != channel_subsys.default_cssid) {
  1667. channel_subsys.max_cssid = MAX_CSSID;
  1668. }
  1669. }
  1670. return 0;
  1671. }
  1672. void css_reset_sch(SubchDev *sch)
  1673. {
  1674. PMCW *p = &sch->curr_status.pmcw;
  1675. if ((p->flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) {
  1676. sch->disable_cb(sch);
  1677. }
  1678. p->intparm = 0;
  1679. p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
  1680. PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
  1681. PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
  1682. p->flags |= PMCW_FLAGS_MASK_DNV;
  1683. p->devno = sch->devno;
  1684. p->pim = 0x80;
  1685. p->lpm = p->pim;
  1686. p->pnom = 0;
  1687. p->lpum = 0;
  1688. p->mbi = 0;
  1689. p->pom = 0xff;
  1690. p->pam = 0x80;
  1691. p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
  1692. PMCW_CHARS_MASK_CSENSE);
  1693. memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw));
  1694. sch->curr_status.mba = 0;
  1695. sch->channel_prog = 0x0;
  1696. sch->last_cmd_valid = false;
  1697. sch->thinint_active = false;
  1698. }
  1699. void css_reset(void)
  1700. {
  1701. CrwContainer *crw_cont;
  1702. /* Clean up monitoring. */
  1703. channel_subsys.chnmon_active = false;
  1704. channel_subsys.chnmon_area = 0;
  1705. /* Clear pending CRWs. */
  1706. while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) {
  1707. QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
  1708. g_free(crw_cont);
  1709. }
  1710. channel_subsys.sei_pending = false;
  1711. channel_subsys.do_crw_mchk = true;
  1712. channel_subsys.crws_lost = false;
  1713. /* Reset maximum ids. */
  1714. channel_subsys.max_cssid = 0;
  1715. channel_subsys.max_ssid = 0;
  1716. }
  1717. static void get_css_devid(Object *obj, Visitor *v, const char *name,
  1718. void *opaque, Error **errp)
  1719. {
  1720. DeviceState *dev = DEVICE(obj);
  1721. Property *prop = opaque;
  1722. CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
  1723. char buffer[] = "xx.x.xxxx";
  1724. char *p = buffer;
  1725. int r;
  1726. if (dev_id->valid) {
  1727. r = snprintf(buffer, sizeof(buffer), "%02x.%1x.%04x", dev_id->cssid,
  1728. dev_id->ssid, dev_id->devid);
  1729. assert(r == sizeof(buffer) - 1);
  1730. /* drop leading zero */
  1731. if (dev_id->cssid <= 0xf) {
  1732. p++;
  1733. }
  1734. } else {
  1735. snprintf(buffer, sizeof(buffer), "<unset>");
  1736. }
  1737. visit_type_str(v, name, &p, errp);
  1738. }
  1739. /*
  1740. * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid
  1741. */
  1742. static void set_css_devid(Object *obj, Visitor *v, const char *name,
  1743. void *opaque, Error **errp)
  1744. {
  1745. DeviceState *dev = DEVICE(obj);
  1746. Property *prop = opaque;
  1747. CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
  1748. Error *local_err = NULL;
  1749. char *str;
  1750. int num, n1, n2;
  1751. unsigned int cssid, ssid, devid;
  1752. if (dev->realized) {
  1753. qdev_prop_set_after_realize(dev, name, errp);
  1754. return;
  1755. }
  1756. visit_type_str(v, name, &str, &local_err);
  1757. if (local_err) {
  1758. error_propagate(errp, local_err);
  1759. return;
  1760. }
  1761. num = sscanf(str, "%2x.%1x%n.%4x%n", &cssid, &ssid, &n1, &devid, &n2);
  1762. if (num != 3 || (n2 - n1) != 5 || strlen(str) != n2) {
  1763. error_set_from_qdev_prop_error(errp, EINVAL, dev, prop, str);
  1764. goto out;
  1765. }
  1766. if ((cssid > MAX_CSSID) || (ssid > MAX_SSID)) {
  1767. error_setg(errp, "Invalid cssid or ssid: cssid %x, ssid %x",
  1768. cssid, ssid);
  1769. goto out;
  1770. }
  1771. dev_id->cssid = cssid;
  1772. dev_id->ssid = ssid;
  1773. dev_id->devid = devid;
  1774. dev_id->valid = true;
  1775. out:
  1776. g_free(str);
  1777. }
  1778. PropertyInfo css_devid_propinfo = {
  1779. .name = "str",
  1780. .description = "Identifier of an I/O device in the channel "
  1781. "subsystem, example: fe.1.23ab",
  1782. .get = get_css_devid,
  1783. .set = set_css_devid,
  1784. };
  1785. PropertyInfo css_devid_ro_propinfo = {
  1786. .name = "str",
  1787. .description = "Read-only identifier of an I/O device in the channel "
  1788. "subsystem, example: fe.1.23ab",
  1789. .get = get_css_devid,
  1790. };
  1791. SubchDev *css_create_sch(CssDevId bus_id, bool is_virtual, bool squash_mcss,
  1792. Error **errp)
  1793. {
  1794. uint16_t schid = 0;
  1795. SubchDev *sch;
  1796. if (bus_id.valid) {
  1797. if (is_virtual != (bus_id.cssid == VIRTUAL_CSSID)) {
  1798. error_setg(errp, "cssid %hhx not valid for %s devices",
  1799. bus_id.cssid,
  1800. (is_virtual ? "virtual" : "non-virtual"));
  1801. return NULL;
  1802. }
  1803. }
  1804. if (bus_id.valid) {
  1805. if (squash_mcss) {
  1806. bus_id.cssid = channel_subsys.default_cssid;
  1807. } else if (!channel_subsys.css[bus_id.cssid]) {
  1808. css_create_css_image(bus_id.cssid, false);
  1809. }
  1810. if (!css_find_free_subch_for_devno(bus_id.cssid, bus_id.ssid,
  1811. bus_id.devid, &schid, errp)) {
  1812. return NULL;
  1813. }
  1814. } else if (squash_mcss || is_virtual) {
  1815. bus_id.cssid = channel_subsys.default_cssid;
  1816. if (!css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
  1817. &bus_id.devid, &schid, errp)) {
  1818. return NULL;
  1819. }
  1820. } else {
  1821. for (bus_id.cssid = 0; bus_id.cssid < MAX_CSSID; ++bus_id.cssid) {
  1822. if (bus_id.cssid == VIRTUAL_CSSID) {
  1823. continue;
  1824. }
  1825. if (!channel_subsys.css[bus_id.cssid]) {
  1826. css_create_css_image(bus_id.cssid, false);
  1827. }
  1828. if (css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
  1829. &bus_id.devid, &schid,
  1830. NULL)) {
  1831. break;
  1832. }
  1833. if (bus_id.cssid == MAX_CSSID) {
  1834. error_setg(errp, "Virtual channel subsystem is full!");
  1835. return NULL;
  1836. }
  1837. }
  1838. }
  1839. sch = g_malloc0(sizeof(*sch));
  1840. sch->cssid = bus_id.cssid;
  1841. sch->ssid = bus_id.ssid;
  1842. sch->devno = bus_id.devid;
  1843. sch->schid = schid;
  1844. css_subch_assign(sch->cssid, sch->ssid, schid, sch->devno, sch);
  1845. return sch;
  1846. }
  1847. static int css_sch_get_chpids(SubchDev *sch, CssDevId *dev_id)
  1848. {
  1849. char *fid_path;
  1850. FILE *fd;
  1851. uint32_t chpid[8];
  1852. int i;
  1853. PMCW *p = &sch->curr_status.pmcw;
  1854. fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/chpids",
  1855. dev_id->cssid, dev_id->ssid, dev_id->devid);
  1856. fd = fopen(fid_path, "r");
  1857. if (fd == NULL) {
  1858. error_report("%s: open %s failed", __func__, fid_path);
  1859. g_free(fid_path);
  1860. return -EINVAL;
  1861. }
  1862. if (fscanf(fd, "%x %x %x %x %x %x %x %x",
  1863. &chpid[0], &chpid[1], &chpid[2], &chpid[3],
  1864. &chpid[4], &chpid[5], &chpid[6], &chpid[7]) != 8) {
  1865. fclose(fd);
  1866. g_free(fid_path);
  1867. return -EINVAL;
  1868. }
  1869. for (i = 0; i < ARRAY_SIZE(p->chpid); i++) {
  1870. p->chpid[i] = chpid[i];
  1871. }
  1872. fclose(fd);
  1873. g_free(fid_path);
  1874. return 0;
  1875. }
  1876. static int css_sch_get_path_masks(SubchDev *sch, CssDevId *dev_id)
  1877. {
  1878. char *fid_path;
  1879. FILE *fd;
  1880. uint32_t pim, pam, pom;
  1881. PMCW *p = &sch->curr_status.pmcw;
  1882. fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/pimpampom",
  1883. dev_id->cssid, dev_id->ssid, dev_id->devid);
  1884. fd = fopen(fid_path, "r");
  1885. if (fd == NULL) {
  1886. error_report("%s: open %s failed", __func__, fid_path);
  1887. g_free(fid_path);
  1888. return -EINVAL;
  1889. }
  1890. if (fscanf(fd, "%x %x %x", &pim, &pam, &pom) != 3) {
  1891. fclose(fd);
  1892. g_free(fid_path);
  1893. return -EINVAL;
  1894. }
  1895. p->pim = pim;
  1896. p->pam = pam;
  1897. p->pom = pom;
  1898. fclose(fd);
  1899. g_free(fid_path);
  1900. return 0;
  1901. }
  1902. static int css_sch_get_chpid_type(uint8_t chpid, uint32_t *type,
  1903. CssDevId *dev_id)
  1904. {
  1905. char *fid_path;
  1906. FILE *fd;
  1907. fid_path = g_strdup_printf("/sys/devices/css%x/chp0.%02x/type",
  1908. dev_id->cssid, chpid);
  1909. fd = fopen(fid_path, "r");
  1910. if (fd == NULL) {
  1911. error_report("%s: open %s failed", __func__, fid_path);
  1912. g_free(fid_path);
  1913. return -EINVAL;
  1914. }
  1915. if (fscanf(fd, "%x", type) != 1) {
  1916. fclose(fd);
  1917. g_free(fid_path);
  1918. return -EINVAL;
  1919. }
  1920. fclose(fd);
  1921. g_free(fid_path);
  1922. return 0;
  1923. }
  1924. /*
  1925. * We currently retrieve the real device information from sysfs to build the
  1926. * guest subchannel information block without considering the migration feature.
  1927. * We need to revisit this problem when we want to add migration support.
  1928. */
  1929. int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id)
  1930. {
  1931. CssImage *css = channel_subsys.css[sch->cssid];
  1932. PMCW *p = &sch->curr_status.pmcw;
  1933. SCSW *s = &sch->curr_status.scsw;
  1934. uint32_t type;
  1935. int i, ret;
  1936. assert(css != NULL);
  1937. memset(p, 0, sizeof(PMCW));
  1938. p->flags |= PMCW_FLAGS_MASK_DNV;
  1939. /* We are dealing with I/O subchannels only. */
  1940. p->devno = sch->devno;
  1941. /* Grab path mask from sysfs. */
  1942. ret = css_sch_get_path_masks(sch, dev_id);
  1943. if (ret) {
  1944. return ret;
  1945. }
  1946. /* Grab chpids from sysfs. */
  1947. ret = css_sch_get_chpids(sch, dev_id);
  1948. if (ret) {
  1949. return ret;
  1950. }
  1951. /* Build chpid type. */
  1952. for (i = 0; i < ARRAY_SIZE(p->chpid); i++) {
  1953. if (p->chpid[i] && !css->chpids[p->chpid[i]].in_use) {
  1954. ret = css_sch_get_chpid_type(p->chpid[i], &type, dev_id);
  1955. if (ret) {
  1956. return ret;
  1957. }
  1958. css_add_chpid(sch->cssid, p->chpid[i], type, false);
  1959. }
  1960. }
  1961. memset(s, 0, sizeof(SCSW));
  1962. sch->curr_status.mba = 0;
  1963. for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
  1964. sch->curr_status.mda[i] = 0;
  1965. }
  1966. return 0;
  1967. }