omap_uart.c 1.9 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465
  1. /*
  2. * TI OMAP processors UART emulation.
  3. *
  4. * Copyright (C) 2006-2008 Andrzej Zaborowski <balrog@zabor.org>
  5. * Copyright (C) 2007-2009 Nokia Corporation
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 or
  10. * (at your option) version 3 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "qemu/osdep.h"
  21. #include "chardev/char.h"
  22. #include "hw/arm/omap.h"
  23. #include "hw/char/serial-mm.h"
  24. #include "exec/address-spaces.h"
  25. /* UARTs */
  26. struct omap_uart_s {
  27. MemoryRegion iomem;
  28. hwaddr base;
  29. SerialMM *serial; /* TODO */
  30. omap_clk fclk;
  31. qemu_irq irq;
  32. uint8_t eblr;
  33. uint8_t syscontrol;
  34. uint8_t wkup;
  35. uint8_t cfps;
  36. uint8_t clksel;
  37. };
  38. void omap_uart_reset(struct omap_uart_s *s)
  39. {
  40. s->eblr = 0x00;
  41. s->syscontrol = 0;
  42. s->wkup = 0x3f;
  43. s->cfps = 0x69;
  44. s->clksel = 0;
  45. }
  46. struct omap_uart_s *omap_uart_init(hwaddr base,
  47. qemu_irq irq, omap_clk fclk, omap_clk iclk,
  48. qemu_irq txdma, qemu_irq rxdma,
  49. const char *label, Chardev *chr)
  50. {
  51. struct omap_uart_s *s = g_new0(struct omap_uart_s, 1);
  52. s->base = base;
  53. s->fclk = fclk;
  54. s->irq = irq;
  55. s->serial = serial_mm_init(get_system_memory(), base, 2, irq,
  56. omap_clk_getrate(fclk) / 16,
  57. chr ?: qemu_chr_new(label, "null", NULL),
  58. DEVICE_NATIVE_ENDIAN);
  59. return s;
  60. }