cpu.c 11 KB

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  1. /*
  2. * Target-specific parts of the CPU object
  3. *
  4. * Copyright (c) 2003 Fabrice Bellard
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License as published by the Free Software Foundation; either
  9. * version 2 of the License, or (at your option) any later version.
  10. *
  11. * This library is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * Lesser General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Lesser General Public
  17. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "qemu/osdep.h"
  20. #include "qemu-common.h"
  21. #include "qapi/error.h"
  22. #include "exec/target_page.h"
  23. #include "hw/qdev-core.h"
  24. #include "hw/qdev-properties.h"
  25. #include "qemu/error-report.h"
  26. #include "migration/vmstate.h"
  27. #ifdef CONFIG_USER_ONLY
  28. #include "qemu.h"
  29. #else
  30. #include "hw/core/sysemu-cpu-ops.h"
  31. #include "exec/address-spaces.h"
  32. #endif
  33. #include "sysemu/tcg.h"
  34. #include "sysemu/kvm.h"
  35. #include "sysemu/replay.h"
  36. #include "exec/translate-all.h"
  37. #include "exec/log.h"
  38. #include "hw/core/accel-cpu.h"
  39. #include "trace/trace-root.h"
  40. uintptr_t qemu_host_page_size;
  41. intptr_t qemu_host_page_mask;
  42. #ifndef CONFIG_USER_ONLY
  43. static int cpu_common_post_load(void *opaque, int version_id)
  44. {
  45. CPUState *cpu = opaque;
  46. /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
  47. version_id is increased. */
  48. cpu->interrupt_request &= ~0x01;
  49. tlb_flush(cpu);
  50. /* loadvm has just updated the content of RAM, bypassing the
  51. * usual mechanisms that ensure we flush TBs for writes to
  52. * memory we've translated code from. So we must flush all TBs,
  53. * which will now be stale.
  54. */
  55. tb_flush(cpu);
  56. return 0;
  57. }
  58. static int cpu_common_pre_load(void *opaque)
  59. {
  60. CPUState *cpu = opaque;
  61. cpu->exception_index = -1;
  62. return 0;
  63. }
  64. static bool cpu_common_exception_index_needed(void *opaque)
  65. {
  66. CPUState *cpu = opaque;
  67. return tcg_enabled() && cpu->exception_index != -1;
  68. }
  69. static const VMStateDescription vmstate_cpu_common_exception_index = {
  70. .name = "cpu_common/exception_index",
  71. .version_id = 1,
  72. .minimum_version_id = 1,
  73. .needed = cpu_common_exception_index_needed,
  74. .fields = (VMStateField[]) {
  75. VMSTATE_INT32(exception_index, CPUState),
  76. VMSTATE_END_OF_LIST()
  77. }
  78. };
  79. static bool cpu_common_crash_occurred_needed(void *opaque)
  80. {
  81. CPUState *cpu = opaque;
  82. return cpu->crash_occurred;
  83. }
  84. static const VMStateDescription vmstate_cpu_common_crash_occurred = {
  85. .name = "cpu_common/crash_occurred",
  86. .version_id = 1,
  87. .minimum_version_id = 1,
  88. .needed = cpu_common_crash_occurred_needed,
  89. .fields = (VMStateField[]) {
  90. VMSTATE_BOOL(crash_occurred, CPUState),
  91. VMSTATE_END_OF_LIST()
  92. }
  93. };
  94. const VMStateDescription vmstate_cpu_common = {
  95. .name = "cpu_common",
  96. .version_id = 1,
  97. .minimum_version_id = 1,
  98. .pre_load = cpu_common_pre_load,
  99. .post_load = cpu_common_post_load,
  100. .fields = (VMStateField[]) {
  101. VMSTATE_UINT32(halted, CPUState),
  102. VMSTATE_UINT32(interrupt_request, CPUState),
  103. VMSTATE_END_OF_LIST()
  104. },
  105. .subsections = (const VMStateDescription*[]) {
  106. &vmstate_cpu_common_exception_index,
  107. &vmstate_cpu_common_crash_occurred,
  108. NULL
  109. }
  110. };
  111. #endif
  112. void cpu_exec_realizefn(CPUState *cpu, Error **errp)
  113. {
  114. #ifndef CONFIG_USER_ONLY
  115. CPUClass *cc = CPU_GET_CLASS(cpu);
  116. #endif
  117. cpu_list_add(cpu);
  118. if (!accel_cpu_realizefn(cpu, errp)) {
  119. return;
  120. }
  121. #ifdef CONFIG_TCG
  122. /* NB: errp parameter is unused currently */
  123. if (tcg_enabled()) {
  124. tcg_exec_realizefn(cpu, errp);
  125. }
  126. #endif /* CONFIG_TCG */
  127. #ifdef CONFIG_USER_ONLY
  128. assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
  129. qdev_get_vmsd(DEVICE(cpu))->unmigratable);
  130. #else
  131. if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
  132. vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
  133. }
  134. if (cc->sysemu_ops->legacy_vmsd != NULL) {
  135. vmstate_register(NULL, cpu->cpu_index, cc->sysemu_ops->legacy_vmsd, cpu);
  136. }
  137. #endif /* CONFIG_USER_ONLY */
  138. }
  139. void cpu_exec_unrealizefn(CPUState *cpu)
  140. {
  141. #ifndef CONFIG_USER_ONLY
  142. CPUClass *cc = CPU_GET_CLASS(cpu);
  143. if (cc->sysemu_ops->legacy_vmsd != NULL) {
  144. vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
  145. }
  146. if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
  147. vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
  148. }
  149. #endif
  150. #ifdef CONFIG_TCG
  151. /* NB: errp parameter is unused currently */
  152. if (tcg_enabled()) {
  153. tcg_exec_unrealizefn(cpu);
  154. }
  155. #endif /* CONFIG_TCG */
  156. cpu_list_remove(cpu);
  157. }
  158. void cpu_exec_initfn(CPUState *cpu)
  159. {
  160. cpu->as = NULL;
  161. cpu->num_ases = 0;
  162. #ifndef CONFIG_USER_ONLY
  163. cpu->thread_id = qemu_get_thread_id();
  164. cpu->memory = get_system_memory();
  165. object_ref(OBJECT(cpu->memory));
  166. #endif
  167. }
  168. const char *parse_cpu_option(const char *cpu_option)
  169. {
  170. ObjectClass *oc;
  171. CPUClass *cc;
  172. gchar **model_pieces;
  173. const char *cpu_type;
  174. model_pieces = g_strsplit(cpu_option, ",", 2);
  175. if (!model_pieces[0]) {
  176. error_report("-cpu option cannot be empty");
  177. exit(1);
  178. }
  179. oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
  180. if (oc == NULL) {
  181. error_report("unable to find CPU model '%s'", model_pieces[0]);
  182. g_strfreev(model_pieces);
  183. exit(EXIT_FAILURE);
  184. }
  185. cpu_type = object_class_get_name(oc);
  186. cc = CPU_CLASS(oc);
  187. cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
  188. g_strfreev(model_pieces);
  189. return cpu_type;
  190. }
  191. #if defined(CONFIG_USER_ONLY)
  192. void tb_invalidate_phys_addr(target_ulong addr)
  193. {
  194. mmap_lock();
  195. tb_invalidate_phys_page_range(addr, addr + 1);
  196. mmap_unlock();
  197. }
  198. #else
  199. void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
  200. {
  201. ram_addr_t ram_addr;
  202. MemoryRegion *mr;
  203. hwaddr l = 1;
  204. if (!tcg_enabled()) {
  205. return;
  206. }
  207. RCU_READ_LOCK_GUARD();
  208. mr = address_space_translate(as, addr, &addr, &l, false, attrs);
  209. if (!(memory_region_is_ram(mr)
  210. || memory_region_is_romd(mr))) {
  211. return;
  212. }
  213. ram_addr = memory_region_get_ram_addr(mr) + addr;
  214. tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
  215. }
  216. #endif
  217. /* Add a breakpoint. */
  218. int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
  219. CPUBreakpoint **breakpoint)
  220. {
  221. CPUClass *cc = CPU_GET_CLASS(cpu);
  222. CPUBreakpoint *bp;
  223. if (cc->gdb_adjust_breakpoint) {
  224. pc = cc->gdb_adjust_breakpoint(cpu, pc);
  225. }
  226. bp = g_malloc(sizeof(*bp));
  227. bp->pc = pc;
  228. bp->flags = flags;
  229. /* keep all GDB-injected breakpoints in front */
  230. if (flags & BP_GDB) {
  231. QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
  232. } else {
  233. QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
  234. }
  235. if (breakpoint) {
  236. *breakpoint = bp;
  237. }
  238. trace_breakpoint_insert(cpu->cpu_index, pc, flags);
  239. return 0;
  240. }
  241. /* Remove a specific breakpoint. */
  242. int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
  243. {
  244. CPUClass *cc = CPU_GET_CLASS(cpu);
  245. CPUBreakpoint *bp;
  246. if (cc->gdb_adjust_breakpoint) {
  247. pc = cc->gdb_adjust_breakpoint(cpu, pc);
  248. }
  249. QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
  250. if (bp->pc == pc && bp->flags == flags) {
  251. cpu_breakpoint_remove_by_ref(cpu, bp);
  252. return 0;
  253. }
  254. }
  255. return -ENOENT;
  256. }
  257. /* Remove a specific breakpoint by reference. */
  258. void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *bp)
  259. {
  260. QTAILQ_REMOVE(&cpu->breakpoints, bp, entry);
  261. trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags);
  262. g_free(bp);
  263. }
  264. /* Remove all matching breakpoints. */
  265. void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
  266. {
  267. CPUBreakpoint *bp, *next;
  268. QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
  269. if (bp->flags & mask) {
  270. cpu_breakpoint_remove_by_ref(cpu, bp);
  271. }
  272. }
  273. }
  274. /* enable or disable single step mode. EXCP_DEBUG is returned by the
  275. CPU loop after each instruction */
  276. void cpu_single_step(CPUState *cpu, int enabled)
  277. {
  278. if (cpu->singlestep_enabled != enabled) {
  279. cpu->singlestep_enabled = enabled;
  280. if (kvm_enabled()) {
  281. kvm_update_guest_debug(cpu, 0);
  282. }
  283. trace_breakpoint_singlestep(cpu->cpu_index, enabled);
  284. }
  285. }
  286. void cpu_abort(CPUState *cpu, const char *fmt, ...)
  287. {
  288. va_list ap;
  289. va_list ap2;
  290. va_start(ap, fmt);
  291. va_copy(ap2, ap);
  292. fprintf(stderr, "qemu: fatal: ");
  293. vfprintf(stderr, fmt, ap);
  294. fprintf(stderr, "\n");
  295. cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
  296. if (qemu_log_separate()) {
  297. FILE *logfile = qemu_log_lock();
  298. qemu_log("qemu: fatal: ");
  299. qemu_log_vprintf(fmt, ap2);
  300. qemu_log("\n");
  301. log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
  302. qemu_log_flush();
  303. qemu_log_unlock(logfile);
  304. qemu_log_close();
  305. }
  306. va_end(ap2);
  307. va_end(ap);
  308. replay_finish();
  309. #if defined(CONFIG_USER_ONLY)
  310. {
  311. struct sigaction act;
  312. sigfillset(&act.sa_mask);
  313. act.sa_handler = SIG_DFL;
  314. act.sa_flags = 0;
  315. sigaction(SIGABRT, &act, NULL);
  316. }
  317. #endif
  318. abort();
  319. }
  320. /* physical memory access (slow version, mainly for debug) */
  321. #if defined(CONFIG_USER_ONLY)
  322. int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
  323. void *ptr, target_ulong len, bool is_write)
  324. {
  325. int flags;
  326. target_ulong l, page;
  327. void * p;
  328. uint8_t *buf = ptr;
  329. while (len > 0) {
  330. page = addr & TARGET_PAGE_MASK;
  331. l = (page + TARGET_PAGE_SIZE) - addr;
  332. if (l > len)
  333. l = len;
  334. flags = page_get_flags(page);
  335. if (!(flags & PAGE_VALID))
  336. return -1;
  337. if (is_write) {
  338. if (!(flags & PAGE_WRITE))
  339. return -1;
  340. /* XXX: this code should not depend on lock_user */
  341. if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
  342. return -1;
  343. memcpy(p, buf, l);
  344. unlock_user(p, addr, l);
  345. } else {
  346. if (!(flags & PAGE_READ))
  347. return -1;
  348. /* XXX: this code should not depend on lock_user */
  349. if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
  350. return -1;
  351. memcpy(buf, p, l);
  352. unlock_user(p, addr, 0);
  353. }
  354. len -= l;
  355. buf += l;
  356. addr += l;
  357. }
  358. return 0;
  359. }
  360. #endif
  361. bool target_words_bigendian(void)
  362. {
  363. #if defined(TARGET_WORDS_BIGENDIAN)
  364. return true;
  365. #else
  366. return false;
  367. #endif
  368. }
  369. void page_size_init(void)
  370. {
  371. /* NOTE: we can always suppose that qemu_host_page_size >=
  372. TARGET_PAGE_SIZE */
  373. if (qemu_host_page_size == 0) {
  374. qemu_host_page_size = qemu_real_host_page_size;
  375. }
  376. if (qemu_host_page_size < TARGET_PAGE_SIZE) {
  377. qemu_host_page_size = TARGET_PAGE_SIZE;
  378. }
  379. qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
  380. }