memory.txt 15 KB

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  1. The memory API
  2. ==============
  3. The memory API models the memory and I/O buses and controllers of a QEMU
  4. machine. It attempts to allow modelling of:
  5. - ordinary RAM
  6. - memory-mapped I/O (MMIO)
  7. - memory controllers that can dynamically reroute physical memory regions
  8. to different destinations
  9. The memory model provides support for
  10. - tracking RAM changes by the guest
  11. - setting up coalesced memory for kvm
  12. - setting up ioeventfd regions for kvm
  13. Memory is modelled as an acyclic graph of MemoryRegion objects. Sinks
  14. (leaves) are RAM and MMIO regions, while other nodes represent
  15. buses, memory controllers, and memory regions that have been rerouted.
  16. In addition to MemoryRegion objects, the memory API provides AddressSpace
  17. objects for every root and possibly for intermediate MemoryRegions too.
  18. These represent memory as seen from the CPU or a device's viewpoint.
  19. Types of regions
  20. ----------------
  21. There are multiple types of memory regions (all represented by a single C type
  22. MemoryRegion):
  23. - RAM: a RAM region is simply a range of host memory that can be made available
  24. to the guest.
  25. You typically initialize these with memory_region_init_ram(). Some special
  26. purposes require the variants memory_region_init_resizeable_ram(),
  27. memory_region_init_ram_from_file(), or memory_region_init_ram_ptr().
  28. - MMIO: a range of guest memory that is implemented by host callbacks;
  29. each read or write causes a callback to be called on the host.
  30. You initialize these with memory_region_init_io(), passing it a
  31. MemoryRegionOps structure describing the callbacks.
  32. - ROM: a ROM memory region works like RAM for reads (directly accessing
  33. a region of host memory), and forbids writes. You initialize these with
  34. memory_region_init_rom().
  35. - ROM device: a ROM device memory region works like RAM for reads
  36. (directly accessing a region of host memory), but like MMIO for
  37. writes (invoking a callback). You initialize these with
  38. memory_region_init_rom_device().
  39. - IOMMU region: an IOMMU region translates addresses of accesses made to it
  40. and forwards them to some other target memory region. As the name suggests,
  41. these are only needed for modelling an IOMMU, not for simple devices.
  42. You initialize these with memory_region_init_iommu().
  43. - container: a container simply includes other memory regions, each at
  44. a different offset. Containers are useful for grouping several regions
  45. into one unit. For example, a PCI BAR may be composed of a RAM region
  46. and an MMIO region.
  47. A container's subregions are usually non-overlapping. In some cases it is
  48. useful to have overlapping regions; for example a memory controller that
  49. can overlay a subregion of RAM with MMIO or ROM, or a PCI controller
  50. that does not prevent card from claiming overlapping BARs.
  51. You initialize a pure container with memory_region_init().
  52. - alias: a subsection of another region. Aliases allow a region to be
  53. split apart into discontiguous regions. Examples of uses are memory banks
  54. used when the guest address space is smaller than the amount of RAM
  55. addressed, or a memory controller that splits main memory to expose a "PCI
  56. hole". Aliases may point to any type of region, including other aliases,
  57. but an alias may not point back to itself, directly or indirectly.
  58. You initialize these with memory_region_init_alias().
  59. - reservation region: a reservation region is primarily for debugging.
  60. It claims I/O space that is not supposed to be handled by QEMU itself.
  61. The typical use is to track parts of the address space which will be
  62. handled by the host kernel when KVM is enabled.
  63. You initialize these with memory_region_init_reservation(), or by
  64. passing a NULL callback parameter to memory_region_init_io().
  65. It is valid to add subregions to a region which is not a pure container
  66. (that is, to an MMIO, RAM or ROM region). This means that the region
  67. will act like a container, except that any addresses within the container's
  68. region which are not claimed by any subregion are handled by the
  69. container itself (ie by its MMIO callbacks or RAM backing). However
  70. it is generally possible to achieve the same effect with a pure container
  71. one of whose subregions is a low priority "background" region covering
  72. the whole address range; this is often clearer and is preferred.
  73. Subregions cannot be added to an alias region.
  74. Region names
  75. ------------
  76. Regions are assigned names by the constructor. For most regions these are
  77. only used for debugging purposes, but RAM regions also use the name to identify
  78. live migration sections. This means that RAM region names need to have ABI
  79. stability.
  80. Region lifecycle
  81. ----------------
  82. A region is created by one of the memory_region_init*() functions and
  83. attached to an object, which acts as its owner or parent. QEMU ensures
  84. that the owner object remains alive as long as the region is visible to
  85. the guest, or as long as the region is in use by a virtual CPU or another
  86. device. For example, the owner object will not die between an
  87. address_space_map operation and the corresponding address_space_unmap.
  88. After creation, a region can be added to an address space or a
  89. container with memory_region_add_subregion(), and removed using
  90. memory_region_del_subregion().
  91. Various region attributes (read-only, dirty logging, coalesced mmio,
  92. ioeventfd) can be changed during the region lifecycle. They take effect
  93. as soon as the region is made visible. This can be immediately, later,
  94. or never.
  95. Destruction of a memory region happens automatically when the owner
  96. object dies.
  97. If however the memory region is part of a dynamically allocated data
  98. structure, you should call object_unparent() to destroy the memory region
  99. before the data structure is freed. For an example see VFIOMSIXInfo
  100. and VFIOQuirk in hw/vfio/pci.c.
  101. You must not destroy a memory region as long as it may be in use by a
  102. device or CPU. In order to do this, as a general rule do not create or
  103. destroy memory regions dynamically during a device's lifetime, and only
  104. call object_unparent() in the memory region owner's instance_finalize
  105. callback. The dynamically allocated data structure that contains the
  106. memory region then should obviously be freed in the instance_finalize
  107. callback as well.
  108. If you break this rule, the following situation can happen:
  109. - the memory region's owner had a reference taken via memory_region_ref
  110. (for example by address_space_map)
  111. - the region is unparented, and has no owner anymore
  112. - when address_space_unmap is called, the reference to the memory region's
  113. owner is leaked.
  114. There is an exception to the above rule: it is okay to call
  115. object_unparent at any time for an alias or a container region. It is
  116. therefore also okay to create or destroy alias and container regions
  117. dynamically during a device's lifetime.
  118. This exceptional usage is valid because aliases and containers only help
  119. QEMU building the guest's memory map; they are never accessed directly.
  120. memory_region_ref and memory_region_unref are never called on aliases
  121. or containers, and the above situation then cannot happen. Exploiting
  122. this exception is rarely necessary, and therefore it is discouraged,
  123. but nevertheless it is used in a few places.
  124. For regions that "have no owner" (NULL is passed at creation time), the
  125. machine object is actually used as the owner. Since instance_finalize is
  126. never called for the machine object, you must never call object_unparent
  127. on regions that have no owner, unless they are aliases or containers.
  128. Overlapping regions and priority
  129. --------------------------------
  130. Usually, regions may not overlap each other; a memory address decodes into
  131. exactly one target. In some cases it is useful to allow regions to overlap,
  132. and sometimes to control which of an overlapping regions is visible to the
  133. guest. This is done with memory_region_add_subregion_overlap(), which
  134. allows the region to overlap any other region in the same container, and
  135. specifies a priority that allows the core to decide which of two regions at
  136. the same address are visible (highest wins).
  137. Priority values are signed, and the default value is zero. This means that
  138. you can use memory_region_add_subregion_overlap() both to specify a region
  139. that must sit 'above' any others (with a positive priority) and also a
  140. background region that sits 'below' others (with a negative priority).
  141. If the higher priority region in an overlap is a container or alias, then
  142. the lower priority region will appear in any "holes" that the higher priority
  143. region has left by not mapping subregions to that area of its address range.
  144. (This applies recursively -- if the subregions are themselves containers or
  145. aliases that leave holes then the lower priority region will appear in these
  146. holes too.)
  147. For example, suppose we have a container A of size 0x8000 with two subregions
  148. B and C. B is a container mapped at 0x2000, size 0x4000, priority 2; C is
  149. an MMIO region mapped at 0x0, size 0x6000, priority 1. B currently has two
  150. of its own subregions: D of size 0x1000 at offset 0 and E of size 0x1000 at
  151. offset 0x2000. As a diagram:
  152. 0 1000 2000 3000 4000 5000 6000 7000 8000
  153. |------|------|------|------|------|------|------|------|
  154. A: [ ]
  155. C: [CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC]
  156. B: [ ]
  157. D: [DDDDD]
  158. E: [EEEEE]
  159. The regions that will be seen within this address range then are:
  160. [CCCCCCCCCCCC][DDDDD][CCCCC][EEEEE][CCCCC]
  161. Since B has higher priority than C, its subregions appear in the flat map
  162. even where they overlap with C. In ranges where B has not mapped anything
  163. C's region appears.
  164. If B had provided its own MMIO operations (ie it was not a pure container)
  165. then these would be used for any addresses in its range not handled by
  166. D or E, and the result would be:
  167. [CCCCCCCCCCCC][DDDDD][BBBBB][EEEEE][BBBBB]
  168. Priority values are local to a container, because the priorities of two
  169. regions are only compared when they are both children of the same container.
  170. This means that the device in charge of the container (typically modelling
  171. a bus or a memory controller) can use them to manage the interaction of
  172. its child regions without any side effects on other parts of the system.
  173. In the example above, the priorities of D and E are unimportant because
  174. they do not overlap each other. It is the relative priority of B and C
  175. that causes D and E to appear on top of C: D and E's priorities are never
  176. compared against the priority of C.
  177. Visibility
  178. ----------
  179. The memory core uses the following rules to select a memory region when the
  180. guest accesses an address:
  181. - all direct subregions of the root region are matched against the address, in
  182. descending priority order
  183. - if the address lies outside the region offset/size, the subregion is
  184. discarded
  185. - if the subregion is a leaf (RAM or MMIO), the search terminates, returning
  186. this leaf region
  187. - if the subregion is a container, the same algorithm is used within the
  188. subregion (after the address is adjusted by the subregion offset)
  189. - if the subregion is an alias, the search is continued at the alias target
  190. (after the address is adjusted by the subregion offset and alias offset)
  191. - if a recursive search within a container or alias subregion does not
  192. find a match (because of a "hole" in the container's coverage of its
  193. address range), then if this is a container with its own MMIO or RAM
  194. backing the search terminates, returning the container itself. Otherwise
  195. we continue with the next subregion in priority order
  196. - if none of the subregions match the address then the search terminates
  197. with no match found
  198. Example memory map
  199. ------------------
  200. system_memory: container@0-2^48-1
  201. |
  202. +---- lomem: alias@0-0xdfffffff ---> #ram (0-0xdfffffff)
  203. |
  204. +---- himem: alias@0x100000000-0x11fffffff ---> #ram (0xe0000000-0xffffffff)
  205. |
  206. +---- vga-window: alias@0xa0000-0xbffff ---> #pci (0xa0000-0xbffff)
  207. | (prio 1)
  208. |
  209. +---- pci-hole: alias@0xe0000000-0xffffffff ---> #pci (0xe0000000-0xffffffff)
  210. pci (0-2^32-1)
  211. |
  212. +--- vga-area: container@0xa0000-0xbffff
  213. | |
  214. | +--- alias@0x00000-0x7fff ---> #vram (0x010000-0x017fff)
  215. | |
  216. | +--- alias@0x08000-0xffff ---> #vram (0x020000-0x027fff)
  217. |
  218. +---- vram: ram@0xe1000000-0xe1ffffff
  219. |
  220. +---- vga-mmio: mmio@0xe2000000-0xe200ffff
  221. ram: ram@0x00000000-0xffffffff
  222. This is a (simplified) PC memory map. The 4GB RAM block is mapped into the
  223. system address space via two aliases: "lomem" is a 1:1 mapping of the first
  224. 3.5GB; "himem" maps the last 0.5GB at address 4GB. This leaves 0.5GB for the
  225. so-called PCI hole, that allows a 32-bit PCI bus to exist in a system with
  226. 4GB of memory.
  227. The memory controller diverts addresses in the range 640K-768K to the PCI
  228. address space. This is modelled using the "vga-window" alias, mapped at a
  229. higher priority so it obscures the RAM at the same addresses. The vga window
  230. can be removed by programming the memory controller; this is modelled by
  231. removing the alias and exposing the RAM underneath.
  232. The pci address space is not a direct child of the system address space, since
  233. we only want parts of it to be visible (we accomplish this using aliases).
  234. It has two subregions: vga-area models the legacy vga window and is occupied
  235. by two 32K memory banks pointing at two sections of the framebuffer.
  236. In addition the vram is mapped as a BAR at address e1000000, and an additional
  237. BAR containing MMIO registers is mapped after it.
  238. Note that if the guest maps a BAR outside the PCI hole, it would not be
  239. visible as the pci-hole alias clips it to a 0.5GB range.
  240. MMIO Operations
  241. ---------------
  242. MMIO regions are provided with ->read() and ->write() callbacks; in addition
  243. various constraints can be supplied to control how these callbacks are called:
  244. - .valid.min_access_size, .valid.max_access_size define the access sizes
  245. (in bytes) which the device accepts; accesses outside this range will
  246. have device and bus specific behaviour (ignored, or machine check)
  247. - .valid.unaligned specifies that the *device being modelled* supports
  248. unaligned accesses; if false, unaligned accesses will invoke the
  249. appropriate bus or CPU specific behaviour.
  250. - .impl.min_access_size, .impl.max_access_size define the access sizes
  251. (in bytes) supported by the *implementation*; other access sizes will be
  252. emulated using the ones available. For example a 4-byte write will be
  253. emulated using four 1-byte writes, if .impl.max_access_size = 1.
  254. - .impl.unaligned specifies that the *implementation* supports unaligned
  255. accesses; if false, unaligned accesses will be emulated by two aligned
  256. accesses.
  257. - .old_mmio eases the porting of code that was formerly using
  258. cpu_register_io_memory(). It should not be used in new code.