omap_l4.c 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164
  1. /*
  2. * TI OMAP L4 interconnect emulation.
  3. *
  4. * Copyright (C) 2007-2009 Nokia Corporation
  5. * Written by Andrzej Zaborowski <andrew@openedhand.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 or
  10. * (at your option) any later version of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "qemu/osdep.h"
  21. #include "hw/hw.h"
  22. #include "hw/arm/omap.h"
  23. struct omap_l4_s {
  24. MemoryRegion *address_space;
  25. hwaddr base;
  26. int ta_num;
  27. struct omap_target_agent_s ta[0];
  28. };
  29. struct omap_l4_s *omap_l4_init(MemoryRegion *address_space,
  30. hwaddr base, int ta_num)
  31. {
  32. struct omap_l4_s *bus = g_malloc0(
  33. sizeof(*bus) + ta_num * sizeof(*bus->ta));
  34. bus->address_space = address_space;
  35. bus->ta_num = ta_num;
  36. bus->base = base;
  37. return bus;
  38. }
  39. hwaddr omap_l4_region_base(struct omap_target_agent_s *ta,
  40. int region)
  41. {
  42. return ta->bus->base + ta->start[region].offset;
  43. }
  44. hwaddr omap_l4_region_size(struct omap_target_agent_s *ta,
  45. int region)
  46. {
  47. return ta->start[region].size;
  48. }
  49. static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
  50. unsigned size)
  51. {
  52. struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
  53. if (size != 2) {
  54. return omap_badwidth_read16(opaque, addr);
  55. }
  56. switch (addr) {
  57. case 0x00: /* COMPONENT */
  58. return s->component;
  59. case 0x20: /* AGENT_CONTROL */
  60. return s->control;
  61. case 0x28: /* AGENT_STATUS */
  62. return s->status;
  63. }
  64. OMAP_BAD_REG(addr);
  65. return 0;
  66. }
  67. static void omap_l4ta_write(void *opaque, hwaddr addr,
  68. uint64_t value, unsigned size)
  69. {
  70. struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
  71. if (size != 4) {
  72. omap_badwidth_write32(opaque, addr, value);
  73. return;
  74. }
  75. switch (addr) {
  76. case 0x00: /* COMPONENT */
  77. case 0x28: /* AGENT_STATUS */
  78. OMAP_RO_REG(addr);
  79. break;
  80. case 0x20: /* AGENT_CONTROL */
  81. s->control = value & 0x01000700;
  82. if (value & 1) /* OCP_RESET */
  83. s->status &= ~1; /* REQ_TIMEOUT */
  84. break;
  85. default:
  86. OMAP_BAD_REG(addr);
  87. }
  88. }
  89. static const MemoryRegionOps omap_l4ta_ops = {
  90. .read = omap_l4ta_read,
  91. .write = omap_l4ta_write,
  92. .endianness = DEVICE_NATIVE_ENDIAN,
  93. };
  94. struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
  95. const struct omap_l4_region_s *regions,
  96. const struct omap_l4_agent_info_s *agents,
  97. int cs)
  98. {
  99. int i;
  100. struct omap_target_agent_s *ta = NULL;
  101. const struct omap_l4_agent_info_s *info = NULL;
  102. for (i = 0; i < bus->ta_num; i ++)
  103. if (agents[i].ta == cs) {
  104. ta = &bus->ta[i];
  105. info = &agents[i];
  106. break;
  107. }
  108. if (!ta) {
  109. fprintf(stderr, "%s: bad target agent (%i)\n", __func__, cs);
  110. exit(-1);
  111. }
  112. ta->bus = bus;
  113. ta->start = &regions[info->region];
  114. ta->regions = info->regions;
  115. ta->component = ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
  116. ta->status = 0x00000000;
  117. ta->control = 0x00000200; /* XXX 01000200 for L4TAO */
  118. memory_region_init_io(&ta->iomem, NULL, &omap_l4ta_ops, ta, "omap.l4ta",
  119. omap_l4_region_size(ta, info->ta_region));
  120. omap_l4_attach(ta, info->ta_region, &ta->iomem);
  121. return ta;
  122. }
  123. hwaddr omap_l4_attach(struct omap_target_agent_s *ta,
  124. int region, MemoryRegion *mr)
  125. {
  126. hwaddr base;
  127. if (region < 0 || region >= ta->regions) {
  128. fprintf(stderr, "%s: bad io region (%i)\n", __func__, region);
  129. exit(-1);
  130. }
  131. base = ta->bus->base + ta->start[region].offset;
  132. if (mr) {
  133. memory_region_add_subregion(ta->bus->address_space, base, mr);
  134. }
  135. return base;
  136. }