pcie_port.h 2.8 KB

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  1. /*
  2. * pcie_port.h
  3. *
  4. * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
  5. * VA Linux Systems Japan K.K.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #ifndef QEMU_PCIE_PORT_H
  21. #define QEMU_PCIE_PORT_H
  22. #include "hw/pci/pci_bridge.h"
  23. #include "hw/pci/pci_bus.h"
  24. #include "hw/pci/pci_device.h"
  25. #include "qom/object.h"
  26. #define TYPE_PCIE_PORT "pcie-port"
  27. OBJECT_DECLARE_SIMPLE_TYPE(PCIEPort, PCIE_PORT)
  28. struct PCIEPort {
  29. /*< private >*/
  30. PCIBridge parent_obj;
  31. /*< public >*/
  32. /* pci express switch port */
  33. uint8_t port;
  34. };
  35. void pcie_port_init_reg(PCIDevice *d);
  36. PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn);
  37. PCIDevice *pcie_find_port_first(PCIBus *bus);
  38. int pcie_count_ds_ports(PCIBus *bus);
  39. #define TYPE_PCIE_SLOT "pcie-slot"
  40. OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT)
  41. struct PCIESlot {
  42. /*< private >*/
  43. PCIEPort parent_obj;
  44. /*< public >*/
  45. /* pci express switch port with slot */
  46. uint8_t chassis;
  47. uint16_t slot;
  48. PCIExpLinkSpeed speed;
  49. PCIExpLinkWidth width;
  50. /* Disable ACS (really for a pcie_root_port) */
  51. bool disable_acs;
  52. /* Indicates whether any type of hot-plug is allowed on the slot */
  53. bool hotplug;
  54. /* broken ACPI hotplug compat knob to preserve 6.1 ABI intact */
  55. bool hide_native_hotplug_cap;
  56. QLIST_ENTRY(PCIESlot) next;
  57. };
  58. void pcie_chassis_create(uint8_t chassis_number);
  59. int pcie_chassis_add_slot(struct PCIESlot *slot);
  60. void pcie_chassis_del_slot(PCIESlot *s);
  61. #define TYPE_PCIE_ROOT_PORT "pcie-root-port-base"
  62. typedef struct PCIERootPortClass PCIERootPortClass;
  63. DECLARE_CLASS_CHECKERS(PCIERootPortClass, PCIE_ROOT_PORT,
  64. TYPE_PCIE_ROOT_PORT)
  65. struct PCIERootPortClass {
  66. PCIDeviceClass parent_class;
  67. DeviceRealize parent_realize;
  68. ResettablePhases parent_phases;
  69. uint8_t (*aer_vector)(const PCIDevice *dev);
  70. int (*interrupts_init)(PCIDevice *dev, Error **errp);
  71. void (*interrupts_uninit)(PCIDevice *dev);
  72. int exp_offset;
  73. int aer_offset;
  74. int ssvid_offset;
  75. int acs_offset; /* If nonzero, optional ACS capability offset */
  76. int ssid;
  77. };
  78. #endif /* QEMU_PCIE_PORT_H */