macio.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140
  1. /*
  2. * PowerMac MacIO device emulation
  3. *
  4. * Copyright (c) 2005-2007 Fabrice Bellard
  5. * Copyright (c) 2007 Jocelyn Mayer
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy
  8. * of this software and associated documentation files (the "Software"), to deal
  9. * in the Software without restriction, including without limitation the rights
  10. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11. * copies of the Software, and to permit persons to whom the Software is
  12. * furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23. * THE SOFTWARE.
  24. */
  25. #include "hw.h"
  26. #include "ppc_mac.h"
  27. #include "pci/pci.h"
  28. #include "escc.h"
  29. typedef struct MacIOState
  30. {
  31. PCIDevice parent;
  32. int is_oldworld;
  33. MemoryRegion bar;
  34. MemoryRegion *pic_mem;
  35. MemoryRegion *dbdma_mem;
  36. MemoryRegion *cuda_mem;
  37. MemoryRegion *escc_mem;
  38. void *nvram;
  39. int nb_ide;
  40. MemoryRegion *ide_mem[4];
  41. } MacIOState;
  42. static void macio_bar_setup(MacIOState *macio_state)
  43. {
  44. int i;
  45. MemoryRegion *bar = &macio_state->bar;
  46. memory_region_init(bar, "macio", 0x80000);
  47. if (macio_state->pic_mem) {
  48. if (macio_state->is_oldworld) {
  49. /* Heathrow PIC */
  50. memory_region_add_subregion(bar, 0x00000, macio_state->pic_mem);
  51. } else {
  52. /* OpenPIC */
  53. memory_region_add_subregion(bar, 0x40000, macio_state->pic_mem);
  54. }
  55. }
  56. if (macio_state->dbdma_mem) {
  57. memory_region_add_subregion(bar, 0x08000, macio_state->dbdma_mem);
  58. }
  59. if (macio_state->escc_mem) {
  60. memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
  61. }
  62. if (macio_state->cuda_mem) {
  63. memory_region_add_subregion(bar, 0x16000, macio_state->cuda_mem);
  64. }
  65. for (i = 0; i < macio_state->nb_ide; i++) {
  66. if (macio_state->ide_mem[i]) {
  67. memory_region_add_subregion(bar, 0x1f000 + (i * 0x1000),
  68. macio_state->ide_mem[i]);
  69. }
  70. }
  71. if (macio_state->nvram != NULL)
  72. macio_nvram_setup_bar(macio_state->nvram, bar, 0x60000);
  73. }
  74. static int macio_initfn(PCIDevice *d)
  75. {
  76. d->config[0x3d] = 0x01; // interrupt on pin 1
  77. return 0;
  78. }
  79. static void macio_class_init(ObjectClass *klass, void *data)
  80. {
  81. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  82. k->init = macio_initfn;
  83. k->vendor_id = PCI_VENDOR_ID_APPLE;
  84. k->class_id = PCI_CLASS_OTHERS << 8;
  85. }
  86. static TypeInfo macio_info = {
  87. .name = "macio",
  88. .parent = TYPE_PCI_DEVICE,
  89. .instance_size = sizeof(MacIOState),
  90. .class_init = macio_class_init,
  91. };
  92. static void macio_register_types(void)
  93. {
  94. type_register_static(&macio_info);
  95. }
  96. type_init(macio_register_types)
  97. void macio_init (PCIBus *bus, int device_id, int is_oldworld,
  98. MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
  99. MemoryRegion *cuda_mem, void *nvram,
  100. int nb_ide, MemoryRegion **ide_mem,
  101. MemoryRegion *escc_mem)
  102. {
  103. PCIDevice *d;
  104. MacIOState *macio_state;
  105. int i;
  106. d = pci_create_simple(bus, -1, "macio");
  107. macio_state = DO_UPCAST(MacIOState, parent, d);
  108. macio_state->is_oldworld = is_oldworld;
  109. macio_state->pic_mem = pic_mem;
  110. macio_state->dbdma_mem = dbdma_mem;
  111. macio_state->cuda_mem = cuda_mem;
  112. macio_state->escc_mem = escc_mem;
  113. macio_state->nvram = nvram;
  114. if (nb_ide > 4)
  115. nb_ide = 4;
  116. macio_state->nb_ide = nb_ide;
  117. for (i = 0; i < nb_ide; i++)
  118. macio_state->ide_mem[i] = ide_mem[i];
  119. for (; i < 4; i++)
  120. macio_state->ide_mem[i] = NULL;
  121. /* Note: this code is strongly inspirated from the corresponding code
  122. in PearPC */
  123. pci_config_set_device_id(d->config, device_id);
  124. macio_bar_setup(macio_state);
  125. pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &macio_state->bar);
  126. }