pci-testdev.c 8.9 KB

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  1. /*
  2. * QEMU PCI test device
  3. *
  4. * Copyright (c) 2012 Red Hat Inc.
  5. * Author: Michael S. Tsirkin <mst@redhat.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "qemu/osdep.h"
  21. #include "hw/hw.h"
  22. #include "hw/pci/pci.h"
  23. #include "qemu/event_notifier.h"
  24. typedef struct PCITestDevHdr {
  25. uint8_t test;
  26. uint8_t width;
  27. uint8_t pad0[2];
  28. uint32_t offset;
  29. uint8_t data;
  30. uint8_t pad1[3];
  31. uint32_t count;
  32. uint8_t name[];
  33. } PCITestDevHdr;
  34. typedef struct IOTest {
  35. MemoryRegion *mr;
  36. EventNotifier notifier;
  37. bool hasnotifier;
  38. unsigned size;
  39. bool match_data;
  40. PCITestDevHdr *hdr;
  41. unsigned bufsize;
  42. } IOTest;
  43. #define IOTEST_DATAMATCH 0xFA
  44. #define IOTEST_NOMATCH 0xCE
  45. #define IOTEST_IOSIZE 128
  46. #define IOTEST_MEMSIZE 2048
  47. static const char *iotest_test[] = {
  48. "no-eventfd",
  49. "wildcard-eventfd",
  50. "datamatch-eventfd"
  51. };
  52. static const char *iotest_type[] = {
  53. "mmio",
  54. "portio"
  55. };
  56. #define IOTEST_TEST(i) (iotest_test[((i) % ARRAY_SIZE(iotest_test))])
  57. #define IOTEST_TYPE(i) (iotest_type[((i) / ARRAY_SIZE(iotest_test))])
  58. #define IOTEST_MAX_TEST (ARRAY_SIZE(iotest_test))
  59. #define IOTEST_MAX_TYPE (ARRAY_SIZE(iotest_type))
  60. #define IOTEST_MAX (IOTEST_MAX_TEST * IOTEST_MAX_TYPE)
  61. enum {
  62. IOTEST_ACCESS_NAME,
  63. IOTEST_ACCESS_DATA,
  64. IOTEST_ACCESS_MAX,
  65. };
  66. #define IOTEST_ACCESS_TYPE uint8_t
  67. #define IOTEST_ACCESS_WIDTH (sizeof(uint8_t))
  68. typedef struct PCITestDevState {
  69. /*< private >*/
  70. PCIDevice parent_obj;
  71. /*< public >*/
  72. MemoryRegion mmio;
  73. MemoryRegion portio;
  74. IOTest *tests;
  75. int current;
  76. } PCITestDevState;
  77. #define TYPE_PCI_TEST_DEV "pci-testdev"
  78. #define PCI_TEST_DEV(obj) \
  79. OBJECT_CHECK(PCITestDevState, (obj), TYPE_PCI_TEST_DEV)
  80. #define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio"))
  81. #define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ? &(d)->mmio : &(d)->portio)
  82. #define IOTEST_SIZE(i) (IOTEST_IS_MEM(i) ? IOTEST_MEMSIZE : IOTEST_IOSIZE)
  83. #define IOTEST_PCI_BAR(i) (IOTEST_IS_MEM(i) ? PCI_BASE_ADDRESS_SPACE_MEMORY : \
  84. PCI_BASE_ADDRESS_SPACE_IO)
  85. static int pci_testdev_start(IOTest *test)
  86. {
  87. test->hdr->count = 0;
  88. if (!test->hasnotifier) {
  89. return 0;
  90. }
  91. event_notifier_test_and_clear(&test->notifier);
  92. memory_region_add_eventfd(test->mr,
  93. le32_to_cpu(test->hdr->offset),
  94. test->size,
  95. test->match_data,
  96. test->hdr->data,
  97. &test->notifier);
  98. return 0;
  99. }
  100. static void pci_testdev_stop(IOTest *test)
  101. {
  102. if (!test->hasnotifier) {
  103. return;
  104. }
  105. memory_region_del_eventfd(test->mr,
  106. le32_to_cpu(test->hdr->offset),
  107. test->size,
  108. test->match_data,
  109. test->hdr->data,
  110. &test->notifier);
  111. }
  112. static void
  113. pci_testdev_reset(PCITestDevState *d)
  114. {
  115. if (d->current == -1) {
  116. return;
  117. }
  118. pci_testdev_stop(&d->tests[d->current]);
  119. d->current = -1;
  120. }
  121. static void pci_testdev_inc(IOTest *test, unsigned inc)
  122. {
  123. uint32_t c = le32_to_cpu(test->hdr->count);
  124. test->hdr->count = cpu_to_le32(c + inc);
  125. }
  126. static void
  127. pci_testdev_write(void *opaque, hwaddr addr, uint64_t val,
  128. unsigned size, int type)
  129. {
  130. PCITestDevState *d = opaque;
  131. IOTest *test;
  132. int t, r;
  133. if (addr == offsetof(PCITestDevHdr, test)) {
  134. pci_testdev_reset(d);
  135. if (val >= IOTEST_MAX_TEST) {
  136. return;
  137. }
  138. t = type * IOTEST_MAX_TEST + val;
  139. r = pci_testdev_start(&d->tests[t]);
  140. if (r < 0) {
  141. return;
  142. }
  143. d->current = t;
  144. return;
  145. }
  146. if (d->current < 0) {
  147. return;
  148. }
  149. test = &d->tests[d->current];
  150. if (addr != le32_to_cpu(test->hdr->offset)) {
  151. return;
  152. }
  153. if (test->match_data && test->size != size) {
  154. return;
  155. }
  156. if (test->match_data && val != test->hdr->data) {
  157. return;
  158. }
  159. pci_testdev_inc(test, 1);
  160. }
  161. static uint64_t
  162. pci_testdev_read(void *opaque, hwaddr addr, unsigned size)
  163. {
  164. PCITestDevState *d = opaque;
  165. const char *buf;
  166. IOTest *test;
  167. if (d->current < 0) {
  168. return 0;
  169. }
  170. test = &d->tests[d->current];
  171. buf = (const char *)test->hdr;
  172. if (addr + size >= test->bufsize) {
  173. return 0;
  174. }
  175. if (test->hasnotifier) {
  176. event_notifier_test_and_clear(&test->notifier);
  177. }
  178. return buf[addr];
  179. }
  180. static void
  181. pci_testdev_mmio_write(void *opaque, hwaddr addr, uint64_t val,
  182. unsigned size)
  183. {
  184. pci_testdev_write(opaque, addr, val, size, 0);
  185. }
  186. static void
  187. pci_testdev_pio_write(void *opaque, hwaddr addr, uint64_t val,
  188. unsigned size)
  189. {
  190. pci_testdev_write(opaque, addr, val, size, 1);
  191. }
  192. static const MemoryRegionOps pci_testdev_mmio_ops = {
  193. .read = pci_testdev_read,
  194. .write = pci_testdev_mmio_write,
  195. .endianness = DEVICE_LITTLE_ENDIAN,
  196. .impl = {
  197. .min_access_size = 1,
  198. .max_access_size = 1,
  199. },
  200. };
  201. static const MemoryRegionOps pci_testdev_pio_ops = {
  202. .read = pci_testdev_read,
  203. .write = pci_testdev_pio_write,
  204. .endianness = DEVICE_LITTLE_ENDIAN,
  205. .impl = {
  206. .min_access_size = 1,
  207. .max_access_size = 1,
  208. },
  209. };
  210. static void pci_testdev_realize(PCIDevice *pci_dev, Error **errp)
  211. {
  212. PCITestDevState *d = PCI_TEST_DEV(pci_dev);
  213. uint8_t *pci_conf;
  214. char *name;
  215. int r, i;
  216. pci_conf = pci_dev->config;
  217. pci_conf[PCI_INTERRUPT_PIN] = 0; /* no interrupt pin */
  218. memory_region_init_io(&d->mmio, OBJECT(d), &pci_testdev_mmio_ops, d,
  219. "pci-testdev-mmio", IOTEST_MEMSIZE * 2);
  220. memory_region_init_io(&d->portio, OBJECT(d), &pci_testdev_pio_ops, d,
  221. "pci-testdev-portio", IOTEST_IOSIZE * 2);
  222. pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
  223. pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
  224. d->current = -1;
  225. d->tests = g_malloc0(IOTEST_MAX * sizeof *d->tests);
  226. for (i = 0; i < IOTEST_MAX; ++i) {
  227. IOTest *test = &d->tests[i];
  228. name = g_strdup_printf("%s-%s", IOTEST_TYPE(i), IOTEST_TEST(i));
  229. test->bufsize = sizeof(PCITestDevHdr) + strlen(name) + 1;
  230. test->hdr = g_malloc0(test->bufsize);
  231. memcpy(test->hdr->name, name, strlen(name) + 1);
  232. g_free(name);
  233. test->hdr->offset = cpu_to_le32(IOTEST_SIZE(i) + i * IOTEST_ACCESS_WIDTH);
  234. test->size = IOTEST_ACCESS_WIDTH;
  235. test->match_data = strcmp(IOTEST_TEST(i), "wildcard-eventfd");
  236. test->hdr->test = i;
  237. test->hdr->data = test->match_data ? IOTEST_DATAMATCH : IOTEST_NOMATCH;
  238. test->hdr->width = IOTEST_ACCESS_WIDTH;
  239. test->mr = IOTEST_REGION(d, i);
  240. if (!strcmp(IOTEST_TEST(i), "no-eventfd")) {
  241. test->hasnotifier = false;
  242. continue;
  243. }
  244. r = event_notifier_init(&test->notifier, 0);
  245. assert(r >= 0);
  246. test->hasnotifier = true;
  247. }
  248. }
  249. static void
  250. pci_testdev_uninit(PCIDevice *dev)
  251. {
  252. PCITestDevState *d = PCI_TEST_DEV(dev);
  253. int i;
  254. pci_testdev_reset(d);
  255. for (i = 0; i < IOTEST_MAX; ++i) {
  256. if (d->tests[i].hasnotifier) {
  257. event_notifier_cleanup(&d->tests[i].notifier);
  258. }
  259. g_free(d->tests[i].hdr);
  260. }
  261. g_free(d->tests);
  262. }
  263. static void qdev_pci_testdev_reset(DeviceState *dev)
  264. {
  265. PCITestDevState *d = PCI_TEST_DEV(dev);
  266. pci_testdev_reset(d);
  267. }
  268. static void pci_testdev_class_init(ObjectClass *klass, void *data)
  269. {
  270. DeviceClass *dc = DEVICE_CLASS(klass);
  271. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  272. k->realize = pci_testdev_realize;
  273. k->exit = pci_testdev_uninit;
  274. k->vendor_id = PCI_VENDOR_ID_REDHAT;
  275. k->device_id = PCI_DEVICE_ID_REDHAT_TEST;
  276. k->revision = 0x00;
  277. k->class_id = PCI_CLASS_OTHERS;
  278. dc->desc = "PCI Test Device";
  279. set_bit(DEVICE_CATEGORY_MISC, dc->categories);
  280. dc->reset = qdev_pci_testdev_reset;
  281. }
  282. static const TypeInfo pci_testdev_info = {
  283. .name = TYPE_PCI_TEST_DEV,
  284. .parent = TYPE_PCI_DEVICE,
  285. .instance_size = sizeof(PCITestDevState),
  286. .class_init = pci_testdev_class_init,
  287. };
  288. static void pci_testdev_register_types(void)
  289. {
  290. type_register_static(&pci_testdev_info);
  291. }
  292. type_init(pci_testdev_register_types)