cpu.h 31 KB

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  1. /*
  2. * QEMU CPU model
  3. *
  4. * Copyright (c) 2012 SUSE LINUX Products GmbH
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, see
  18. * <http://www.gnu.org/licenses/gpl-2.0.html>
  19. */
  20. #ifndef QEMU_CPU_H
  21. #define QEMU_CPU_H
  22. #include "hw/qdev-core.h"
  23. #include "disas/dis-asm.h"
  24. #include "exec/cpu-common.h"
  25. #include "exec/hwaddr.h"
  26. #include "exec/memattrs.h"
  27. #include "qapi/qapi-types-run-state.h"
  28. #include "qemu/bitmap.h"
  29. #include "qemu/rcu_queue.h"
  30. #include "qemu/queue.h"
  31. #include "qemu/thread.h"
  32. #include "qemu/plugin-event.h"
  33. #include "qom/object.h"
  34. typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  35. void *opaque);
  36. /**
  37. * SECTION:cpu
  38. * @section_id: QEMU-cpu
  39. * @title: CPU Class
  40. * @short_description: Base class for all CPUs
  41. */
  42. #define TYPE_CPU "cpu"
  43. /* Since this macro is used a lot in hot code paths and in conjunction with
  44. * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
  45. * an unchecked cast.
  46. */
  47. #define CPU(obj) ((CPUState *)(obj))
  48. /*
  49. * The class checkers bring in CPU_GET_CLASS() which is potentially
  50. * expensive given the eventual call to
  51. * object_class_dynamic_cast_assert(). Because of this the CPUState
  52. * has a cached value for the class in cs->cc which is set up in
  53. * cpu_exec_realizefn() for use in hot code paths.
  54. */
  55. typedef struct CPUClass CPUClass;
  56. DECLARE_CLASS_CHECKERS(CPUClass, CPU,
  57. TYPE_CPU)
  58. /**
  59. * OBJECT_DECLARE_CPU_TYPE:
  60. * @CpuInstanceType: instance struct name
  61. * @CpuClassType: class struct name
  62. * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
  63. *
  64. * This macro is typically used in "cpu-qom.h" header file, and will:
  65. *
  66. * - create the typedefs for the CPU object and class structs
  67. * - register the type for use with g_autoptr
  68. * - provide three standard type cast functions
  69. *
  70. * The object struct and class struct need to be declared manually.
  71. */
  72. #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
  73. typedef struct ArchCPU CpuInstanceType; \
  74. OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
  75. typedef enum MMUAccessType {
  76. MMU_DATA_LOAD = 0,
  77. MMU_DATA_STORE = 1,
  78. MMU_INST_FETCH = 2
  79. } MMUAccessType;
  80. typedef struct CPUWatchpoint CPUWatchpoint;
  81. /* see tcg-cpu-ops.h */
  82. struct TCGCPUOps;
  83. /* see accel-cpu.h */
  84. struct AccelCPUClass;
  85. /* see sysemu-cpu-ops.h */
  86. struct SysemuCPUOps;
  87. /**
  88. * CPUClass:
  89. * @class_by_name: Callback to map -cpu command line model name to an
  90. * instantiatable CPU type.
  91. * @parse_features: Callback to parse command line arguments.
  92. * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  93. * @has_work: Callback for checking if there is work to do.
  94. * @memory_rw_debug: Callback for GDB memory access.
  95. * @dump_state: Callback for dumping state.
  96. * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  97. * @set_pc: Callback for setting the Program Counter register. This
  98. * should have the semantics used by the target architecture when
  99. * setting the PC from a source such as an ELF file entry point;
  100. * for example on Arm it will also set the Thumb mode bit based
  101. * on the least significant bit of the new PC value.
  102. * If the target behaviour here is anything other than "set
  103. * the PC register to the value passed in" then the target must
  104. * also implement the synchronize_from_tb hook.
  105. * @get_pc: Callback for getting the Program Counter register.
  106. * As above, with the semantics of the target architecture.
  107. * @gdb_read_register: Callback for letting GDB read a register.
  108. * @gdb_write_register: Callback for letting GDB write a register.
  109. * @gdb_adjust_breakpoint: Callback for adjusting the address of a
  110. * breakpoint. Used by AVR to handle a gdb mis-feature with
  111. * its Harvard architecture split code and data.
  112. * @gdb_num_core_regs: Number of core registers accessible to GDB.
  113. * @gdb_core_xml_file: File name for core registers GDB XML description.
  114. * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
  115. * before the insn which triggers a watchpoint rather than after it.
  116. * @gdb_arch_name: Optional callback that returns the architecture name known
  117. * to GDB. The caller must free the returned string with g_free.
  118. * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
  119. * gdb stub. Returns a pointer to the XML contents for the specified XML file
  120. * or NULL if the CPU doesn't have a dynamically generated content for it.
  121. * @disas_set_info: Setup architecture specific components of disassembly info
  122. * @adjust_watchpoint_address: Perform a target-specific adjustment to an
  123. * address before attempting to match it against watchpoints.
  124. * @deprecation_note: If this CPUClass is deprecated, this field provides
  125. * related information.
  126. *
  127. * Represents a CPU family or model.
  128. */
  129. struct CPUClass {
  130. /*< private >*/
  131. DeviceClass parent_class;
  132. /*< public >*/
  133. ObjectClass *(*class_by_name)(const char *cpu_model);
  134. void (*parse_features)(const char *typename, char *str, Error **errp);
  135. bool (*has_work)(CPUState *cpu);
  136. int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
  137. uint8_t *buf, int len, bool is_write);
  138. void (*dump_state)(CPUState *cpu, FILE *, int flags);
  139. int64_t (*get_arch_id)(CPUState *cpu);
  140. void (*set_pc)(CPUState *cpu, vaddr value);
  141. vaddr (*get_pc)(CPUState *cpu);
  142. int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
  143. int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
  144. vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
  145. const char *gdb_core_xml_file;
  146. gchar * (*gdb_arch_name)(CPUState *cpu);
  147. const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
  148. void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
  149. const char *deprecation_note;
  150. struct AccelCPUClass *accel_cpu;
  151. /* when system emulation is not available, this pointer is NULL */
  152. const struct SysemuCPUOps *sysemu_ops;
  153. /* when TCG is not available, this pointer is NULL */
  154. const struct TCGCPUOps *tcg_ops;
  155. /*
  156. * if not NULL, this is called in order for the CPUClass to initialize
  157. * class data that depends on the accelerator, see accel/accel-common.c.
  158. */
  159. void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc);
  160. /*
  161. * Keep non-pointer data at the end to minimize holes.
  162. */
  163. int reset_dump_flags;
  164. int gdb_num_core_regs;
  165. bool gdb_stop_before_watchpoint;
  166. };
  167. /*
  168. * Low 16 bits: number of cycles left, used only in icount mode.
  169. * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
  170. * for this CPU and return to its top level loop (even in non-icount mode).
  171. * This allows a single read-compare-cbranch-write sequence to test
  172. * for both decrementer underflow and exceptions.
  173. */
  174. typedef union IcountDecr {
  175. uint32_t u32;
  176. struct {
  177. #if HOST_BIG_ENDIAN
  178. uint16_t high;
  179. uint16_t low;
  180. #else
  181. uint16_t low;
  182. uint16_t high;
  183. #endif
  184. } u16;
  185. } IcountDecr;
  186. typedef struct CPUBreakpoint {
  187. vaddr pc;
  188. int flags; /* BP_* */
  189. QTAILQ_ENTRY(CPUBreakpoint) entry;
  190. } CPUBreakpoint;
  191. struct CPUWatchpoint {
  192. vaddr vaddr;
  193. vaddr len;
  194. vaddr hitaddr;
  195. MemTxAttrs hitattrs;
  196. int flags; /* BP_* */
  197. QTAILQ_ENTRY(CPUWatchpoint) entry;
  198. };
  199. #ifdef CONFIG_PLUGIN
  200. /*
  201. * For plugins we sometime need to save the resolved iotlb data before
  202. * the memory regions get moved around by io_writex.
  203. */
  204. typedef struct SavedIOTLB {
  205. MemoryRegionSection *section;
  206. hwaddr mr_offset;
  207. } SavedIOTLB;
  208. #endif
  209. struct KVMState;
  210. struct kvm_run;
  211. struct hax_vcpu_state;
  212. struct hvf_vcpu_state;
  213. /* work queue */
  214. /* The union type allows passing of 64 bit target pointers on 32 bit
  215. * hosts in a single parameter
  216. */
  217. typedef union {
  218. int host_int;
  219. unsigned long host_ulong;
  220. void *host_ptr;
  221. vaddr target_ptr;
  222. } run_on_cpu_data;
  223. #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
  224. #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
  225. #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
  226. #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
  227. #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
  228. typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_cpu_data data);
  229. struct qemu_work_item;
  230. #define CPU_UNSET_NUMA_NODE_ID -1
  231. #define CPU_TRACE_DSTATE_MAX_EVENTS 32
  232. /**
  233. * CPUState:
  234. * @cpu_index: CPU index (informative).
  235. * @cluster_index: Identifies which cluster this CPU is in.
  236. * For boards which don't define clusters or for "loose" CPUs not assigned
  237. * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
  238. * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
  239. * QOM parent.
  240. * Under TCG this value is propagated to @tcg_cflags.
  241. * See TranslationBlock::TCG CF_CLUSTER_MASK.
  242. * @tcg_cflags: Pre-computed cflags for this cpu.
  243. * @nr_cores: Number of cores within this CPU package.
  244. * @nr_threads: Number of threads within this CPU.
  245. * @running: #true if CPU is currently running (lockless).
  246. * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
  247. * valid under cpu_list_lock.
  248. * @created: Indicates whether the CPU thread has been successfully created.
  249. * @interrupt_request: Indicates a pending interrupt request.
  250. * @halted: Nonzero if the CPU is in suspended state.
  251. * @stop: Indicates a pending stop request.
  252. * @stopped: Indicates the CPU has been artificially stopped.
  253. * @unplug: Indicates a pending CPU unplug request.
  254. * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
  255. * @singlestep_enabled: Flags for single-stepping.
  256. * @icount_extra: Instructions until next timer event.
  257. * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
  258. * requires that IO only be performed on the last instruction of a TB
  259. * so that interrupts take effect immediately.
  260. * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
  261. * AddressSpaces this CPU has)
  262. * @num_ases: number of CPUAddressSpaces in @cpu_ases
  263. * @as: Pointer to the first AddressSpace, for the convenience of targets which
  264. * only have a single AddressSpace
  265. * @env_ptr: Pointer to subclass-specific CPUArchState field.
  266. * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
  267. * @gdb_regs: Additional GDB registers.
  268. * @gdb_num_regs: Number of total registers accessible to GDB.
  269. * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
  270. * @next_cpu: Next CPU sharing TB cache.
  271. * @opaque: User data.
  272. * @mem_io_pc: Host Program Counter at which the memory was accessed.
  273. * @kvm_fd: vCPU file descriptor for KVM.
  274. * @work_mutex: Lock to prevent multiple access to @work_list.
  275. * @work_list: List of pending asynchronous work.
  276. * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
  277. * to @trace_dstate).
  278. * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
  279. * @plugin_mask: Plugin event bitmap. Modified only via async work.
  280. * @ignore_memory_transaction_failures: Cached copy of the MachineState
  281. * flag of the same name: allows the board to suppress calling of the
  282. * CPU do_transaction_failed hook function.
  283. * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
  284. * ring is enabled.
  285. * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
  286. * dirty ring structure.
  287. *
  288. * State of one CPU core or thread.
  289. */
  290. struct CPUState {
  291. /*< private >*/
  292. DeviceState parent_obj;
  293. /* cache to avoid expensive CPU_GET_CLASS */
  294. CPUClass *cc;
  295. /*< public >*/
  296. int nr_cores;
  297. int nr_threads;
  298. struct QemuThread *thread;
  299. #ifdef _WIN32
  300. HANDLE hThread;
  301. QemuSemaphore sem;
  302. #endif
  303. int thread_id;
  304. bool running, has_waiter;
  305. struct QemuCond *halt_cond;
  306. bool thread_kicked;
  307. bool created;
  308. bool stop;
  309. bool stopped;
  310. /* Should CPU start in powered-off state? */
  311. bool start_powered_off;
  312. bool unplug;
  313. bool crash_occurred;
  314. bool exit_request;
  315. int exclusive_context_count;
  316. uint32_t cflags_next_tb;
  317. /* updates protected by BQL */
  318. uint32_t interrupt_request;
  319. int singlestep_enabled;
  320. int64_t icount_budget;
  321. int64_t icount_extra;
  322. uint64_t random_seed;
  323. sigjmp_buf jmp_env;
  324. QemuMutex work_mutex;
  325. QSIMPLEQ_HEAD(, qemu_work_item) work_list;
  326. CPUAddressSpace *cpu_ases;
  327. int num_ases;
  328. AddressSpace *as;
  329. MemoryRegion *memory;
  330. CPUArchState *env_ptr;
  331. IcountDecr *icount_decr_ptr;
  332. CPUJumpCache *tb_jmp_cache;
  333. struct GDBRegisterState *gdb_regs;
  334. int gdb_num_regs;
  335. int gdb_num_g_regs;
  336. QTAILQ_ENTRY(CPUState) node;
  337. /* ice debug support */
  338. QTAILQ_HEAD(, CPUBreakpoint) breakpoints;
  339. QTAILQ_HEAD(, CPUWatchpoint) watchpoints;
  340. CPUWatchpoint *watchpoint_hit;
  341. void *opaque;
  342. /* In order to avoid passing too many arguments to the MMIO helpers,
  343. * we store some rarely used information in the CPU context.
  344. */
  345. uintptr_t mem_io_pc;
  346. /* Only used in KVM */
  347. int kvm_fd;
  348. struct KVMState *kvm_state;
  349. struct kvm_run *kvm_run;
  350. struct kvm_dirty_gfn *kvm_dirty_gfns;
  351. uint32_t kvm_fetch_index;
  352. uint64_t dirty_pages;
  353. /* Use by accel-block: CPU is executing an ioctl() */
  354. QemuLockCnt in_ioctl_lock;
  355. /* Used for events with 'vcpu' and *without* the 'disabled' properties */
  356. DECLARE_BITMAP(trace_dstate_delayed, CPU_TRACE_DSTATE_MAX_EVENTS);
  357. DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS);
  358. DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX);
  359. #ifdef CONFIG_PLUGIN
  360. GArray *plugin_mem_cbs;
  361. /* saved iotlb data from io_writex */
  362. SavedIOTLB saved_iotlb;
  363. #endif
  364. /* TODO Move common fields from CPUArchState here. */
  365. int cpu_index;
  366. int cluster_index;
  367. uint32_t tcg_cflags;
  368. uint32_t halted;
  369. uint32_t can_do_io;
  370. int32_t exception_index;
  371. /* shared by kvm, hax and hvf */
  372. bool vcpu_dirty;
  373. /* Used to keep track of an outstanding cpu throttle thread for migration
  374. * autoconverge
  375. */
  376. bool throttle_thread_scheduled;
  377. /*
  378. * Sleep throttle_us_per_full microseconds once dirty ring is full
  379. * if dirty page rate limit is enabled.
  380. */
  381. int64_t throttle_us_per_full;
  382. bool ignore_memory_transaction_failures;
  383. /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
  384. bool prctl_unalign_sigbus;
  385. struct hax_vcpu_state *hax_vcpu;
  386. struct hvf_vcpu_state *hvf;
  387. /* track IOMMUs whose translations we've cached in the TCG TLB */
  388. GArray *iommu_notifiers;
  389. };
  390. typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
  391. extern CPUTailQ cpus;
  392. #define first_cpu QTAILQ_FIRST_RCU(&cpus)
  393. #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
  394. #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
  395. #define CPU_FOREACH_SAFE(cpu, next_cpu) \
  396. QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
  397. extern __thread CPUState *current_cpu;
  398. /**
  399. * qemu_tcg_mttcg_enabled:
  400. * Check whether we are running MultiThread TCG or not.
  401. *
  402. * Returns: %true if we are in MTTCG mode %false otherwise.
  403. */
  404. extern bool mttcg_enabled;
  405. #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
  406. /**
  407. * cpu_paging_enabled:
  408. * @cpu: The CPU whose state is to be inspected.
  409. *
  410. * Returns: %true if paging is enabled, %false otherwise.
  411. */
  412. bool cpu_paging_enabled(const CPUState *cpu);
  413. /**
  414. * cpu_get_memory_mapping:
  415. * @cpu: The CPU whose memory mappings are to be obtained.
  416. * @list: Where to write the memory mappings to.
  417. * @errp: Pointer for reporting an #Error.
  418. */
  419. void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
  420. Error **errp);
  421. #if !defined(CONFIG_USER_ONLY)
  422. /**
  423. * cpu_write_elf64_note:
  424. * @f: pointer to a function that writes memory to a file
  425. * @cpu: The CPU whose memory is to be dumped
  426. * @cpuid: ID number of the CPU
  427. * @opaque: pointer to the CPUState struct
  428. */
  429. int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
  430. int cpuid, void *opaque);
  431. /**
  432. * cpu_write_elf64_qemunote:
  433. * @f: pointer to a function that writes memory to a file
  434. * @cpu: The CPU whose memory is to be dumped
  435. * @cpuid: ID number of the CPU
  436. * @opaque: pointer to the CPUState struct
  437. */
  438. int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
  439. void *opaque);
  440. /**
  441. * cpu_write_elf32_note:
  442. * @f: pointer to a function that writes memory to a file
  443. * @cpu: The CPU whose memory is to be dumped
  444. * @cpuid: ID number of the CPU
  445. * @opaque: pointer to the CPUState struct
  446. */
  447. int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
  448. int cpuid, void *opaque);
  449. /**
  450. * cpu_write_elf32_qemunote:
  451. * @f: pointer to a function that writes memory to a file
  452. * @cpu: The CPU whose memory is to be dumped
  453. * @cpuid: ID number of the CPU
  454. * @opaque: pointer to the CPUState struct
  455. */
  456. int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
  457. void *opaque);
  458. /**
  459. * cpu_get_crash_info:
  460. * @cpu: The CPU to get crash information for
  461. *
  462. * Gets the previously saved crash information.
  463. * Caller is responsible for freeing the data.
  464. */
  465. GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
  466. #endif /* !CONFIG_USER_ONLY */
  467. /**
  468. * CPUDumpFlags:
  469. * @CPU_DUMP_CODE:
  470. * @CPU_DUMP_FPU: dump FPU register state, not just integer
  471. * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
  472. */
  473. enum CPUDumpFlags {
  474. CPU_DUMP_CODE = 0x00010000,
  475. CPU_DUMP_FPU = 0x00020000,
  476. CPU_DUMP_CCOP = 0x00040000,
  477. };
  478. /**
  479. * cpu_dump_state:
  480. * @cpu: The CPU whose state is to be dumped.
  481. * @f: If non-null, dump to this stream, else to current print sink.
  482. *
  483. * Dumps CPU state.
  484. */
  485. void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
  486. #ifndef CONFIG_USER_ONLY
  487. /**
  488. * cpu_get_phys_page_attrs_debug:
  489. * @cpu: The CPU to obtain the physical page address for.
  490. * @addr: The virtual address.
  491. * @attrs: Updated on return with the memory transaction attributes to use
  492. * for this access.
  493. *
  494. * Obtains the physical page corresponding to a virtual one, together
  495. * with the corresponding memory transaction attributes to use for the access.
  496. * Use it only for debugging because no protection checks are done.
  497. *
  498. * Returns: Corresponding physical page address or -1 if no page found.
  499. */
  500. hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
  501. MemTxAttrs *attrs);
  502. /**
  503. * cpu_get_phys_page_debug:
  504. * @cpu: The CPU to obtain the physical page address for.
  505. * @addr: The virtual address.
  506. *
  507. * Obtains the physical page corresponding to a virtual one.
  508. * Use it only for debugging because no protection checks are done.
  509. *
  510. * Returns: Corresponding physical page address or -1 if no page found.
  511. */
  512. hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
  513. /** cpu_asidx_from_attrs:
  514. * @cpu: CPU
  515. * @attrs: memory transaction attributes
  516. *
  517. * Returns the address space index specifying the CPU AddressSpace
  518. * to use for a memory access with the given transaction attributes.
  519. */
  520. int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
  521. /**
  522. * cpu_virtio_is_big_endian:
  523. * @cpu: CPU
  524. * Returns %true if a CPU which supports runtime configurable endianness
  525. * is currently big-endian.
  526. */
  527. bool cpu_virtio_is_big_endian(CPUState *cpu);
  528. #endif /* CONFIG_USER_ONLY */
  529. /**
  530. * cpu_list_add:
  531. * @cpu: The CPU to be added to the list of CPUs.
  532. */
  533. void cpu_list_add(CPUState *cpu);
  534. /**
  535. * cpu_list_remove:
  536. * @cpu: The CPU to be removed from the list of CPUs.
  537. */
  538. void cpu_list_remove(CPUState *cpu);
  539. /**
  540. * cpu_reset:
  541. * @cpu: The CPU whose state is to be reset.
  542. */
  543. void cpu_reset(CPUState *cpu);
  544. /**
  545. * cpu_class_by_name:
  546. * @typename: The CPU base type.
  547. * @cpu_model: The model string without any parameters.
  548. *
  549. * Looks up a CPU #ObjectClass matching name @cpu_model.
  550. *
  551. * Returns: A #CPUClass or %NULL if not matching class is found.
  552. */
  553. ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
  554. /**
  555. * cpu_create:
  556. * @typename: The CPU type.
  557. *
  558. * Instantiates a CPU and realizes the CPU.
  559. *
  560. * Returns: A #CPUState or %NULL if an error occurred.
  561. */
  562. CPUState *cpu_create(const char *typename);
  563. /**
  564. * parse_cpu_option:
  565. * @cpu_option: The -cpu option including optional parameters.
  566. *
  567. * processes optional parameters and registers them as global properties
  568. *
  569. * Returns: type of CPU to create or prints error and terminates process
  570. * if an error occurred.
  571. */
  572. const char *parse_cpu_option(const char *cpu_option);
  573. /**
  574. * cpu_has_work:
  575. * @cpu: The vCPU to check.
  576. *
  577. * Checks whether the CPU has work to do.
  578. *
  579. * Returns: %true if the CPU has work, %false otherwise.
  580. */
  581. static inline bool cpu_has_work(CPUState *cpu)
  582. {
  583. CPUClass *cc = CPU_GET_CLASS(cpu);
  584. g_assert(cc->has_work);
  585. return cc->has_work(cpu);
  586. }
  587. /**
  588. * qemu_cpu_is_self:
  589. * @cpu: The vCPU to check against.
  590. *
  591. * Checks whether the caller is executing on the vCPU thread.
  592. *
  593. * Returns: %true if called from @cpu's thread, %false otherwise.
  594. */
  595. bool qemu_cpu_is_self(CPUState *cpu);
  596. /**
  597. * qemu_cpu_kick:
  598. * @cpu: The vCPU to kick.
  599. *
  600. * Kicks @cpu's thread.
  601. */
  602. void qemu_cpu_kick(CPUState *cpu);
  603. /**
  604. * cpu_is_stopped:
  605. * @cpu: The CPU to check.
  606. *
  607. * Checks whether the CPU is stopped.
  608. *
  609. * Returns: %true if run state is not running or if artificially stopped;
  610. * %false otherwise.
  611. */
  612. bool cpu_is_stopped(CPUState *cpu);
  613. /**
  614. * do_run_on_cpu:
  615. * @cpu: The vCPU to run on.
  616. * @func: The function to be executed.
  617. * @data: Data to pass to the function.
  618. * @mutex: Mutex to release while waiting for @func to run.
  619. *
  620. * Used internally in the implementation of run_on_cpu.
  621. */
  622. void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
  623. QemuMutex *mutex);
  624. /**
  625. * run_on_cpu:
  626. * @cpu: The vCPU to run on.
  627. * @func: The function to be executed.
  628. * @data: Data to pass to the function.
  629. *
  630. * Schedules the function @func for execution on the vCPU @cpu.
  631. */
  632. void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
  633. /**
  634. * async_run_on_cpu:
  635. * @cpu: The vCPU to run on.
  636. * @func: The function to be executed.
  637. * @data: Data to pass to the function.
  638. *
  639. * Schedules the function @func for execution on the vCPU @cpu asynchronously.
  640. */
  641. void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
  642. /**
  643. * async_safe_run_on_cpu:
  644. * @cpu: The vCPU to run on.
  645. * @func: The function to be executed.
  646. * @data: Data to pass to the function.
  647. *
  648. * Schedules the function @func for execution on the vCPU @cpu asynchronously,
  649. * while all other vCPUs are sleeping.
  650. *
  651. * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
  652. * BQL.
  653. */
  654. void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
  655. /**
  656. * cpu_in_exclusive_context()
  657. * @cpu: The vCPU to check
  658. *
  659. * Returns true if @cpu is an exclusive context, for example running
  660. * something which has previously been queued via async_safe_run_on_cpu().
  661. */
  662. static inline bool cpu_in_exclusive_context(const CPUState *cpu)
  663. {
  664. return cpu->exclusive_context_count;
  665. }
  666. /**
  667. * qemu_get_cpu:
  668. * @index: The CPUState@cpu_index value of the CPU to obtain.
  669. *
  670. * Gets a CPU matching @index.
  671. *
  672. * Returns: The CPU or %NULL if there is no matching CPU.
  673. */
  674. CPUState *qemu_get_cpu(int index);
  675. /**
  676. * cpu_exists:
  677. * @id: Guest-exposed CPU ID to lookup.
  678. *
  679. * Search for CPU with specified ID.
  680. *
  681. * Returns: %true - CPU is found, %false - CPU isn't found.
  682. */
  683. bool cpu_exists(int64_t id);
  684. /**
  685. * cpu_by_arch_id:
  686. * @id: Guest-exposed CPU ID of the CPU to obtain.
  687. *
  688. * Get a CPU with matching @id.
  689. *
  690. * Returns: The CPU or %NULL if there is no matching CPU.
  691. */
  692. CPUState *cpu_by_arch_id(int64_t id);
  693. /**
  694. * cpu_interrupt:
  695. * @cpu: The CPU to set an interrupt on.
  696. * @mask: The interrupts to set.
  697. *
  698. * Invokes the interrupt handler.
  699. */
  700. void cpu_interrupt(CPUState *cpu, int mask);
  701. /**
  702. * cpu_set_pc:
  703. * @cpu: The CPU to set the program counter for.
  704. * @addr: Program counter value.
  705. *
  706. * Sets the program counter for a CPU.
  707. */
  708. static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
  709. {
  710. CPUClass *cc = CPU_GET_CLASS(cpu);
  711. cc->set_pc(cpu, addr);
  712. }
  713. /**
  714. * cpu_reset_interrupt:
  715. * @cpu: The CPU to clear the interrupt on.
  716. * @mask: The interrupt mask to clear.
  717. *
  718. * Resets interrupts on the vCPU @cpu.
  719. */
  720. void cpu_reset_interrupt(CPUState *cpu, int mask);
  721. /**
  722. * cpu_exit:
  723. * @cpu: The CPU to exit.
  724. *
  725. * Requests the CPU @cpu to exit execution.
  726. */
  727. void cpu_exit(CPUState *cpu);
  728. /**
  729. * cpu_resume:
  730. * @cpu: The CPU to resume.
  731. *
  732. * Resumes CPU, i.e. puts CPU into runnable state.
  733. */
  734. void cpu_resume(CPUState *cpu);
  735. /**
  736. * cpu_remove_sync:
  737. * @cpu: The CPU to remove.
  738. *
  739. * Requests the CPU to be removed and waits till it is removed.
  740. */
  741. void cpu_remove_sync(CPUState *cpu);
  742. /**
  743. * process_queued_cpu_work() - process all items on CPU work queue
  744. * @cpu: The CPU which work queue to process.
  745. */
  746. void process_queued_cpu_work(CPUState *cpu);
  747. /**
  748. * cpu_exec_start:
  749. * @cpu: The CPU for the current thread.
  750. *
  751. * Record that a CPU has started execution and can be interrupted with
  752. * cpu_exit.
  753. */
  754. void cpu_exec_start(CPUState *cpu);
  755. /**
  756. * cpu_exec_end:
  757. * @cpu: The CPU for the current thread.
  758. *
  759. * Record that a CPU has stopped execution and exclusive sections
  760. * can be executed without interrupting it.
  761. */
  762. void cpu_exec_end(CPUState *cpu);
  763. /**
  764. * start_exclusive:
  765. *
  766. * Wait for a concurrent exclusive section to end, and then start
  767. * a section of work that is run while other CPUs are not running
  768. * between cpu_exec_start and cpu_exec_end. CPUs that are running
  769. * cpu_exec are exited immediately. CPUs that call cpu_exec_start
  770. * during the exclusive section go to sleep until this CPU calls
  771. * end_exclusive.
  772. */
  773. void start_exclusive(void);
  774. /**
  775. * end_exclusive:
  776. *
  777. * Concludes an exclusive execution section started by start_exclusive.
  778. */
  779. void end_exclusive(void);
  780. /**
  781. * qemu_init_vcpu:
  782. * @cpu: The vCPU to initialize.
  783. *
  784. * Initializes a vCPU.
  785. */
  786. void qemu_init_vcpu(CPUState *cpu);
  787. #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
  788. #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
  789. #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
  790. /**
  791. * cpu_single_step:
  792. * @cpu: CPU to the flags for.
  793. * @enabled: Flags to enable.
  794. *
  795. * Enables or disables single-stepping for @cpu.
  796. */
  797. void cpu_single_step(CPUState *cpu, int enabled);
  798. /* Breakpoint/watchpoint flags */
  799. #define BP_MEM_READ 0x01
  800. #define BP_MEM_WRITE 0x02
  801. #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
  802. #define BP_STOP_BEFORE_ACCESS 0x04
  803. /* 0x08 currently unused */
  804. #define BP_GDB 0x10
  805. #define BP_CPU 0x20
  806. #define BP_ANY (BP_GDB | BP_CPU)
  807. #define BP_HIT_SHIFT 6
  808. #define BP_WATCHPOINT_HIT_READ (BP_MEM_READ << BP_HIT_SHIFT)
  809. #define BP_WATCHPOINT_HIT_WRITE (BP_MEM_WRITE << BP_HIT_SHIFT)
  810. #define BP_WATCHPOINT_HIT (BP_MEM_ACCESS << BP_HIT_SHIFT)
  811. int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
  812. CPUBreakpoint **breakpoint);
  813. int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
  814. void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
  815. void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
  816. /* Return true if PC matches an installed breakpoint. */
  817. static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
  818. {
  819. CPUBreakpoint *bp;
  820. if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
  821. QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
  822. if (bp->pc == pc && (bp->flags & mask)) {
  823. return true;
  824. }
  825. }
  826. }
  827. return false;
  828. }
  829. #if defined(CONFIG_USER_ONLY)
  830. static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
  831. int flags, CPUWatchpoint **watchpoint)
  832. {
  833. return -ENOSYS;
  834. }
  835. static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
  836. vaddr len, int flags)
  837. {
  838. return -ENOSYS;
  839. }
  840. static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
  841. CPUWatchpoint *wp)
  842. {
  843. }
  844. static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
  845. {
  846. }
  847. #else
  848. int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
  849. int flags, CPUWatchpoint **watchpoint);
  850. int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
  851. vaddr len, int flags);
  852. void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
  853. void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
  854. #endif
  855. /**
  856. * cpu_get_address_space:
  857. * @cpu: CPU to get address space from
  858. * @asidx: index identifying which address space to get
  859. *
  860. * Return the requested address space of this CPU. @asidx
  861. * specifies which address space to read.
  862. */
  863. AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
  864. G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
  865. G_GNUC_PRINTF(2, 3);
  866. /* $(top_srcdir)/cpu.c */
  867. void cpu_class_init_props(DeviceClass *dc);
  868. void cpu_exec_initfn(CPUState *cpu);
  869. void cpu_exec_realizefn(CPUState *cpu, Error **errp);
  870. void cpu_exec_unrealizefn(CPUState *cpu);
  871. /**
  872. * target_words_bigendian:
  873. * Returns true if the (default) endianness of the target is big endian,
  874. * false otherwise. Note that in target-specific code, you can use
  875. * TARGET_BIG_ENDIAN directly instead. On the other hand, common
  876. * code should normally never need to know about the endianness of the
  877. * target, so please do *not* use this function unless you know very well
  878. * what you are doing!
  879. */
  880. bool target_words_bigendian(void);
  881. void page_size_init(void);
  882. #ifdef NEED_CPU_H
  883. #ifdef CONFIG_SOFTMMU
  884. extern const VMStateDescription vmstate_cpu_common;
  885. #define VMSTATE_CPU() { \
  886. .name = "parent_obj", \
  887. .size = sizeof(CPUState), \
  888. .vmsd = &vmstate_cpu_common, \
  889. .flags = VMS_STRUCT, \
  890. .offset = 0, \
  891. }
  892. #endif /* CONFIG_SOFTMMU */
  893. #endif /* NEED_CPU_H */
  894. #define UNASSIGNED_CPU_INDEX -1
  895. #define UNASSIGNED_CLUSTER_INDEX -1
  896. #endif