cpu-target.c 13 KB

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  1. /*
  2. * Target-specific parts of the CPU object
  3. *
  4. * Copyright (c) 2003 Fabrice Bellard
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License as published by the Free Software Foundation; either
  9. * version 2 of the License, or (at your option) any later version.
  10. *
  11. * This library is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * Lesser General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Lesser General Public
  17. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "qemu/osdep.h"
  20. #include "qapi/error.h"
  21. #include "exec/target_page.h"
  22. #include "hw/qdev-core.h"
  23. #include "hw/qdev-properties.h"
  24. #include "qemu/error-report.h"
  25. #include "qemu/qemu-print.h"
  26. #include "migration/vmstate.h"
  27. #ifdef CONFIG_USER_ONLY
  28. #include "qemu.h"
  29. #else
  30. #include "hw/core/sysemu-cpu-ops.h"
  31. #include "exec/address-spaces.h"
  32. #include "exec/memory.h"
  33. #endif
  34. #include "sysemu/cpus.h"
  35. #include "sysemu/tcg.h"
  36. #include "exec/replay-core.h"
  37. #include "exec/cpu-common.h"
  38. #include "exec/exec-all.h"
  39. #include "exec/tb-flush.h"
  40. #include "exec/translate-all.h"
  41. #include "exec/log.h"
  42. #include "hw/core/accel-cpu.h"
  43. #include "trace/trace-root.h"
  44. #include "qemu/accel.h"
  45. #ifndef CONFIG_USER_ONLY
  46. static int cpu_common_post_load(void *opaque, int version_id)
  47. {
  48. CPUState *cpu = opaque;
  49. /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
  50. version_id is increased. */
  51. cpu->interrupt_request &= ~0x01;
  52. tlb_flush(cpu);
  53. /* loadvm has just updated the content of RAM, bypassing the
  54. * usual mechanisms that ensure we flush TBs for writes to
  55. * memory we've translated code from. So we must flush all TBs,
  56. * which will now be stale.
  57. */
  58. tb_flush(cpu);
  59. return 0;
  60. }
  61. static int cpu_common_pre_load(void *opaque)
  62. {
  63. CPUState *cpu = opaque;
  64. cpu->exception_index = -1;
  65. return 0;
  66. }
  67. static bool cpu_common_exception_index_needed(void *opaque)
  68. {
  69. CPUState *cpu = opaque;
  70. return tcg_enabled() && cpu->exception_index != -1;
  71. }
  72. static const VMStateDescription vmstate_cpu_common_exception_index = {
  73. .name = "cpu_common/exception_index",
  74. .version_id = 1,
  75. .minimum_version_id = 1,
  76. .needed = cpu_common_exception_index_needed,
  77. .fields = (const VMStateField[]) {
  78. VMSTATE_INT32(exception_index, CPUState),
  79. VMSTATE_END_OF_LIST()
  80. }
  81. };
  82. static bool cpu_common_crash_occurred_needed(void *opaque)
  83. {
  84. CPUState *cpu = opaque;
  85. return cpu->crash_occurred;
  86. }
  87. static const VMStateDescription vmstate_cpu_common_crash_occurred = {
  88. .name = "cpu_common/crash_occurred",
  89. .version_id = 1,
  90. .minimum_version_id = 1,
  91. .needed = cpu_common_crash_occurred_needed,
  92. .fields = (const VMStateField[]) {
  93. VMSTATE_BOOL(crash_occurred, CPUState),
  94. VMSTATE_END_OF_LIST()
  95. }
  96. };
  97. const VMStateDescription vmstate_cpu_common = {
  98. .name = "cpu_common",
  99. .version_id = 1,
  100. .minimum_version_id = 1,
  101. .pre_load = cpu_common_pre_load,
  102. .post_load = cpu_common_post_load,
  103. .fields = (const VMStateField[]) {
  104. VMSTATE_UINT32(halted, CPUState),
  105. VMSTATE_UINT32(interrupt_request, CPUState),
  106. VMSTATE_END_OF_LIST()
  107. },
  108. .subsections = (const VMStateDescription * const []) {
  109. &vmstate_cpu_common_exception_index,
  110. &vmstate_cpu_common_crash_occurred,
  111. NULL
  112. }
  113. };
  114. #endif
  115. bool cpu_exec_realizefn(CPUState *cpu, Error **errp)
  116. {
  117. /* cache the cpu class for the hotpath */
  118. cpu->cc = CPU_GET_CLASS(cpu);
  119. if (!accel_cpu_common_realize(cpu, errp)) {
  120. return false;
  121. }
  122. /* Wait until cpu initialization complete before exposing cpu. */
  123. cpu_list_add(cpu);
  124. #ifdef CONFIG_USER_ONLY
  125. assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
  126. qdev_get_vmsd(DEVICE(cpu))->unmigratable);
  127. #else
  128. if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
  129. vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
  130. }
  131. if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
  132. vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu);
  133. }
  134. #endif /* CONFIG_USER_ONLY */
  135. return true;
  136. }
  137. void cpu_exec_unrealizefn(CPUState *cpu)
  138. {
  139. #ifndef CONFIG_USER_ONLY
  140. CPUClass *cc = CPU_GET_CLASS(cpu);
  141. if (cc->sysemu_ops->legacy_vmsd != NULL) {
  142. vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
  143. }
  144. if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
  145. vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
  146. }
  147. #endif
  148. cpu_list_remove(cpu);
  149. /*
  150. * Now that the vCPU has been removed from the RCU list, we can call
  151. * accel_cpu_common_unrealize, which may free fields using call_rcu.
  152. */
  153. accel_cpu_common_unrealize(cpu);
  154. }
  155. /*
  156. * This can't go in hw/core/cpu.c because that file is compiled only
  157. * once for both user-mode and system builds.
  158. */
  159. static Property cpu_common_props[] = {
  160. #ifdef CONFIG_USER_ONLY
  161. /*
  162. * Create a property for the user-only object, so users can
  163. * adjust prctl(PR_SET_UNALIGN) from the command-line.
  164. * Has no effect if the target does not support the feature.
  165. */
  166. DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
  167. prctl_unalign_sigbus, false),
  168. #else
  169. /*
  170. * Create a memory property for system CPU object, so users can
  171. * wire up its memory. The default if no link is set up is to use
  172. * the system address space.
  173. */
  174. DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
  175. MemoryRegion *),
  176. #endif
  177. DEFINE_PROP_END_OF_LIST(),
  178. };
  179. #ifndef CONFIG_USER_ONLY
  180. static bool cpu_get_start_powered_off(Object *obj, Error **errp)
  181. {
  182. CPUState *cpu = CPU(obj);
  183. return cpu->start_powered_off;
  184. }
  185. static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
  186. {
  187. CPUState *cpu = CPU(obj);
  188. cpu->start_powered_off = value;
  189. }
  190. #endif
  191. void cpu_class_init_props(DeviceClass *dc)
  192. {
  193. #ifndef CONFIG_USER_ONLY
  194. ObjectClass *oc = OBJECT_CLASS(dc);
  195. /*
  196. * We can't use DEFINE_PROP_BOOL in the Property array for this
  197. * property, because we want this to be settable after realize.
  198. */
  199. object_class_property_add_bool(oc, "start-powered-off",
  200. cpu_get_start_powered_off,
  201. cpu_set_start_powered_off);
  202. #endif
  203. device_class_set_props(dc, cpu_common_props);
  204. }
  205. void cpu_exec_initfn(CPUState *cpu)
  206. {
  207. cpu->as = NULL;
  208. cpu->num_ases = 0;
  209. #ifndef CONFIG_USER_ONLY
  210. cpu->thread_id = qemu_get_thread_id();
  211. cpu->memory = get_system_memory();
  212. object_ref(OBJECT(cpu->memory));
  213. #endif
  214. }
  215. char *cpu_model_from_type(const char *typename)
  216. {
  217. const char *suffix = "-" CPU_RESOLVING_TYPE;
  218. if (!object_class_by_name(typename)) {
  219. return NULL;
  220. }
  221. if (g_str_has_suffix(typename, suffix)) {
  222. return g_strndup(typename, strlen(typename) - strlen(suffix));
  223. }
  224. return g_strdup(typename);
  225. }
  226. const char *parse_cpu_option(const char *cpu_option)
  227. {
  228. ObjectClass *oc;
  229. CPUClass *cc;
  230. gchar **model_pieces;
  231. const char *cpu_type;
  232. model_pieces = g_strsplit(cpu_option, ",", 2);
  233. if (!model_pieces[0]) {
  234. error_report("-cpu option cannot be empty");
  235. exit(1);
  236. }
  237. oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
  238. if (oc == NULL) {
  239. error_report("unable to find CPU model '%s'", model_pieces[0]);
  240. g_strfreev(model_pieces);
  241. exit(EXIT_FAILURE);
  242. }
  243. cpu_type = object_class_get_name(oc);
  244. cc = CPU_CLASS(oc);
  245. cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
  246. g_strfreev(model_pieces);
  247. return cpu_type;
  248. }
  249. #ifndef cpu_list
  250. static void cpu_list_entry(gpointer data, gpointer user_data)
  251. {
  252. CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
  253. const char *typename = object_class_get_name(OBJECT_CLASS(data));
  254. g_autofree char *model = cpu_model_from_type(typename);
  255. if (cc->deprecation_note) {
  256. qemu_printf(" %s (deprecated)\n", model);
  257. } else {
  258. qemu_printf(" %s\n", model);
  259. }
  260. }
  261. static void cpu_list(void)
  262. {
  263. GSList *list;
  264. list = object_class_get_list_sorted(TYPE_CPU, false);
  265. qemu_printf("Available CPUs:\n");
  266. g_slist_foreach(list, cpu_list_entry, NULL);
  267. g_slist_free(list);
  268. }
  269. #endif
  270. void list_cpus(void)
  271. {
  272. cpu_list();
  273. }
  274. /* enable or disable single step mode. EXCP_DEBUG is returned by the
  275. CPU loop after each instruction */
  276. void cpu_single_step(CPUState *cpu, int enabled)
  277. {
  278. if (cpu->singlestep_enabled != enabled) {
  279. cpu->singlestep_enabled = enabled;
  280. #if !defined(CONFIG_USER_ONLY)
  281. const AccelOpsClass *ops = cpus_get_accel();
  282. if (ops->update_guest_debug) {
  283. ops->update_guest_debug(cpu);
  284. }
  285. #endif
  286. trace_breakpoint_singlestep(cpu->cpu_index, enabled);
  287. }
  288. }
  289. void cpu_abort(CPUState *cpu, const char *fmt, ...)
  290. {
  291. va_list ap;
  292. va_list ap2;
  293. va_start(ap, fmt);
  294. va_copy(ap2, ap);
  295. fprintf(stderr, "qemu: fatal: ");
  296. vfprintf(stderr, fmt, ap);
  297. fprintf(stderr, "\n");
  298. cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
  299. if (qemu_log_separate()) {
  300. FILE *logfile = qemu_log_trylock();
  301. if (logfile) {
  302. fprintf(logfile, "qemu: fatal: ");
  303. vfprintf(logfile, fmt, ap2);
  304. fprintf(logfile, "\n");
  305. cpu_dump_state(cpu, logfile, CPU_DUMP_FPU | CPU_DUMP_CCOP);
  306. qemu_log_unlock(logfile);
  307. }
  308. }
  309. va_end(ap2);
  310. va_end(ap);
  311. replay_finish();
  312. #if defined(CONFIG_USER_ONLY)
  313. {
  314. struct sigaction act;
  315. sigfillset(&act.sa_mask);
  316. act.sa_handler = SIG_DFL;
  317. act.sa_flags = 0;
  318. sigaction(SIGABRT, &act, NULL);
  319. }
  320. #endif
  321. abort();
  322. }
  323. /* physical memory access (slow version, mainly for debug) */
  324. #if defined(CONFIG_USER_ONLY)
  325. int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
  326. void *ptr, size_t len, bool is_write)
  327. {
  328. int flags;
  329. vaddr l, page;
  330. void * p;
  331. uint8_t *buf = ptr;
  332. ssize_t written;
  333. int ret = -1;
  334. int fd = -1;
  335. while (len > 0) {
  336. page = addr & TARGET_PAGE_MASK;
  337. l = (page + TARGET_PAGE_SIZE) - addr;
  338. if (l > len)
  339. l = len;
  340. flags = page_get_flags(page);
  341. if (!(flags & PAGE_VALID)) {
  342. goto out_close;
  343. }
  344. if (is_write) {
  345. if (flags & PAGE_WRITE) {
  346. /* XXX: this code should not depend on lock_user */
  347. p = lock_user(VERIFY_WRITE, addr, l, 0);
  348. if (!p) {
  349. goto out_close;
  350. }
  351. memcpy(p, buf, l);
  352. unlock_user(p, addr, l);
  353. } else {
  354. /* Bypass the host page protection using ptrace. */
  355. if (fd == -1) {
  356. fd = open("/proc/self/mem", O_WRONLY);
  357. if (fd == -1) {
  358. goto out;
  359. }
  360. }
  361. /*
  362. * If there is a TranslationBlock and we weren't bypassing the
  363. * host page protection, the memcpy() above would SEGV,
  364. * ultimately leading to page_unprotect(). So invalidate the
  365. * translations manually. Both invalidation and pwrite() must
  366. * be under mmap_lock() in order to prevent the creation of
  367. * another TranslationBlock in between.
  368. */
  369. mmap_lock();
  370. tb_invalidate_phys_range(addr, addr + l - 1);
  371. written = pwrite(fd, buf, l,
  372. (off_t)(uintptr_t)g2h_untagged(addr));
  373. mmap_unlock();
  374. if (written != l) {
  375. goto out_close;
  376. }
  377. }
  378. } else if (flags & PAGE_READ) {
  379. /* XXX: this code should not depend on lock_user */
  380. p = lock_user(VERIFY_READ, addr, l, 1);
  381. if (!p) {
  382. goto out_close;
  383. }
  384. memcpy(buf, p, l);
  385. unlock_user(p, addr, 0);
  386. } else {
  387. /* Bypass the host page protection using ptrace. */
  388. if (fd == -1) {
  389. fd = open("/proc/self/mem", O_RDONLY);
  390. if (fd == -1) {
  391. goto out;
  392. }
  393. }
  394. if (pread(fd, buf, l,
  395. (off_t)(uintptr_t)g2h_untagged(addr)) != l) {
  396. goto out_close;
  397. }
  398. }
  399. len -= l;
  400. buf += l;
  401. addr += l;
  402. }
  403. ret = 0;
  404. out_close:
  405. if (fd != -1) {
  406. close(fd);
  407. }
  408. out:
  409. return ret;
  410. }
  411. #endif
  412. bool target_words_bigendian(void)
  413. {
  414. return TARGET_BIG_ENDIAN;
  415. }
  416. const char *target_name(void)
  417. {
  418. return TARGET_NAME;
  419. }